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    • 8. 发明申请
    • ADHESIVE SHEET AND COPPER-CLAD LAMINATE
    • 粘合片和铜箔层压板
    • US20110308725A1
    • 2011-12-22
    • US13221358
    • 2011-08-30
    • Hisayasu KaneshiroTakashi Kikuchi
    • Hisayasu KaneshiroTakashi Kikuchi
    • C09J7/02
    • H05K1/0346C09J7/25C09J2479/086H05K1/0393H05K3/386H05K2201/0154H05K2201/068Y10T428/2852Y10T428/31678
    • Disclosed is an adhesive film having high dimensional stability which can be suitably used for two layer FPCs. Specifically, disclosed is an adhesive sheet composed of an insulting layer and an adhesive layer arranged on one side or both sides of the insulating layer. This adhesive sheet is characterized in that the insulating layer has a ratio E′2/E′1 between the storage elasticity modulus E′1 at 25° C. and the storage elasticity modulus E′2 at 380° C. of not more than 0.2 and a coefficient of thermal expansion in the MD direction of 5-15 ppm at 100-200° C. It is further characterized in that the change in the coefficient of thermal expansion of the adhesive sheet at 100-250° C. after heat treatment at 380° C. for 30 second under tension of 20 kg/m is not more than 2.5 ppm in the tension direction and not more than 10 ppm in the direction perpendicular to the tension direction.
    • 公开了一种具有高尺寸稳定性的粘合膜,其可以适用于两层FPC。 具体地,公开了由绝缘层和布置在绝缘层的一侧或两侧上的粘合层构成的粘合片。 该粘合片的特征在于绝缘层在25℃下的储能弹性模量E'1与380℃下的储能弹性模量E'2之间的比率E'2 / E'1不大于 0.2,在100〜200℃下MD方向的热膨胀系数为5〜15ppm。其特征还在于,热处理后的粘合片的热膨胀系数在100〜250℃的变化 在拉伸方向下在380℃,30秒的拉伸下处理30秒,在拉伸方向垂直的方向不大于10ppm。
    • 10. 发明授权
    • MIS-transistor-based nonvolatile memory with reliable data retention capability
    • 基于MIS晶体管的非易失性存储器具有可靠的数据保留能力
    • US07511999B1
    • 2009-03-31
    • US11935458
    • 2007-11-06
    • Takashi Kikuchi
    • Takashi Kikuchi
    • G11C14/00
    • G11C14/00
    • A nonvolatile semiconductor memory device includes a nonvolatile memory cell including an odd number of MIS transistor pairs, each of which stores one-bit data by creating an irreversible change of transistor characteristics in one of the two paired MIS transistors, latches equal in number to the odd number of MIS transistor pairs to store the odd number of one-bit data recalled from the MIS transistor pairs, the recalling of the one-bit data of a given MIS transistor pair being performed by sensing a difference in the transistor characteristics between the two paired MIS transistors of the given MIS transistor pair, and a majority decision circuit configured to make a majority decision based on the odd number of one-bit data to determine a bit value of the nonvolatile memory cell.
    • 非易失性半导体存储器件包括非易失性存储器单元,其包括奇数个MIS晶体管对,其中的每一个通过在两个成对的MIS晶体管中的一个中产生晶体管特性的不可逆变化来存储一位数据,数量等于 奇数个MIS晶体管对以存储从MIS晶体管对调用的奇数个1位数据,通过检测两个晶体管特性之间的差异来执行给定MIS晶体管对的一位数据的调用 给定MIS晶体管对的成对的MIS晶体管,以及被配置为基于奇数个1位数据做出多数决定以确定非易失性存储单元的位值的多数决定电路。