专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20130100750A1 SEMICONDUCTOR DEVICE 有权
公开(公告)号：US20130100750A1
公开(公告)日：2013-04-25
申请号：US13805287
申请日：2011-06-13
申请人： Takashi Ishiguro , Masayuki Sato , Tetsuo Hironaka , Masato Inagi , Hitoshi Shimazaki
发明人： Takashi Ishiguro , Masayuki Sato , Tetsuo Hironaka , Masato Inagi , Hitoshi Shimazaki
IPC分类号： G11C8/10 , G11C7/00
CPC分类号： G11C8/10 , G11C7/00 , H03K19/1776 , H03K19/17796
摘要： Disclosed is a semiconductor device which is intended to reduce the total number of storage element blocks that constitute a desired logic circuit. The semiconductor device includes N address lines (N is an integer equal to two or more), N data lines, and a plurality of storage sections. Each of the storage sections includes an address decoder for decoding an address supplied via the N address lines to output a word select signal to word lines; and a plurality of storage elements which are connected to the word lines and the data lines, each store data that constitute a truth table, and input or output the data via the data lines in accordance with the word select signal supplied via the word lines. The semiconductor device is adapted such that the N address lines for the storage sections are connected to the respective data lines of other N ones of the storage sections, while the N data lines for the storage sections are connected to the respective address lines of other N ones of the storage sections.

2. 发明授权

US08952721B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08952721B2
公开(公告)日：2015-02-10
申请号：US13805287
申请日：2011-06-13
申请人： Takashi Ishiguro , Masayuki Sato , Tetsuo Hironaka , Hitoshi Shimazaki
发明人： Takashi Ishiguro , Masayuki Sato , Tetsuo Hironaka , Hitoshi Shimazaki
IPC分类号： H03K19/173 , G11C8/10 , G11C7/00 , H03K19/177
CPC分类号： G11C8/10 , G11C7/00 , H03K19/1776 , H03K19/17796
摘要： Disclosed is a semiconductor device which is intended to reduce the total number of storage element blocks that constitute a desired logic circuit. The semiconductor device includes N address lines (N is an integer equal to two or more), N data lines, and a plurality of storage sections. Each of the storage sections includes an address decoder for decoding an address supplied via the N address lines to output a word select signal to word lines; and a plurality of storage elements which are connected to the word lines and the data lines, each store data that constitute a truth table, and input or output the data via the data lines in accordance with the word select signal supplied via the word lines. The semiconductor device is adapted such that the N address lines for the storage sections are connected to the respective data lines of other N ones of the storage sections, while the N data lines for the storage sections are connected to the respective address lines of other N ones of the storage sections.
摘要翻译：公开了旨在减少构成期望的逻辑电路的存储元件块的总数的半导体器件。半导体器件包括N条地址线（N是等于2或更大的整数），N条数据线和多条存储部分。每个存储部分包括地址解码器，用于对通过N个地址线提供的地址进行解码，以将字选择信号输出到字线; 以及连接到字线和数据线的多个存储元件，每个存储元件存储构成真值表的数据，并且经由数据线经由字线提供的字选择信号来输入或输出数据。半导体器件适于使用于存储部分的N个地址线连接到其他N个存储部分的相应数据线，而用于存储部分的N个数据线连接到其他N的各个地址线存储部分。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式