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    • 6. 发明授权
    • Data transfer control system, electronic instrument, program, and data transfer control method
    • 数据传输控制系统,电子仪器,程序和数据传输控制方法
    • US07366805B2
    • 2008-04-29
    • US10885139
    • 2004-07-07
    • Shinichiro FujitaHiroyuki KanaiKoji Nakao
    • Shinichiro FujitaHiroyuki KanaiKoji Nakao
    • G06F3/00G06F5/00
    • G06F13/385
    • A data transfer control system includes a buffer controller that controls access to a data buffer and a transfer controller that controls data transfer between a PC connected to a BUS1 and the logical units LUN1 and LUN2 connected to a BUS2. The transfer controller includes: a command processing section that starts data transfer to or from the LUN1 based on a command indicated by an ORB for the LUN1 when the ORB is received, and starts data transfer to or from the LUN2 based on a command indicated by an ORB for the LUN2 when the ORB is receive; and a wait processing section that waits the processing of the ORB for the LUN2, when a bus reset occurs during the processing of the ORB for the LUN1 and the ORB for the LUN2 is received after the bus reset has occurred.
    • 数据传输控制系统包括控制对数据缓冲器的访问的缓冲器控制器和控制连接到总线1的PC与连接到总线2的逻辑单元LUN 1和LUN 2之间的数据传输的传输控制器。 传送控制器包括:命令处理部分,当接收到ORB时,基于由LUN1的ORB指示的命令开始向LUN 1进行数据传送,并且基于以下操作开始向LUN 2发送数据: 当ORB接收时,由ORB为LUN 2指示的命令; 以及等待处理部分,当在LUN 1的ORB处理期间发生总线复位时,等待处理LUN 2的ORB,并且在总线复位发生之后接收到用于LUN 2的ORB。
    • 7. 发明授权
    • Data transfer control system, electronic instrument, program, and data transfer control method
    • 数据传输控制系统,电子仪器,程序和数据传输控制方法
    • US07165124B2
    • 2007-01-16
    • US10625748
    • 2003-07-24
    • Shinichiro FujitaAkemi ItoHiroyuki KanaiKoji Nakao
    • Shinichiro FujitaAkemi ItoHiroyuki KanaiKoji Nakao
    • G06F13/28
    • G06F13/28
    • A data transfer control system receives a command packet ORB transferred through a bus BUS1 (IEEE 1394), issues a command indicated by ORB to a device connected to a bus BUS2 (ATA (IDE)/ATAPI), and orders start of a DMA transfer. The command issued based on ORB is aborted after the completion of the DMA transfer. The data transfer control system compares contents of a command packet ORB1 transferred before a bus reset with contents of a command packet ORB2 transferred after the bus reset. If the contents are different, a command issued based on ORB1 is aborted after completion of a DMA transfer. Dummy data is transferred between the data transfer control system and the device connected to the bus BUS2 until a DMA transfer is completed. Dummy data transfer is controlled by performing a dummy update on a pointer.
    • 数据传输控制系统接收通过总线总线1(IEEE 1394)传送的命令分组ORB,将ORB指示的命令发送到连接到总线总线2(ATA(IDE)/ ATAPI)的设备,并且命令开始 DMA传输。 基于ORB发出的命令在DMA传输完成后中止。 数据传输控制系统将总线复位之前传送的命令包ORB 1的内容与总线复位后传送的命令包ORB 2的内容进行比较。 如果内容不同,则在完成DMA传输之后,基于ORB 1发出的命令被中止。 在数据传输控制系统和连接到总线总线2的设备之间传输虚拟数据,直到DMA传输完成。 通过对指针执行虚拟更新来控制虚拟数据传输。
    • 8. 发明授权
    • Data transfer control system, electronic instrument, and data transfer control method
    • 数据传输控制系统,电子仪器和数据传输控制方法
    • US07069350B2
    • 2006-06-27
    • US10625685
    • 2003-07-24
    • Shinichiro FujitaHiroyuki KanaiAkemi Ito
    • Shinichiro FujitaHiroyuki KanaiAkemi Ito
    • G06F13/28
    • G06F13/28
    • A data transfer control system receives a command packet ORB (SBP-2) transferred through a bus BUS1 (IEEE1394), and issues a command included in the ORB to a device connected with a bus BUS2 (ATA (IDE)/ATAPI). The data transfer control system sets a sufficiently large fixed DMA data length irrespective of the type of the issued command, and instructs start of DMA transfer to or from the device connected with the bus BUS2. The data transfer control system aborts the DMA transfer when a device connected with BUS2 informs of completion of command processing. As the fixed DMA data length, a value greater than a storage capacity of a storage or a value greater than a data length which can be designated by a command is employed. The data transfer control system issues a command included in the ORB to a device connected with the bus BUS2 without decoding the command.
    • 数据传输控制系统接收通过总线总线1(IEEE1394)传送的命令分组ORB(SBP-2),并将包括在ORB中的命令发送到与总线BUS 2(ATA(IDE)/ ATAPI)连接的设备) 。 数据传输控制系统设置足够大的固定DMA数据长度,而不管所发出的命令的类型如何,并且指示开始DMA传输到与总线BUS 2连接的设备。 当与BUS 2连接的设备通知完成命令处理时,数据传输控制系统中止DMA传输。 作为固定DMA数据长度,采用大于存储容量的值或大于可由命令指定的数据长度的值。 数据传输控制系统将ORB中包括的命令发送到与总线BUS 2连接的设备,而不对该命令进行解码。
    • 9. 发明授权
    • Data transfer control device, information storage medium and electronic equipment
    • 数据传输控制装置,信息存储介质和电子设备
    • US06904022B2
    • 2005-06-07
    • US09737760
    • 2001-03-23
    • Kosuke MatsunagaHiroyuki KanaiShinichiro Fujita
    • Kosuke MatsunagaHiroyuki KanaiShinichiro Fujita
    • G06F13/38G06F13/42H04L12/28H04L12/40H04L12/64
    • H04L12/40123G06F13/4291
    • The objective of the present invention is to provide a data transfer control device, information storage medium, and electronic equipment that can relieve the inconveniences caused whenever a reset that clears node topology information occurs. If a bus reset occurs during a data transfer period in a data transfer control device in accordance with the IEEE 1394 standard, and also the content of ORBs before and after the bus reset is the same, data transfer restarts from a resumption at the point at which the bus reset occurred, thus preventing duplicate printing in a printer. Whenever a bus reset occurs during a data transfer period, the continuation flag is set to on. The first command block ORB comprising a print command that transferred in after the bus reset is used in the comparison with the pre-bus-reset ORB. When no ACK is returned from the initiator because of a bus reset, a transition to a dead state occurs. The part of transfer data from a scanner that has not yet been transferred to the initiator at point at which the bus reset occurred is retained without being destroyed.
    • 本发明的目的是提供一种数据传输控制设备,信息存储介质和电子设备,其可以减轻每当清除节点拓扑信息的复位发生时引起的不便。 如果在根据IEEE 1394标准的数据传输控制装置中的数据传送期间发生总线复位,并且总线复位之前和之后的ORB的内容相同,则数据传输从在 发生总线复位,从而防止打印机中的重复打印。 无论何时在数据传输期间发生总线复位,继续标志设置为开。 在与总线复位ORB进行比较之后,使用包含总线复位后传送的打印命令的第一命令块ORB。 当由于总线复位而没有从启动器返回ACK时,就会发生到死区的转换。 来自扫描仪的传送数据的一部分在尚未被破坏的情况下被保留,该扫描仪尚未被传送到启动器。
    • 10. 发明申请
    • Impact-resistant cyclic olefin based resin composition and mouldings
    • 耐冲击环烯烃基树脂组合物和模塑制品
    • US20050014898A1
    • 2005-01-20
    • US10493104
    • 2002-10-21
    • Hiroyuki Kanai
    • Hiroyuki Kanai
    • C08J5/00C08L23/08C08L23/16C08L45/00C08L51/06C08K5/07
    • C08L23/0823C08L23/0884C08L23/16C08L45/00C08L2205/02C08L2666/06C08L2666/24C08L23/00C08L23/26
    • A cyclic olefin based resin composition which includes: a cyclic olefin based resin (A); a modified cyclic olefin based resin (B) prepared by grafting and/or copolymerizing an unsaturated carboxylic acid or an unsaturated carboxylic acid anhydride to the cyclic olefin based resin (A); an olefinic elastomer (C); and a modified polyolefin (D) having an epoxy group, and in which a weight ratio of the component A to the component B, i.e. A/B, is in the range of 98/2 to 2/98, a weight ratio of the component C to the component D, i.e. C/D, is in the range of 98/2 to 2/98, and a ratio of the total weight of components A and B to the total weight of components C and D, i.e. (A+B)/(C+D), is in the range of 95/5 to 50/50. A molding composed of the cyclic olefin based resin composition is excellent in impact resistance, resistance to flaking off, and the like.
    • 一种环状烯烃系树脂组合物,其包含:环状烯烃系树脂(A); 通过将不饱和羧酸或不饱和羧酸酐与环状烯烃系树脂(A)接枝和/或共聚而成的改性环烯烃系树脂(B) 烯烃弹性体(C); 和具有环氧基的改性聚烯烃(D),其中组分A与组分B的重量比(即A / B)在98/2至2/98的范围内,重量比为 组分C至组分D即C / D在98/2至2/98范围内,组分A和B的总重量与组分C和D的总重量之比即(A + B)/(C + D),在95/5〜50/50的范围内。 由环状烯烃系树脂组合物构成的成型体的耐冲击性,耐剥离性等优异。