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1. 发明授权

US08334553B2 Top gate thin-film transistor, display device, and electronic apparatus 有权
标题翻译：顶栅薄膜晶体管，显示器件和电子设备
公开(公告)号：US08334553B2
公开(公告)日：2012-12-18
申请号：US13026683
申请日：2011-02-14
申请人： Shigeru Mori , Takahiro Korenari , Hiroshi Tanabe
发明人： Shigeru Mori , Takahiro Korenari , Hiroshi Tanabe
IPC分类号： H01L31/062
CPC分类号： H01L33/58 , H01L29/7833 , H01L29/78621 , H01L29/78633
摘要： A thin-film transistor manufactured on a transparent substrate has a structure of a top gate type crystalline silicon thin-film transistor in which a light blocking film, a base layer, a crystalline silicon film, a gate insulating film, and a gate electrode film arranged not to overlap at least a channel region are sequentially formed on the transparent substrate. The channel region has channel length L, LDD regions having LDD length d on both sides of the channel region, a source region, and a drain region are formed in the crystalline silicon film. The light blocking film is divided across the channel region. Interval x between the divided light blocking films is equal to or larger than channel length L and equal to or smaller than a sum of channel length L and a double of LDD length d (L+2d), allowing low the manufacturing cost and suppressed photo leak current.
摘要翻译：制造在透明基板上的薄膜晶体管具有顶栅型晶体硅薄膜晶体管的结构，其中遮光膜，基底层，晶体硅膜，栅极绝缘膜和栅极电极膜排列成不重叠的至少一个沟道区域依次形成在透明基板上。沟道区具有沟道长度L，在晶体硅膜中形成在沟道区两侧具有LDD长度d的LDD区，源区和漏区。遮光膜在通道区域上分开。分割的遮光膜之间的间隔x等于或大于沟道长度L，并且等于或小于沟道长度L的和和LDD长度d（L + 2d）的两倍，从而允许低的制造成本和抑制的照片泄漏电流。

2. 发明授权

US07981811B2 Semiconductor device and method for manufacturing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07981811B2
公开(公告)日：2011-07-19
申请号：US12508888
申请日：2009-07-24
申请人： Shigeru Mori , Takahiro Korenari , Tadahiro Matsuzaki , Hiroshi Tanabe
发明人： Shigeru Mori , Takahiro Korenari , Tadahiro Matsuzaki , Hiroshi Tanabe
IPC分类号： H01L21/31
CPC分类号： H01L29/78621 , H01L29/66757
摘要： A base layer is formed on an insulating substrate, and a semiconductor layer is formed in localized fashion thereon. A gate insulating film is then formed so as to cover the semiconductor layer, and a gate electrode is formed on a portion of the gate insulating film. An impurity is then implanted into the semiconductor layer via the gate insulating film, and a source region, a drain region, and an LDD region are formed. The gate insulating film is etched with dilute hydrofluoric acid. An electrode-protecting insulating film is then formed so as to cover the gate electrode, and the entire surface of the surface layer portion of the electrode-protecting insulating film is etched away using dilute hydrofluoric acid. Carrier traps introduced into the electrode-protecting insulating film and the gate insulating film are thereby removed.
摘要翻译：在绝缘基板上形成基底层，以局部方式形成半导体层。然后形成栅极绝缘膜以覆盖半导体层，并且栅极电极形成在栅极绝缘膜的一部分上。然后通过栅极绝缘膜将杂质注入到半导体层中，形成源极区，漏极区和LDD区。用稀氢氟酸蚀刻栅极绝缘膜。然后形成电极保护绝缘膜以覆盖栅电极，并且使用稀氢氟酸腐蚀掉电极保护绝缘膜的表面层部分的整个表面。因此，引入到电极保护绝缘膜和栅极绝缘膜中的载流子阱被去除。

3. 发明授权

US08242553B2 Thin film transistor substrate and thin film transistor used for the same 有权
标题翻译：薄膜晶体管基板和薄膜晶体管用于相同
公开(公告)号：US08242553B2
公开(公告)日：2012-08-14
申请号：US12838954
申请日：2010-07-19
申请人： Takahiro Korenari , Hiroshi Tanabe
发明人： Takahiro Korenari , Hiroshi Tanabe
IPC分类号： H01L29/76
CPC分类号： H01L27/1251 , H01L27/1214 , H01L29/78645 , H01L29/78648 , H01L29/7869 , H01L29/78696
摘要： A thin film transistor (TFT) substrate includes first and second TFTs on the same substrate. The first TFT has a feature that a lower conductive layer or a bottom gate electrode layer is provided between the substrate and a first insulating layer while an upper conductive layer or a top gate electrode layer is disposed on a second insulating layer formed on a semiconductor layer which is formed on the first insulating layer. The first conductive layer has first and second areas such that the first area overlaps with the first conductive layer without overlapping with the semiconductor layer while the second area overlaps with the semiconductor layer, and the first area is larger than the second area while the second insulating layer is thinner than the first insulating layer. The second TFT has the same configuration as the first TFT except that the gate electrode layer is eliminated.
摘要翻译：薄膜晶体管（TFT）基板在同一基板上包括第一和第二TFT。第一TFT具有在基板和第一绝缘层之间设置下导电层或底栅极电极层的特征，而上导电层或顶栅电极层设置在形成于半导体层上的第二绝缘层上其形成在第一绝缘层上。第一导电层具有第一和第二区域，使得第一区域与第一导电层重叠而不与半导体层重叠，而第二区域与半导体层重叠，并且第一区域大于第二区域，而第二绝缘层层比第一绝缘层薄。除了除去栅电极层之外，第二TFT具有与第一TFT相同的结构。

4. 发明授权

US07582933B2 Transistor with electrode-protecting insulating film 有权
标题翻译：具有电极保护绝缘膜的晶体管
公开(公告)号：US07582933B2
公开(公告)日：2009-09-01
申请号：US11483561
申请日：2006-07-11
申请人： Shigeru Mori , Takahiro Korenari , Tadahiro Matsuzaki , Hiroshi Tanabe
发明人： Shigeru Mori , Takahiro Korenari , Tadahiro Matsuzaki , Hiroshi Tanabe
IPC分类号： H01L29/772
CPC分类号： H01L29/78621 , H01L29/66757
摘要： A base layer is formed on an insulating substrate, and a semiconductor layer is formed in localized fashion thereon. A gate insulating film is then formed so as to cover the semiconductor layer, and a gate electrode is formed on a portion of the gate insulating film. An impurity is then implanted into the semiconductor layer via the gate insulating film, and a source region, a drain region, and an LDD region are formed. The gate insulating film is etched with dilute hydrofluoric acid. An electrode-protecting insulating film is then formed so as to cover the gate electrode, and the entire surface of the surface layer portion of the electrode-protecting insulating film is etched away using dilute hydrofluoric acid. Carrier traps introduced into the electrode-protecting insulating film and the gate insulating film are thereby removed.
摘要翻译：在绝缘基板上形成基底层，以局部方式形成半导体层。然后形成栅极绝缘膜以覆盖半导体层，并且栅极电极形成在栅极绝缘膜的一部分上。然后通过栅极绝缘膜将杂质注入到半导体层中，形成源极区，漏极区和LDD区。用稀氢氟酸蚀刻栅极绝缘膜。然后形成电极保护绝缘膜以覆盖栅电极，并且使用稀氢氟酸腐蚀掉电极保护绝缘膜的表面层部分的整个表面。因此，引入到电极保护绝缘膜和栅极绝缘膜中的载流子阱被去除。

5. 发明授权

US07633571B2 Thin-film transistor with semiconductor layer and off-leak current characteristics 失效
标题翻译：具有半导体层和漏电流特性的薄膜晶体管
公开(公告)号：US07633571B2
公开(公告)日：2009-12-15
申请号：US11029405
申请日：2005-01-06
申请人： Takahiro Korenari , Hiroshi Tanabe , Nobuya Seko
发明人： Takahiro Korenari , Hiroshi Tanabe , Nobuya Seko
IPC分类号： G02F1/136
CPC分类号： G02F1/1368 , H01L27/12 , H01L29/78609 , H01L29/78621 , H01L29/78645
摘要： Recognizing the phenomenon that the film thickness of a semiconductor layer causes shift in the OFF-leak current characteristic that corresponds to back-gate voltage of a thin-film transistor, the average film thickness of a semiconductor layer is prescribed such that the shift of the OFF-leak current characteristic is reduced. Alternatively, the film thickness distribution (the ratio of the occurrence of each region having different film thickness) in the direction of the channel width of the semiconductor layer is prescribed.
摘要翻译：认识到半导体层的膜厚导致与薄膜晶体管的背栅极电压相对应的OFF漏电流特性偏移的现象，规定半导体层的平均膜厚，使得泄漏电流特性降低。或者，规定半导体层的沟道宽度方向的膜厚分布（膜厚不同的区域的出现比例）。

6. 发明申请

US20070012924A1 Semiconductor device and method for manufacturing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070012924A1
公开(公告)日：2007-01-18
申请号：US11483561
申请日：2006-07-11
申请人： Shigeru Mori , Takahiro Korenari , Tadahiro Matsuzaki , Hiroshi Tanabe
发明人： Shigeru Mori , Takahiro Korenari , Tadahiro Matsuzaki , Hiroshi Tanabe
IPC分类号： H01L29/76
CPC分类号： H01L29/78621 , H01L29/66757
摘要： A base layer is formed on an insulating substrate, and a semiconductor layer is formed in localized fashion thereon. A gate insulating film is then formed so as to cover the semiconductor layer, and a gate electrode is formed on a portion of the gate insulating film. An impurity is then implanted into the semiconductor layer via the gate insulating film, and a source region, a drain region, and an LDD region are formed. The gate insulating film is etched with dilute hydrofluoric acid. An electrode-protecting insulating film is then formed so as to cover the gate electrode, and the entire surface of the surface layer portion of the electrode-protecting insulating film is etched away using dilute hydrofluoric acid. Carrier traps introduced into the electrode-protecting insulating film and the gate insulating film are thereby removed.
摘要翻译：在绝缘基板上形成基底层，以局部方式形成半导体层。然后形成栅极绝缘膜以覆盖半导体层，并且栅极电极形成在栅极绝缘膜的一部分上。然后通过栅极绝缘膜将杂质注入到半导体层中，形成源极区，漏极区和LDD区。用稀氢氟酸蚀刻栅极绝缘膜。然后形成电极保护绝缘膜以覆盖栅电极，并且使用稀氢氟酸腐蚀掉电极保护绝缘膜的表面层部分的整个表面。因此，引入到电极保护绝缘膜和栅极绝缘膜中的载流子阱被去除。

7. 发明申请

US20050212987A1 Thin-film transistor 失效
标题翻译：薄膜晶体管
公开(公告)号：US20050212987A1
公开(公告)日：2005-09-29
申请号：US11029405
申请日：2005-01-06
申请人： Takahiro Korenari , Hiroshi Tanabe , Nobuya Seko
发明人： Takahiro Korenari , Hiroshi Tanabe , Nobuya Seko
IPC分类号： G02F1/136 , G02F1/1368 , H01L21/336 , H01L27/12 , H01L29/786
CPC分类号： G02F1/1368 , H01L27/12 , H01L29/78609 , H01L29/78621 , H01L29/78645
摘要： Recognizing the phenomenon that the film thickness of a semiconductor layer causes shift in the OFF-leak current characteristic that corresponds to back-gate voltage of a thin-film transistor, the average film thickness of a semiconductor layer is prescribed such that the shift of the OFF-leak current characteristic is reduced. Alternatively, the film thickness distribution (the ratio of the occurrence of each region having different film thickness) in the direction of the channel width of the semiconductor layer is prescribed.
摘要翻译：认识到半导体层的膜厚导致与薄膜晶体管的背栅极电压相对应的OFF漏电流特性偏移的现象，规定半导体层的平均膜厚，使得泄漏电流特性降低。或者，规定半导体层的沟道宽度方向的膜厚分布（膜厚不同的区域的出现比例）。

8. 发明授权

US09397242B2 Silicon substrate having textured surface, and process for producing same 有权
标题翻译：具有纹理表面的硅衬底及其制造方法
公开(公告)号：US09397242B2
公开(公告)日：2016-07-19
申请号：US14006357
申请日：2012-03-28
申请人： Yasushi Taniguchi , Shigeru Sankawa, Sr. , Kouji Arai , Hiroshi Tanabe , Ichiro Nakayama , Naoshi Yamaguchi
发明人： Yasushi Taniguchi , Shigeru Sankawa, Sr. , Kouji Arai , Hiroshi Tanabe , Ichiro Nakayama , Naoshi Yamaguchi
IPC分类号： H01L31/0236 , H01L21/306 , H01L29/04
CPC分类号： H01L31/02363 , H01L21/30604 , H01L29/045 , Y02E10/50
摘要： The present invention addresses the problem of providing a novel silicon substrate having a textured surface by dry-etching the surface of a silicon substrate having (111) orientation and thereby forming a texture thereon. The present invention provides a silicon substrate having (111) orientation, said silicon substrate having a textured surface that includes multiple protrusions which each comprise three slant faces and have heights of 100 to 8000 nm. This process for producing a silicon substrate includes: a step of preparing a silicon substrate having (111) orientation; and a step of blowing an etching gas onto the surface of the silicon substrate, said etching gas containing one or more gases selected from the group consisting of ClF3, XeF2, BrF3, BrF5 and NF3.
摘要翻译：本发明解决了通过干法蚀刻具有（111）取向的硅衬底的表面从而在其上形成纹理来提供具有纹理表面的新型硅衬底的问题。本发明提供具有（111）取向的硅衬底，所述硅衬底具有纹理化表面，其包括多个突起，每个突出部包括三个倾斜面并且具有100至8000nm的高度。该制造硅衬底的工艺包括：制备具有（111）取向的硅衬底的步骤; 以及将蚀刻气体吹送到硅衬底的表面上的步骤，所述蚀刻气体含有选自ClF 3，XeF 2，BrF 3，BrF 5和NF 3中的一种或多种气体。

9. 发明授权

US08899047B2 Gas turbine power plant having fuel heating means 有权
标题翻译：具有燃料加热装置的燃气轮机发电厂
公开(公告)号：US08899047B2
公开(公告)日：2014-12-02
申请号：US13163942
申请日：2011-06-20
申请人： Hiroshi Tanabe , Eiki Anzawa
发明人： Hiroshi Tanabe , Eiki Anzawa
IPC分类号： F02C1/00 , F02G3/00 , F02C3/20 , F02C7/22 , F02C7/224
CPC分类号： F02C3/20 , F02C7/22 , F02C7/224 , F05D2220/75 , F05D2260/15
摘要： Provided is a power plant including a gas turbine that uses a fuel gas as a fuel; a fuel gas cooler that cools the fuel gas, which is to be pressurized in a fuel gas compressor and re-circulated, using cooling water; and a dust collection device that separates/removes impurities from the fuel gas that is to be guided to the fuel gas compressor; wherein the power plant further includes heating means that heats the fuel gas that is to be guided to the dust collection device using the fuel gas that has been used to generate an anti-thrust force acting on a rotor of the fuel gas compressor.
摘要翻译：提供了一种发电厂，其包括使用燃料气体作为燃料的燃气轮机; 燃料气体冷却器，其使用冷却水冷却在燃料气体压缩机中被加压并再循环的燃料气体; 以及从要被引导到燃料气体压缩机的燃料气体分离/去除杂质的集尘装置; 其特征在于，所述动力装置还包括加热装置，其利用已经用于产生作用在所述燃料气体压缩机的转子上的抗推力的燃料气加热要被引导到所述集尘装置的燃料气体。

10. 发明授权

US08330193B2 Silicon oxide film, production method therefor and semiconductor device having gate insulation film using the same 有权
标题翻译：氧化硅膜及其制造方法以及使用其的具有栅极绝缘膜的半导体器件
公开(公告)号：US08330193B2
公开(公告)日：2012-12-11
申请号：US12131249
申请日：2008-06-02
申请人： Shigeru Mori , Hiroshi Tanabe , Jun Tanaka
发明人： Shigeru Mori , Hiroshi Tanabe , Jun Tanaka
IPC分类号： H01L29/76
CPC分类号： H01L29/4908
摘要： The present invention provides a high-performance silicon oxide film as a gate insulation film and a semiconductor device having superior electric characteristics. The silicon oxide film according to the present invention includes CO2 in the film, wherein, when an integrated intensity of a peak is expressed by (peak width at half height)×(peak height) in an infrared absorption spectrum, the integrated intensity of a CO2-attributed peak which appears in the vicinity of a wave number of 2,340 cm−1 is 8E-4 times or more with respect to the integrated intensity of an SiO2-attributed peak which appears in the vicinity of a wave number of 1,060 cm−1.
摘要翻译：本发明提供一种作为栅绝缘膜的高性能氧化硅膜和具有优异电特性的半导体器件。根据本发明的氧化硅膜包括膜中的CO 2，其中当红外吸收光谱中的峰值的积分强度（半高峰宽度）×（峰高））表示的积分强度时，出现在2,340cm-1波数附近的二氧化碳归属峰相对于在1,060cm -1的波数附近出现的SiO 2归属峰的积分强度为8E-4倍以上， 1。

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