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    • 1. 发明申请
    • ANALOG/DIGITAL CONVERTER AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    • 模拟/数字转换器和半导体集成电路器件
    • US20130049999A1
    • 2013-02-28
    • US13338338
    • 2011-12-28
    • TAKASHI OSHIMATaizo YamawakiTomomi Takahashi
    • TAKASHI OSHIMATaizo YamawakiTomomi Takahashi
    • H03M1/10
    • H03M1/1009H03M1/00H03M1/0695H03M1/1028H03M1/12H03M1/1215H03M1/804
    • A reference A/D conversion unit is connected in parallel to an input common to a time-interleaved A/D converter to be a calibration target, and the output of each unitary A/D conversion unit which makes up the time-interleaved A/D converter is calibrated in a digital region by using a low-speed high-resolution A/D conversion result output from the reference A/D conversion unit. Also, fCLK/N (fCLK represents an overall sampling rate of the time-interleaved A/D converter, and N is relatively prime to the number of unitary A/D conversion units connected in parallel M) is set as the operation clock frequency of the reference A/D conversion unit. Samplings of all unitary A/D conversion units can be sequentially synchronized with the sampling of the reference A/D conversion unit, and the operation clock frequency of the reference A/D converter can be made N times slower than the overall sampling rate of the time-interleaved A/D converter.
    • 参考A / D转换单元并联连接到时间交织的A / D转换器的公共端作为校准对象,并且构成时间交织的A / D转换单元的每个单位A / D转换单元的输出, D转换器通过使用从参考A / D转换单元输出的低速高分辨率A / D转换结果在数字区域进行校准。 另外,fCLK / N(fCLK表示时间交织的A / D转换器的总体采样率,N是并行连接的单位A / D转换单元的数量的N相对于M)被设定为操作时钟频率 参考A / D转换单元。 所有单位A / D转换单元的采样可以与参考A / D转换单元的采样顺序同步,并且参考A / D转换器的工作时钟频率可以比总的采样率慢 时间交织的A / D转换器。
    • 2. 发明申请
    • TRANSCEIVER
    • 收发器
    • US20120069876A1
    • 2012-03-22
    • US13238249
    • 2011-09-21
    • Hiroshi KamizumaSatoshi TanakaTaizo YamawakiYukinori AkamineKoji Maeda
    • Hiroshi KamizumaSatoshi TanakaTaizo YamawakiYukinori AkamineKoji Maeda
    • H04B1/38
    • H04B1/0082
    • A transceiver includes an oscillator and a plurality of communication blocks. Each of the communication blocks includes frequency dividers and mixers. Frequency dividing number of the frequency divider included in one communication block is set to an even-numbered integer, and transmission local signals supplied from the frequency dividers to the mixer become quadrature signals having a phase difference of 90 degrees. The frequency dividing number of another frequency divider in the another communication block is set to a non-integer, and communication local signals supplied from the frequency divider to the mixers become non-quadrature signals having a phase difference at a predetermined offset angle from 90 degrees. The transceiver further includes a converting unit for giving a compensation offset amount having almost the same absolute value and having a polarity opposite to that of the offset angle to communication analog signals related to the mixer of the another communication block.
    • 收发机包括振荡器和多个通信块。 每个通信块包括分频器和混频器。 包含在一个通信块中的分频器的分频数被设置为偶数整数,并且从分频器提供给混频器的发送本地信号变为具有90度相位差的正交信号。 将另一通信块中的另一个分频器的分频数设置为非整数,并且从分频器提供给混频器的通信本地信号变为具有从90度的预定偏移角的相位差的非正交信号 。 收发器还包括转换单元,用于给出具有与相对于另一通信块的混频器相关的通信模拟信号具有几乎相同的绝对值并且具有与偏移角的极性相反的极性的补偿偏移量。
    • 4. 发明申请
    • TRANSCEIVER
    • 收发器
    • US20090156135A1
    • 2009-06-18
    • US12336178
    • 2008-12-16
    • Hiroshi KamizumaSatoshi TanakaTaizo YamawakiYukinori AkamineKoji Maeda
    • Hiroshi KamizumaSatoshi TanakaTaizo YamawakiYukinori AkamineKoji Maeda
    • H04B1/38H04B1/16
    • H04B1/0082
    • A transceiver includes an oscillator and a plurality of communication blocks. Each of the communication blocks includes frequency dividers and mixers. Frequency dividing number of the frequency divider included in one communication block is set to an even-numbered integer, and transmission local signals supplied from the frequency dividers to the mixer become quadrature signals having a phase difference of 90 degrees. The frequency dividing number of another frequency divider in the another communication block is set to a non-integer, and communication local signals supplied from the frequency divider to the mixers become non-quadrature signals having a phase difference at a predetermined offset angle from 90 degrees. The transceiver further includes a converting unit for giving a compensation offset amount having almost the same absolute value and having a polarity opposite to that of the offset angle to communication analog signals related to the mixer of the another communication block. Increase in the number of voltage-controlled oscillators for multiband communication, broadening of the band, and increase in phase noise can be reduced.
    • 收发机包括振荡器和多个通信块。 每个通信块包括分频器和混频器。 包含在一个通信块中的分频器的分频数被设置为偶数整数,并且从分频器提供给混频器的发送本地信号变为具有90度相位差的正交信号。 将另一通信块中的另一个分频器的分频数设置为非整数,并且从分频器提供给混频器的通信本地信号变为具有从90度的预定偏移角的相位差的非正交信号 。 收发器还包括转换单元,用于给出具有与相对于另一通信块的混频器相关的通信模拟信号具有几乎相同的绝对值并且具有与偏移角的极性相反的极性的补偿偏移量。 可以减少用于多频带通信的压控振荡器的数量的增加,频带的扩大以及相位噪声的增加。
    • 7. 发明申请
    • INTEGRATED CIRCUIT AND DEVICE FOR MOBILE COMMUNICATIONS
    • 集成电路和移动通信装置
    • US20080113625A1
    • 2008-05-15
    • US11940733
    • 2007-11-15
    • Koji MaedaSatoshi TanakaTaizo YamawakiYukinori AkamineMasahiro Ito
    • Koji MaedaSatoshi TanakaTaizo YamawakiYukinori AkamineMasahiro Ito
    • H04B17/00
    • H04B1/30
    • When generating an RF test signal for mismatch calibration for receiver in order to calibrate reception mismatch of an I-phase signal and a Q-phase signal that are output from demodulated signal processing circuits coupled to mixers for receiving, a Tx VCO avoids covering the higher frequency of an RF received signal in an FDD system. An RF test signal generating unit generates, in a calibration mode of a mismatch calibration for receiver circuit, the RF test signal by using an oscillation output signal of the Tx VCO and other circuits, and supplies the same to the mixers for receiving via a switch. The RF test signal has a frequency within an RF reception frequency band that is higher than that of an RF transmission signal with the maximum frequency band of multiband radio frequency communications. By switching the switch in a reception mode, an output of a low-noise amplifier that amplifies the RF received signal received by an antenna is supplied to each of the mixers for receiving.
    • 为了校准从耦合到混频器进行接收的解调信号处理电路输出的I相信号和Q相信号的接收不匹配,为接收机生成用于失配校准的RF测试信号时,Tx VCO避免覆盖较高的 FDD系统中RF接收信号的频率。 RF测试信号产生单元通过使用Tx VCO和其它电路的振荡输出信号在接收机电路的不匹配校准的校准模式中产生RF测试信号,并将其提供给用于经由开关接收的混频器 。 RF测试信号具有比具有多频带无线电频率通信的最大频带的RF传输信号的RF接收频带内的频率。 通过在接收模式下切换开关,将放大天线接收到的RF接收信号的低噪声放大器的输出提供给每个混频器进行接收。
    • 10. 发明授权
    • Direct-conversion transmitter circuit and transceiver system
    • 直接转换发射机电路和收发器系统
    • US07194242B2
    • 2007-03-20
    • US10739282
    • 2003-12-19
    • Satoshi TanakaTaizo YamawakiKazuaki HoriKazuo Watanabe
    • Satoshi TanakaTaizo YamawakiKazuaki HoriKazuo Watanabe
    • H04B1/04H03G3/20
    • H03D3/007H03C3/40H04B1/30
    • Disclosed is a direct conversion type transmitter or transceiver circuit suitable for a mobile communication device which corresponds to broad signal output level variable width to be required by W-CDMA, which does not necessitate any high-performance low noise VCO and RF filter, capable of reducing a number of components and the cost. In the input portion of an orthogonal modulator composed of a divider, mixers, and a common load, there are provided variable attenuators. If an input signal level of the orthogonal modulator within the transmitter circuit lowers, this variable attenuator circuit is operated so as to lower the bias of the orthogonal modulator to reduce the amount of occurrence of carrier leak, and to prevent the signal during low output level and carrier leak ratio from being deteriorated. The direct conversion transmitter circuit is capable of easily realizing output level variable width of 70 dB or higher and reducing a variable amount in the high frequency circuit in which it is difficult to secure the variable gain width.
    • 公开了一种适用于移动通信设备的直接转换型发射器或收发器电路,其对应于由W-CDMA所要求的宽信号输出电平可变宽度,其不需要任何高性能低噪声VCO和RF滤波器,其能够 减少了一些组件和成本。 在由分频器,混频器和公共负载组成的正交调制器的输入部分中,提供可变衰减器。 如果发射机电路内的正交调制器的输入信号电平降低,则该可变衰减器电路被工作,以降低正交调制器的偏置,以减少载波泄漏的发生量,并且防止在低输出电平期间的信号 并且载体泄漏率不劣化。 直接变换发送电路能够容易地实现70dB以上的输出电平可变宽度,并且在难以确保可变增益宽度的高频电路中减少可变量。