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1. 发明申请

US20100091579A1 NON-VOLATILE SEMICONDUCTOR MEMORY APPARATUS 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20100091579A1
公开(公告)日：2010-04-15
申请号：US12346646
申请日：2008-12-30
申请人： Tae Su Jang , Sung Joo Hong , Sung Woong Chung
发明人： Tae Su Jang , Sung Joo Hong , Sung Woong Chung
IPC分类号： G11C7/00
CPC分类号： G11C11/404 , G11C8/10 , G11C11/005 , G11C13/0004 , G11C2211/4016
摘要： A non-volatile semiconductor memory apparatus includes a first memory area configured to include a plurality of non-volatile memory cells, a second memory area configured to include a plurality of memory cells whose write speed is faster than the plurality of non-volatile memory cells, and a host interface configured to control the first and second memory areas, wherein the first and second memory areas are configured to be provided with the same address signal and command signal from the host interface.
摘要翻译：一种非易失性半导体存储装置，包括被配置为包括多个非易失性存储单元的第一存储区域，第二存储区域，被配置为包括写入速度比多个非易失性存储单元更快的多个存储单元以及被配置为控制第一和第二存储器区域的主机接口，其中第一和第二存储器区域被配置为从主机接口提供相同的地址信号和命令信号。

2. 发明授权

US08325541B2 Non-volatile semiconductor memory apparatus 有权
标题翻译：非易失性半导体存储装置
公开(公告)号：US08325541B2
公开(公告)日：2012-12-04
申请号：US12346646
申请日：2008-12-30
申请人： Tae Su Jang , Sung Joo Hong , Sung Woong Chung
发明人： Tae Su Jang , Sung Joo Hong , Sung Woong Chung
IPC分类号： G11C7/00
CPC分类号： G11C11/404 , G11C8/10 , G11C11/005 , G11C13/0004 , G11C2211/4016
摘要： A non-volatile semiconductor memory apparatus includes a first memory area configured to include a plurality of non-volatile memory cells, a second memory area configured to include a plurality of memory cells whose write speed is faster than the plurality of non-volatile memory cells, and a host interface configured to control the first and second memory areas, wherein the first and second memory areas are configured to be provided with the same address signal and command signal from the host interface.
摘要翻译：一种非易失性半导体存储装置，包括被配置为包括多个非易失性存储单元的第一存储区域，第二存储区域，被配置为包括写入速度比多个非易失性存储单元更快的多个存储单元以及被配置为控制第一和第二存储器区域的主机接口，其中第一和第二存储器区域被配置为从主机接口提供相同的地址信号和命令信号。

3. 发明申请

US20090298242A1 METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20090298242A1
公开(公告)日：2009-12-03
申请号：US12327362
申请日：2008-12-03
申请人： Joong Sik Kim , Sung Woong Chung
发明人： Joong Sik Kim , Sung Woong Chung
IPC分类号： H01L21/336
CPC分类号： H01L29/7841 , H01L27/108 , H01L27/10802
摘要： Disclosed herein is a method for manufacturing a semiconductor device that includes forming a gate pattern on a substrate having a stacked structure including a lower silicon layer, an insulating layer, and an upper silicon layer. The method further includes forming spacers on sidewalls of the gate pattern. Still further, the method includes etching the upper silicon layer using the gate pattern as a mask to form a floating body and expose a portion of the insulating layer. The method further includes depositing a conductive layer over the gate pattern and exposed insulating layer, and performing a thermal process on the conductive layer to form a source/drain region in the floating body.
摘要翻译：本文公开了一种半导体器件的制造方法，其包括在具有下硅层，绝缘层和上硅层的层叠结构的基板上形成栅极图案。该方法还包括在栅极图案的侧壁上形成间隔物。此外，该方法包括使用栅极图案作为掩模蚀刻上硅层，以形成浮体并暴露绝缘层的一部分。该方法还包括在栅极图案和暴露的绝缘层上沉积导电层，以及在导电层上执行热处理以在浮体中形成源极/漏极区域。

4. 发明授权

US07615449B2 Semiconductor device having a recess channel transistor 失效
标题翻译：具有凹槽通道晶体管的半导体器件
公开(公告)号：US07615449B2
公开(公告)日：2009-11-10
申请号：US11529420
申请日：2006-09-29
申请人： Sung Woong Chung , Sang Don Lee
发明人： Sung Woong Chung , Sang Don Lee
IPC分类号： H01L29/94 , H01L29/78
CPC分类号： H01L29/66621 , H01L27/10876
摘要： The semiconductor device having a recess channel transistor includes a device isolation structure formed in a semiconductor substrate to define an active region having a recess region at a lower part of sidewalls thereof and a recess channel region formed in the semiconductor substrate under the active region. A method for fabricating the semiconductor device includes forming a device isolation structure in a semiconductor substrate to form an active region having a recess region at a lower part of sidewalls thereof, a gate insulating film formed over the semiconductor substrate including the recess channel region, and a gate electrode formed over the gate insulating film to fill up the recess channel region.
摘要翻译：具有凹陷沟道晶体管的半导体器件包括形成在半导体衬底中的器件隔离结构，以限定其侧壁下部具有凹陷区域的有源区域和在有源区域下形成在半导体衬底中的凹槽沟道区域。一种制造半导体器件的方法包括：在半导体衬底中形成器件隔离结构，以形成在其侧壁的下部具有凹陷区域的有源区，形成在包括凹槽沟道区域的半导体衬底上的栅极绝缘膜，以及形成在所述栅极绝缘膜上方以填充所述凹陷沟道区域的栅电极。

5. 发明申请

US20070252199A1 Semiconductor device having a recess channel transistor 失效
标题翻译：具有凹槽通道晶体管的半导体器件
公开(公告)号：US20070252199A1
公开(公告)日：2007-11-01
申请号：US11529420
申请日：2006-09-29
申请人： Sung Woong Chung , Sang Don Lee
发明人： Sung Woong Chung , Sang Don Lee
IPC分类号： H01L29/94
CPC分类号： H01L29/66621 , H01L27/10876
摘要： The semiconductor device having a recess channel transistor includes a device isolation structure formed in a semiconductor substrate to define an active region having a recess region at a lower part of sidewalls thereof and a recess channel region formed in the semiconductor substrate under the active region. A method for fabricating the semiconductor device includes forming a device isolation structure in a semiconductor substrate to form an active region having a recess region at a lower part of sidewalls thereof, a gate insulating film formed over the semiconductor substrate including the recess channel region, and a gate electrode formed over the gate insulating film to fill up the recess channel region.
摘要翻译：具有凹陷沟道晶体管的半导体器件包括形成在半导体衬底中的器件隔离结构，以限定其侧壁下部具有凹陷区域的有源区域和在有源区域下形成在半导体衬底中的凹槽沟道区域。一种制造半导体器件的方法包括：在半导体衬底中形成器件隔离结构，以形成在其侧壁的下部具有凹陷区域的有源区，形成在包括凹槽沟道区域的半导体衬底上的栅极绝缘膜，以及形成在所述栅极绝缘膜上方以填充所述凹陷沟道区域的栅电极。

6. 发明授权

US08159871B2 Magnetoresistive memory cell using floating body effect, memory device having the same, and method of operating the memory device 有权
标题翻译：使用浮体效应的磁阻存储单元，具有相同的存储器件，以及操作存储器件的方法
公开(公告)号：US08159871B2
公开(公告)日：2012-04-17
申请号：US12507222
申请日：2009-07-22
申请人： Sung Woong Chung
发明人： Sung Woong Chung
IPC分类号： G11C11/15
CPC分类号： G11C13/003 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C2213/79 , H01L27/1203 , H01L27/228 , H01L29/7841
摘要： A magnetoresistive memory cell includes an MTJ device and a select transistor. The select transistor includes a first conduction-type semiconductor layer, a gate electrode formed by disposing a gate insulating layer on top of the semiconductor layer, and first and second diffusion regions formed in the semiconductor layer to be spaced apart from each other and to have a second conduction type. A part of the semiconductor layer between the first and second diffusion regions is formed as an electrically floating body region. By using a high-performance select transistor with a floating body effect, high integration of a magnetoresistive memory device may be achieved.
摘要翻译：磁阻存储单元包括MTJ器件和选择晶体管。选择晶体管包括第一导电型半导体层，通过在半导体层的顶部上设置栅极绝缘层而形成的栅电极以及形成在半导体层中彼此间隔开的第一和第二扩散区域，并且具有第二导电类型。第一和第二扩散区域之间的半导体层的一部分形成为电浮体区域。通过使用具有浮体效应的高性能选择晶体管，可以实现磁阻存储器件的高集成度。

7. 发明申请

US20120061760A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20120061760A1
公开(公告)日：2012-03-15
申请号：US13296919
申请日：2011-11-15
申请人： Joong Sik Kim , Sung Woong Chung
发明人： Joong Sik Kim , Sung Woong Chung
IPC分类号： H01L29/772
CPC分类号： H01L29/785 , H01L29/66795
摘要： A method for manufacturing a semiconductor device comprises including a insulating pattern and a silicon film over a SOI substrate, thereby increasing a reduced volume of a floating body after forming a floating body fin transistor so as to secure a data storage space. The method comprises: forming a insulating pattern and a first silicon film over an upper silicon film of a SOI substrate; and forming a fin structure in the first silicon film.
摘要翻译：一种制造半导体器件的方法包括在SOI衬底上包括绝缘图案和硅膜，从而在形成浮体鳍式晶体管之后增加浮体的体积减小以确保数据存储空间。该方法包括：在SOI衬底的上硅膜上形成绝缘图案和第一硅膜; 以及在所述第一硅膜中形成翅片结构。

8. 发明授权

US07960761B2 Semiconductor device having a recess channel transistor 有权
标题翻译：具有凹槽通道晶体管的半导体器件
公开(公告)号：US07960761B2
公开(公告)日：2011-06-14
申请号：US12615210
申请日：2009-11-09
申请人： Sung Woong Chung , Sang Don Lee
发明人： Sung Woong Chung , Sang Don Lee
IPC分类号： H01L29/78 , H01L29/94
CPC分类号： H01L29/66621 , H01L27/10876
摘要： The semiconductor device having a recess channel transistor includes a device isolation structure formed in a semiconductor substrate to define an active region having a recess region at a lower part of sidewalls thereof and a recess channel region formed in the semiconductor substrate under the active region. A method for fabricating the semiconductor device includes forming a device isolation structure in a semiconductor substrate to form an active region having a recess region at a lower part of sidewalls thereof, a gate insulating film formed over the semiconductor substrate including the recess channel region, and a gate electrode formed over the gate insulating film to fill up the recess channel region.
摘要翻译：具有凹陷沟道晶体管的半导体器件包括形成在半导体衬底中的器件隔离结构，以限定其侧壁下部具有凹陷区域的有源区域和在有源区域下形成在半导体衬底中的凹槽沟道区域。一种制造半导体器件的方法包括：在半导体衬底中形成器件隔离结构，以形成在其侧壁的下部具有凹陷区域的有源区，形成在包括凹槽沟道区域的半导体衬底上的栅极绝缘膜，以及形成在所述栅极绝缘膜上方以填充所述凹陷沟道区域的栅电极。

9. 发明申请

US20100059837A1 Spin Transfer Torque Memory Device Having Common Source Line and Method for Manufacturing the Same 审中-公开
标题翻译：具有共同源线的自旋转矩转矩存储器件及其制造方法
公开(公告)号：US20100059837A1
公开(公告)日：2010-03-11
申请号：US12343556
申请日：2008-12-24
申请人： Hyun Jeong Kim , Sung Woong Chung
发明人： Hyun Jeong Kim , Sung Woong Chung
IPC分类号： H01L29/82 , H01L21/00
CPC分类号： H01L27/228 , H01L29/66666 , H01L29/7827
摘要： A spin transfer torque memory device and a method for manufacturing the same. The spin transfer torque memory device comprises a MRAM cell using a MTJ and a vertical transistor. A common source line is formed in the bottom of the vertical transistor, thereby obtaining the high-integrated and simplified memory device.
摘要翻译：一种自旋转移力矩存储装置及其制造方法。自旋转移转矩存储装置包括使用MTJ和垂直晶体管的MRAM单元。在垂直晶体管的底部形成公共源极线，从而获得高集成度和简化的存储器件。

10. 发明申请

US20090173992A1 SEMICONDUCTOR DEVICE WITH IMPROVED PERFORMANCE CHARACTERISTICS 有权
标题翻译：具有改进性能特性的半导体器件
公开(公告)号：US20090173992A1
公开(公告)日：2009-07-09
申请号：US12323391
申请日：2008-11-25
申请人： Sang Don Lee , Sung Woong Chung
发明人： Sang Don Lee , Sung Woong Chung
IPC分类号： H01L29/78
CPC分类号： H01L29/66795 , H01L21/823437 , H01L29/4236 , H01L29/66621 , H01L29/7851
摘要： The semiconductor device includes an active region, a recess, a Fin channel region, a gate insulating film, and a gate electrode. The active region is defined by a device isolation structure formed in a semiconductor substrate. The recess is formed by etching the active region and its neighboring device isolation structure using an island shaped recess gate mask as an etching mask. The Fin channel region is formed on the semiconductor substrate at a lower part of the recess. The gate insulating film is formed over the active region including the Fin channel region and the recess. The gate electrode is formed over the gate insulating film to fill up the Fin channel region and the recess.
摘要翻译：半导体器件包括有源区，凹槽，Fin沟道区，栅极绝缘膜和栅电极。有源区由半导体衬底中形成的器件隔离结构限定。通过使用岛状凹陷栅极掩模作为蚀刻掩模来蚀刻有源区及其邻近的器件隔离结构来形成凹部。鳍状沟道区在凹部的下部形成在半导体衬底上。栅极绝缘膜形成在包括鳍状沟道区域和凹部的有源区域上。栅电极形成在栅极绝缘膜上，以填充鳍沟道区域和凹槽。

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