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    • 5. 发明授权
    • Decompressed scan chain masking circuit shift register with log2(n/n) cells
    • 用log2(n / n)单元解压缩扫描链屏蔽电路移位寄存器
    • US09229055B2
    • 2016-01-05
    • US14743720
    • 2015-06-18
    • Texas Instruments Incorporated
    • Prakash NarayananArvind JainSundarrajan SubramanianRubin A. Parekhji
    • G06F11/00G01R31/3177G01R31/3185
    • G01R31/3177G01R31/318536G01R31/318547
    • Electronic scan circuitry includes a decompressor (510), a plurality of scan chains (520.i) fed by the decompressor (510), a scan circuit (502, 504) coupled to the plurality of scan chains (520.i) to scan them in and out, a masking circuit (590) fed by the scan chains (520.i), and a scannable masking qualification circuit (550, 560, 580) coupled to the masking circuit (590), the masking qualification circuit (550, 560, 580) scannable by scan-in of bits by the decompressor (510) along with scan-in of the scan chains (520.i), and the scannable masking qualification circuit (550, 560, 580) operable to hold such scanned-in bits upon scan-out of the scan chains through the masking circuit (590). Other scan circuitry, processes, circuits, devices and systems are also disclosed.
    • 电子扫描电路包括解压缩器(510),由解压缩器(510)馈送的多个扫描链(520.i),耦合到多个扫描链(520.i)以扫描的扫描电路(502,504) 由扫描链(520.i)馈送的掩蔽电路(590)和耦合到屏蔽电路(590)的可扫描屏蔽鉴定电路(550,560,580),屏蔽鉴定电路(550) ,560,580)以及扫描链(520.i)的扫描以及可扫描掩蔽鉴定电路(550,560,580)可扫描由解压缩器(510)的位的扫描,以及可扫描掩蔽鉴定电路(550,560,580) 通过屏蔽电路扫描扫描链(590)后扫描位。 还公开了其它扫描电路,处理,电路,装置和系统。