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1. 发明授权

US09484312B2 Inductor shielding structure, integrated circuit including the same and method of forming the integrated circuit 有权
标题翻译：电感器屏蔽结构，集成电路包括与集成电路相同的形成方法
公开(公告)号：US09484312B2
公开(公告)日：2016-11-01
申请号：US14600634
申请日：2015-01-20
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Chi-Hsien Lin , Hsien-Yuan Liao , Ying-Ta Lu , Ho-Hsiang Chen , Tzu-Jin Yeh
IPC分类号： H01L23/52 , H01L23/552 , H01L49/02 , H01L23/522
CPC分类号： H01L23/552 , H01L23/5225 , H01L23/5227 , H01L28/10 , H01L2924/14
摘要： An inductor shielding structure includes a first conductive layer including a plurality of first conductive lines having a first width and a plurality of second conductive lines having a second width. The inductor shielding structure further includes a second conductive layer over the first conductive layer. The second conductive layer includes at least one third conductive line having a third width and a plurality of fourth conductive lines having a fourth width. Each conductive line of the at least one third conductive line is parallel to each conductive line of the plurality of first conductive lines. Each conductive line of the plurality of fourth conductive lines is parallel to each conductive line of the plurality of second conductive lines. The first width is different from the second width, or the third width is different from the fourth width.
摘要翻译：电感器屏蔽结构包括第一导电层，其包括具有第一宽度的多个第一导电线和具有第二宽度的多个第二导线。电感器屏蔽结构还包括在第一导电层上的第二导电层。第二导电层包括具有第三宽度的至少一个第三导线和具有第四宽度的多个第四导线。所述至少一个第三导线的每个导线平行于所述多个第一导线中的每条导线。多个第四导线中的每个导线平行于多个第二导线中的每条导线。第一宽度与第二宽度不同，或者第三宽度不同于第四宽度。

2. 发明申请

US20140097930A1 Structure and Method for a Transformer with Magnetic Features 有权
标题翻译：具有磁特性的变压器的结构和方法
公开(公告)号：US20140097930A1
公开(公告)日：2014-04-10
申请号：US14107794
申请日：2013-12-16
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Hsiao-Tsung Yen , Yu-Ling Lin , Ying-Ta Lu , Huan-Neng Chen , Ho-Hsiang Chen
IPC分类号： H01F5/00
CPC分类号： H01F27/2804 , H01F5/003 , H01F2027/2809 , H01L23/5226 , H01L23/5227 , H01L23/528 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： The present disclosure provides a semiconductor device. The semiconductor device includes a first inductor formed on a first substrate; a second inductor formed on a second substrate and conductively coupled with the first inductor as a transformer; and a plurality of micro-bump features configured between the first and second substrates. The plurality of micro-bump features include a magnetic material having a relative permeability substantially greater than one and are configured to enhance coupling between the first and second inductors.
摘要翻译：本发明提供一种半导体器件。半导体器件包括形成在第一衬底上的第一电感器; 第二电感器，其形成在第二基板上，并与所述第一电感器作为变压器导电耦合; 以及配置在第一和第二基板之间的多个微凸块特征。多个微凸块特征包括具有相对磁导率基本上大于1的磁性材料，并且被配置为增强第一和第二电感器之间的耦合。

3. 发明授权

US10931230B2 Voltage controlled oscillator circuit, device, and method 有权
公开(公告)号：US10931230B2
公开(公告)日：2021-02-23
申请号：US16432004
申请日：2019-06-05
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Chi-Hsien Lin , Ho-Hsiang Chen , Hsien-Yuan Liao , Tzu-Jin Yeh , Ying-Ta Lu
IPC分类号： H03B1/04 , H03L7/099 , H01L23/528 , H01L23/522 , H01L23/66 , H03H7/01 , H03B5/12
摘要： A voltage-controlled oscillator (VCO) includes a power supply node configured to have a power supply voltage. A reference node is configured to have a reference voltage. A transformer-coupled band-pass filter (BPF) is coupled to a pair of transistors. The pair of transistors and the transformer-coupled band-pass filter are positioned between the power supply node and the reference node.

4. 发明授权

US10163779B2 Integrated circuit with guard ring 有权
公开(公告)号：US10163779B2
公开(公告)日：2018-12-25
申请号：US14303206
申请日：2014-06-12
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Chiao-Han Lee , Hsien-Yuan Liao , Ying-Ta Lu , Chi-Hsien Lin , Ho-Hsiang Chen , Tzu-Jin Yeh
IPC分类号： H01L23/528 , H01L23/00 , H01L23/58 , H01L23/64 , H01L23/522 , H01L49/02
摘要： An integrated circuit comprises an inductor over a substrate and a guard ring surrounding the inductor. The guard ring comprises a plurality of first metal lines extending in a first direction and a plurality of second metal lines extending in a second direction. The second metal lines of the plurality of second metal lines are each coupled with at least one first metal line of the plurality of first metal lines. The guard ring also comprises a staggered line comprising a connected subset of at least one first metal line of the plurality of first metal lines and at least one second metal line of the plurality of second metal lines. The first metal lines of the plurality of first metal lines outside of the connected subset, the second metal lines of the plurality of second metal lines outside of the connected subset, and the staggered line surround the inductor.

5. 发明授权

US09698146B2 Multi-gate and complementary varactors in FinFET process 有权
公开(公告)号：US09698146B2
公开(公告)日：2017-07-04
申请号：US15074025
申请日：2016-03-18
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Chi-Hsien Lin , Ying-Ta Lu , Hsien-Yuan Liao , Ho-Hsiang Chen , Chewn-Pu Jou , Fu-Lung Hsueh
IPC分类号： H01L29/93 , H01L27/088 , H01L27/092 , H01L27/08
CPC分类号： H01L29/93 , H01L27/0808 , H01L27/0886 , H01L27/0924
摘要： A varactor includes at least one semiconductor fin, a first gate, and a second gate physically disconnected from the first gate. The first gate and the second gate form a first FinFET and a second FinFET, respectively, with the at least one semiconductor fin. The source and drain regions of the first FinFET and the second FinFET are interconnected to form the varactor.

6. 发明申请

US20160204282A1 Multi-Gate and Complementary Varactors in FinFET Process 审中-公开
标题翻译： FinFET工艺中的多栅极和互补变容二极管
公开(公告)号：US20160204282A1
公开(公告)日：2016-07-14
申请号：US15074025
申请日：2016-03-18
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Chi-Hsien Lin , Ying-Ta Lu , Hsien-Yuan Liao , Ho-Hsiang Chen , Chewn-Pu Jou , Fu-Lung Hsueh
IPC分类号： H01L29/93 , H01L27/092
CPC分类号： H01L29/93 , H01L27/0808 , H01L27/0886 , H01L27/0924
摘要： A varactor includes at least one semiconductor fin, a first gate, and a second gate physically disconnected from the first gate. The first gate and the second gate form a first FinFET and a second FinFET, respectively, with the at least one semiconductor fin. The source and drain regions of the first FinFET and the second FinFET are interconnected to form the varactor.
摘要翻译：变容二极管包括至少一个半导体鳍，第一栅极和物理上与第一栅极断开的第二栅极。第一栅极和第二栅极分别与至少一个半导体鳍形成第一FinFET和第二FinFET。第一FinFET和第二FinFET的源极和漏极区域互连以形成变容二极管。

7. 发明申请

US20150263702A1 Electronic Device with Switched-Capacitor Tuning and Related Method 审中-公开
标题翻译：具有开关电容调谐的电子装置及相关方法
公开(公告)号：US20150263702A1
公开(公告)日：2015-09-17
申请号：US14728689
申请日：2015-06-02
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Chewn-Pu Jou , Ying-Ta Lu , Hsien-Yuan Liao
IPC分类号： H03J5/24 , H03L7/08 , H01G4/38
CPC分类号： H03J5/246 , H01G4/38 , H03B5/1215 , H03B5/1228 , H03B5/1265 , H03B2201/025 , H03H5/12 , H03H7/00 , H03J2200/10 , H03L7/08
摘要： An electronic device includes an inductive element, and variable capacitors. Each variable capacitor includes: first and third capacitors, both having a first terminal electrically connected to a first terminal of the inductive element; and second and fourth capacitors, both having a first terminal electrically connected to a second terminal of the inductive element. A first switch circuit electrically connects or isolates a second terminal of the first capacitor to/from a second terminal of the second capacitor. A second switch circuit electrically connects or isolates a second terminal of the third capacitor to/from a second terminal of the fourth capacitor. A third switch circuit electrically connects or isolates the second terminal of the first capacitor to/from the second terminal of the fourth capacitor. A fourth switch circuit electrically connects or isolates the second terminal of the third capacitor to/from the second terminal of the second capacitor.
摘要翻译：电子设备包括电感元件和可变电容器。每个可变电容器包括：第一和第三电容器，两者具有电连接到电感元件的第一端子的第一端子; 以及第二和第四电容器，它们都具有电连接到电感元件的第二端子的第一端子。第一开关电路将第一电容器的第二端子与第二电容器的第二端子电连接或隔离。第二开关电路将第三电容器的第二端子与第四电容器的第二端子电连接或隔离。第三开关电路将第一电容器的第二端子与第四电容器的第二端子电连接或隔离。第四开关电路将第三电容器的第二端子与第二电容器的第二端子电连接或隔离。

8. 发明授权

US11817385B2 Integrated circuit with guard ring 有权
公开(公告)号：US11817385B2
公开(公告)日：2023-11-14
申请号：US17389795
申请日：2021-07-30
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Chiao-Han Lee , Chi-Hsien Lin , Ho-Hsiang Chen , Hsien-Yuan Liao , Tzu-Jin Yeh , Ying-Ta Lu
IPC分类号： H01L23/522 , H01L23/58 , H01L23/64 , H01L49/02 , H01L23/528 , H01L23/00
CPC分类号： H01L23/5227 , H01L23/528 , H01L23/5286 , H01L23/562 , H01L23/585 , H01L23/645 , H01L28/10 , H01L2924/0002 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit includes an inductor that includes a first set of conductive lines in a first metal layer, and is over a substrate, and a guard ring. The guard ring includes a first conductive line in a second metal layer, and extending in a first direction, a second conductive line extending in a second direction, and a first staggered line coupled between the first conductive line and the second conductive line. The first staggered line includes a second set of conductive lines in the second metal layer, and extends in the first direction, a third set of conductive lines in a third metal layer, and extends in the second direction, and a first set of vias coupling the second and third set of conductive lines together. All metal lines in the third metal layer that are part of the guard ring extend in the second direction.

9. 发明授权

US11736064B2 Differential oscillator circuit 有权
公开(公告)号：US11736064B2
公开(公告)日：2023-08-22
申请号：US17732400
申请日：2022-04-28
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Chi-Hsien Lin , Ho-Hsiang Chen , Hsien-Yuan Liao , Tzu-Jin Yeh , Ying-Ta Lu
IPC分类号： H03B5/12 , H03B1/04 , H03H7/01
CPC分类号： H03B5/1228 , H03B1/04 , H03B5/1203 , H03B5/1206 , H03B5/1212 , H03B5/1243 , H03B5/1296 , H03H7/0161 , H03B2200/009
摘要： A differential oscillator includes a differential circuit and a transformer-coupled band-pass filter (BPF) coupled between first and second output nodes. The BPF includes a coupling device coupled between the output nodes and a transformer including first and second windings in a metal layer of an IC. The first winding includes first and second conductive structures coupled to the first output node and a voltage node, respectively, and a third conductive structure including first and second extending portions connected to the first and second conductive structures, respectively. The second winding includes a fourth conductive structure including a third extending portion coupled to the voltage node and a fourth extending portion coupled to the second output node. The third extending portion is between the second conductive structure and the first extending portion, and the fourth extending portion is between the first conductive structure and the second extending portion.

10. 发明授权

US09674016B2 Up-conversion mixer having a reduced third order harmonic 有权
公开(公告)号：US09674016B2
公开(公告)日：2017-06-06
申请号：US14641744
申请日：2015-03-09
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Huan-Neng Chen , Ying-Ta Lu , Mei-Show Chen , Chewn-Pu Jou
IPC分类号： G06G7/44 , H04L27/06 , H03D7/14 , H04L27/04 , G06G7/16
CPC分类号： H04L27/06 , G06G7/16 , H03D7/1441 , H03D7/1458 , H03D7/1491 , H03D2200/0019 , H04L27/04
摘要： An up-conversion mixer includes a mixer cell having at least one output node configured to generate an output. The up-conversion mixer further includes an input stage coupled to the mixer cell, the input stage configured to receive an input signal and to produce a local minimum in a third order harmonic of the output with respect to an input power. The up-conversion mixer further includes a power supply input configured to receive a power supply voltage and a ground, and a maximum number of transistor stages between the power supply input and the ground is two.

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