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    • 1. 发明授权
    • CDR circuit and semiconductor device
    • CDR电路和半导体器件
    • US09419787B2
    • 2016-08-16
    • US14791578
    • 2015-07-06
    • Synaptics Display Devices GK
    • Kosuke Tsuiji
    • H04L7/033H04L7/04H03L7/07H03L7/08H03L7/081
    • H04L7/0331H03L7/07H03L7/08H03L7/0807H03L7/0812H04L7/041H04L7/10
    • A clock data recovery (CDR) circuit includes a sampling circuit, a synchronization circuit that synchronizes a frequency of an oscillation clock signal from an oscillation circuit with a frequency of input data of a specific pattern which is sampled in the sampling circuit, and synchronizes a phase of the oscillation clock signal with a phase of the sampled input data, and a data pattern recognition circuit that detects whether the input data sampled in the sampling circuit has a specific pattern. The data pattern recognition circuit starts an operation for detecting whether the input data has a specific pattern in response to a frequency lock start instruction. The synchronization circuit starts an operation for synchronizing the frequency on condition that it is determined by the data pattern recognition circuit that the input data has a specific pattern.
    • 时钟数据恢复(CDR)电路包括采样电路,使来自振荡电路的振荡时钟信号的频率与在采样电路中采样的特定模式的输入数据的频率同步的同步电路, 具有采样输入数据的相位的振荡时钟信号的相位,以及检测采样电路中采样的输入数据是否具有特定模式的数据模式识别电路。 数据模式识别电路响应于频率锁定开始指令开始检测输入数据是否具有特定模式的操作。 在由数据模式识别电路确定输入数据具有特定模式的条件下,同步电路开始同步频率的操作。