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    • 1. 发明申请
    • Associating mac addresses with addresses in a look-up table
    • 将mac地址与查找表中的地址相关联
    • US20060041734A1
    • 2006-02-23
    • US10519665
    • 2002-07-01
    • Swee LimHak Sim
    • Swee LimHak Sim
    • G06F12/10
    • H04L61/1552H04L29/12009H04L29/12018H04L29/12132H04L29/12801H04L45/745H04L61/10H04L61/6004
    • An ethernet switch associates addresses in a look-up table with received MAC addresses using a CRC algorithm, so that correspondence data about each MAC address can be stored in the corresponding section of the look-up table. When, as the look-up table is constructed, a given MAC address A0 hashes to an address H0 which is already associated with a previous MAC address, the MAC address is re-hashed using Walsh codes W1,m to provide a different look-up table address H1. This procedure can be performed any number of times y to generate different addresses Hn for n=1, . . . y. If it is performed sufficiently frequently, then it is likely that an address will be found which is free. In this way, the number of MAC addresses which will typically be associated with a single look-up table address is reduced, preferably to only one.
    • 以太网交换机使用CRC算法将查找表中的地址与接收的MAC地址相关联,使得关于每个MAC地址的对应数据可以存储在查找表的相应部分中。 当构建查找表时,给定的MAC地址A 0 散列到已经与先前MAC地址相关联的地址H 0 0,MAC地址 使用Walsh码W 1,m N进行重新散列,以提供不同的查找表地址H 1。 该过程可以执行任意次数y以产生n = 1的不同地址H n n n。 。 。 y。 如果执行得非常频繁,那么可能会发现一个免费的地址。 以这种方式,通常将与单个查找表地址相关联的MAC地址的数量减少,优选地仅减少一个。
    • 2. 发明申请
    • Configurable fast ethernet and gigabit ethernet data port
    • 可配置的快速以太网和千兆以太网数据端口
    • US20050243856A1
    • 2005-11-03
    • US10526990
    • 2002-09-06
    • Shridhar Mubaraq MishraTina ZhangChunfeng HuHak Sim
    • Shridhar Mubaraq MishraTina ZhangChunfeng HuHak Sim
    • H04L12/413H04L12/44H04L12/931H04L12/935
    • H04L49/352H04L49/30H04L49/65
    • An Ethernet switch has at least one ingress/egress port 1 which is operable in two modes, in a first mode as a GE port and in a second mode as a plurality of FE ports. The port has 8 MAC interfaces 3 each of which is capable of receiving/transmitting FE packets, and at least one of the MAC interfaces can be configured to receive/transmit GE packets. Thus, the port has two modes of operation. The port further includes receive and transmit modules 5, 7 which receive GE and FE packets from, and transmit GE and FE packets to, the interfaces. If there are 8 such ports in the Ethernet switch, then by switching different numbers of the ports between the two modes, the switch may operate in 9 different modes: as 8 GE ports, 7 GE ports and 8 FE ports, 2 GE ports and 48 FE ports, 1 GE port and 56 FE ports, or simply as 64 FE ports.
    • 以太网交换机具有至少一个入口/出口1,其以两种模式操作,在第一模式中作为GE端口,在第二模式中可操作为多个FE端口。 该端口具有8个MAC接口3,每个MAC接口能够接收/发送FE分组,并且至少一个MAC接口可以被配置为接收/发送GE分组。 因此,端口具有两种操作模式。 该端口还包括接收和发送模块5,6,接收和发送接口的GE和FE数据包,并将GE和FE数据包传输到接口。 如果以太网交换机中有8个这样的端口,则通过在两种模式之间切换不同数量的端口,交换机可以在9种不同模式下工作:8个GE端口,7个GE端口和8个FE端口,2个GE端口和 48个FE端口,1个GE端口和56个FE端口,或简单的64个FE端口。
    • 4. 发明申请
    • Traffic shaping between the DMT processor and data link layer processor of a line-card
    • DMT处理器与线卡数据链路层处理器之间的流量整形
    • US20070177662A1
    • 2007-08-02
    • US11344955
    • 2006-02-01
    • Raj JainHak Sim
    • Raj JainHak Sim
    • H04L5/16
    • H04L27/2608H04L1/0071
    • A line card is proposed in which one or more DMT processing modules 1 communicate with a data link layer platform, such as an ATM, POSPHY or Ethernet processor. The data relating to a single symbol is transmitted between the data link layer platform and a given one of DMT processing modules in a plurality of data portions spaced apart in time. The data portions relating to different channels of a given DMT processing module (or to different DMT processing modules) are interleaved in time. Since the data portions of a given symbol are spaced apart in time, the data relating to a single symbol is transmitted over a longer time period than in conventional devices which reduces the effective burstiness of the traffic, and thus reduces the memory requirements of the data link layer platform.
    • 提出一种线卡,其中一个或多个DMT处理模块1与诸如ATM,POSPHY或以太网处理器之类的数据链路层平台进行通信。 与数据链路层平台和DMT处理模块中的给定的一个时间间隔的多个数据部分中传送与单个符号有关的数据。 与给定DMT处理模块(或不同的DMT处理模块)的不同信道有关的数据部分在时间上交错。 由于给定符号的数据部分在时间上是间隔开的,所以与传统设备相比,在单个符号上传输的数据比传统设备更长的时间间隔发送,这降低了业务的有效突发性,从而降低了数据的存储器要求 链路层平台。
    • 5. 发明申请
    • Edge normal process
    • 边缘正常过程
    • US20060115142A1
    • 2006-06-01
    • US11331619
    • 2006-01-13
    • Hak Sim
    • Hak Sim
    • G06K9/00
    • G06T7/001G06T2207/30148
    • An edge inspection method for detecting defects on a wafer edge normal surface includes acquiring a set of digital images which captures a circumference of the wafer. An edge of the wafer about the circumference is determined. Each digital image is segmented into a plurality of horizontal bands. Adjacent edge clusters about the circumference of the wafer are combined into edge pixel bins. The edge pixel bins are analyzed via edge clusters analysis to identify defects. The edge pixel bins are also analyzed via blob analysis to determine defects.
    • 用于检测晶片边缘法线表面上的缺陷的边缘检查方法包括获取捕获晶片周围的一组数字图像。 确定围绕圆周的晶片的边缘。 每个数字图像被分割成多个水平带。 围绕晶片圆周的相邻边缘组合成边缘像素块。 通过边缘簇分析来分析边缘像素块,以识别缺陷。 还通过斑点分析来分析边缘像素盒,以确定缺陷。
    • 6. 发明申请
    • Computationally efficient protocols for VDSL system
    • VDSL系统的计算效率协议
    • US20060056525A1
    • 2006-03-16
    • US11072992
    • 2005-03-04
    • Raj JainHak Sim
    • Raj JainHak Sim
    • H04K1/10
    • H04L27/2628H04L27/2633
    • Techniques which reduce the computational burden of the IFFT/FFT section of a DSL data transmission/reception apparatus, taking into account the nature of conventional IFFT/FFT algorithms. These algorithms operate using “butterflies” representing complex calculations performed on input values. The butterflies are here referred to as “simple” if all the input values are zero or if only one input value is non-zero. The invention proposes that the tones which have non-zero amplitudes are selected to maximize (or at least increase) the number of simple butterflies. This is done either in designing the band plans of the communication, or in designing the band plan of a mode of operation of the apparatus having a reduced data transmission rate. The IFFT/FFT section receives information indicating that the IFFT/FFT algorithm can be simplified based on knowledge of which of the input values will be zero, and changes its mode of operation accordingly.
    • 考虑到常规IFFT / FFT算法的性质,减少DSL数据发送/接收装置的IFFT / FFT部分的计算负担的技术。 这些算法使用表示对输入值执行的复杂计算的“蝴蝶”进行操作。 如果所有输入值都为零,或者只有一个输入值不为零,则这些蝴蝶在这里被称为“简单”。 本发明提出,选择具有非零幅度的色调以最大化(或至少增加)简单蝴蝶的数量。 这可以在设计通信的频带规划或在设计具有降低的数据传输速率的装置的操作模式的频带规划中完成。 IFFT / FFT部分基于知道哪个输入值将为零来接收指示可以简化IFFT / FFT算法的信息,并相应地改变其操作模式。