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1. 发明授权

US4163989A Detector circuit for color television receivers 失效
标题翻译：彩色电视接收机检测电路
公开(公告)号：US4163989A
公开(公告)日：1979-08-07
申请号：US903003
申请日：1978-05-04
申请人： Susumu Akazawa , Kyoichi Murakami , Kiyoshi Ishihata , Takao Tsuchiya
发明人： Susumu Akazawa , Kyoichi Murakami , Kiyoshi Ishihata , Takao Tsuchiya
IPC分类号： H03D1/18 , H04N9/68 , H04N9/71 , H04N9/535 , H03D1/02
CPC分类号： H04N9/68 , H04N9/71
摘要： A detector circuit for a color television receiver includes a pair of transistors whose collector-emitter circuits are connected in parallel with each other, an input circuit, such as a differential amplifier, for supplying a differential input signal to the base electrodes of the pair of transistors, an impedance element coupled between the collector electrodes of the pair of transistors and a voltage source, and an integration circuit for integrating a detected signal taken from the collector electrodes of the pair of transistors and thereby providing an output signal. A reference-voltage circuit is included to supply a reference voltage, which can be used as a threshold voltage, to the emitter electrodes of the pair of transistors. The detector circuit is advantageously used in the color demodulating circuit of a color television receiver, wherein an oscillator controlled by color burst signals supplies the input signal to the detector circuit, and the output thereof is used to control the gain of an ACC amplifier.
摘要翻译：用于彩色电视接收机的检测器电路包括一对晶体管，其集电极 - 发射极彼此并联连接;输入电路，例如差分放大器，用于将差分输入信号提供给该对晶体管，耦合在该对晶体管的集电极之间的阻抗元件和电压源，以及积分电路，用于对从该对晶体管的集电极获取的检测信号进行积分，从而提供输出信号。包括参考电压电路，以将可用作阈值电压的参考电压提供给该对晶体管的发射极。检测器电路有利地用在彩色电视接收机的彩色解调电路中，其中由色同步信号控制的振荡器将输入信号提供给检测器电路，并且其输出用于控制ACC放大器的增益。

2. 发明授权

US4175241A Master-slave flip-flop circuit 失效
标题翻译：主从触发器电路
公开(公告)号：US4175241A
公开(公告)日：1979-11-20
申请号：US909111
申请日：1978-05-24
申请人： Takao Tsuchiya , Susumu Akazawa , Kyoichi Murakami
发明人： Takao Tsuchiya , Susumu Akazawa , Kyoichi Murakami
IPC分类号： H03K3/037 , H03K1/12
CPC分类号： H03K3/0372
摘要： This invention is a phase inversion circuit of improved stability of operation for a master-slave flip-flop circuit. An additional gating circuit is controlled by two signals, one from an output of the slave flip-flop circuit and the other from an externally applied phase inversion signal. The output of the additional gating circuit is connected to the master flip-flop circuit through a circuit means that also receives a signal from the slave flip-flop output circuit. In the absence of inversion signals the circuit means controls the master flip-flop circuit from the slave flip-flop circuit and the master flip-flop circuit controls the slave flip-flop circuit with the assistance of the timing pulses in the usual manner. The phase inversion signal can be applied over a wide range of timing intervals of the timing circuit provided the inversion signal overlaps at least partly one of the timing pulses of the regular timing signal when the normal output signal of the slave flip-flop is a " 0" and the normal output signal of the master flip-flop circuit is also a " 0".
摘要翻译：本发明是一种提高主从触发器电路工作稳定性的相位反转电路。附加门控电路由两个信号控制，一个来自从触发器电路的输出，另一个来自外部施加的相位反转信号。附加选通电路的输出通过电路装置连接到主触发器电路，该电路也接收来自从触发器输出电路的信号。在没有反相信号的情况下，电路装置控制来自从触发器电路的主触发器电路，并且主触发器电路借助定时脉冲以常规方式控制从触发器电路。相位反转信号可以在定时电路的宽范围的定时间隔上被施加，只要当从触发器的正常输出信号为“正反馈信号”时反相信号与正常定时信号的定时脉冲中的至少一部分重叠， 0“，主触发电路的正常输出信号也为”0“。

3. 发明授权

US4092667A Automatic chrominance control and color killer circuits 失效
标题翻译：自动色彩控制和彩色杀手电路
公开(公告)号：US4092667A
公开(公告)日：1978-05-30
申请号：US787155
申请日：1977-04-13
申请人： Susumu Akazawa , Takao Tsuchiya , Kyoichi Murakami , Takashi Okada
发明人： Susumu Akazawa , Takao Tsuchiya , Kyoichi Murakami , Takashi Okada
IPC分类号： H04N9/71 , H04N9/49
CPC分类号： H04N9/71
摘要： An automatic chrominance control and color killer circuit for use in a color television receiver having a gain controllable chrominance amplifier for selectively amplifying chrominance signals and a color burst signal transmitted with a composite television signal during a color television transmission. The circuit further has a burst level detector connected to the chrominance amplifier, a control circuit including a time constant circuit connected to the burst level detector for deriving a control signal, which is supplied to the chrominance amplifier for controlling the gain thereof in response to the level of the control signal during the presence of the burst signal and for activating and inactivating the chrominance amplifier when the level of the control signal goes over and below a predetermined level, and a circuit connected between the burst level detector and the time constant circuit for shortening the time constant of the latter when the level of an output signal of the former goes below a predetermined level.

4. 发明授权

US07379240B2 Rear projection-type screen and rear projection-type image display device 失效
标题翻译：背投式屏幕和背投式图像显示装置
公开(公告)号：US07379240B2
公开(公告)日：2008-05-27
申请号：US10521610
申请日：2003-07-15
申请人： Takaaki Iwaki , Kyoichi Murakami
发明人： Takaaki Iwaki , Kyoichi Murakami
IPC分类号： G03B21/60 , G03B21/56
CPC分类号： G03B21/62 , G03B21/625
摘要： A rear projection-type screen includes two sheet-like members having lenses prevented from being deformed and scratched. In the rear projection-type screen (5) for passing and focusing image light L emitted from an image light source (3), two sheet-like members (a lenticular lens sheet 7 and a Fresnel lens sheet 8) each made of a transparent material and having minute lenses (9) and (11) formed on at least one surface thereof are disposed such that their surfaces (7b) and (8a) with the lenses formed thereon confront each other, and a plurality of spacers (14), (14), . . . are disposed at appropriate spaced intervals between the confronting lenses of the two sheet-like members within an effective screen area (5a) for passing and focusing the image light thereon.
摘要翻译：背投式屏幕包括具有防止变形和划伤的镜片的两个片状构件。在用于使从图像光源（3）发射的图像光L的通过和聚焦的后投影型屏幕（5）中，每个由透明的（由透明的）形成的两个片状部件（双凸透镜片7和菲涅尔透镜片8）在其至少一个表面上形成的具有微小透镜（9）和（11）的材料被设置成使得它们在其上形成的透镜的表面（7b）和（8a）彼此面对，并且多个间隔物（14 ），（14），。。。在有效屏幕区域（5a）内的两个片状构件的相对透镜之间以适当间隔设置，用于使图像光在其上通过和聚焦。

5. 发明授权

US4343018A Chrominance signal processing circuit 失效
标题翻译：色度信号处理电路
公开(公告)号：US4343018A
公开(公告)日：1982-08-03
申请号：US208193
申请日：1980-11-19
申请人： Tsutomu Niimura , Kyoichi Murakami , Akira Yamakoshi
发明人： Tsutomu Niimura , Kyoichi Murakami , Akira Yamakoshi
IPC分类号： H04N9/45 , H04N9/64 , H04N9/68 , H04N9/535
CPC分类号： H04N9/68
摘要： A chrominance signal processing circuit for generating a gain-controlled chrominance signal carrier and a phase-controlled burst signal is provided with a first differential amplifier receiving a chrominance signal carrier and having a first constant current source, a second differential amplifier receiving an output signal of the first differential amplifier, a phase control circuit connected to the output of the second differential amplifier, the second differential amplifier receiving its bias current from a second constant current source during a chroma interval and from a third constant current source during a burst interval, the ratio of the currents of the first and second constant current sources being controlled for controlling the gain of the chrominance signal, and the output of the second differential amplifier being controlled at least during the burst interval, for controlling the phase of the burst signal.
摘要翻译：用于产生增益控制的色度信号载波和相位控制的突发信号的色度信号处理电路设置有接收色度信号载波并具有第一恒定电流源的第一差分放大器，接收第一恒定电流源的输出信号的第二差分放大器所述第一差分放大器，连接到所述第二差分放大器的输出的相位控制电路，所述第二差分放大器在色度间隔期间从第二恒定电流源接收其偏置电流，并且在突发间隔期间从所述第三恒定电流源接收所述偏置电流，控制第一和第二恒定电流源的电流的比率用于控制色度信号的增益，并且至少在突发间隔期间控制第二差分放大器的输出，以控制突发信号的相位。

6. 发明申请

US20060126172A1 Rear projection-type screen and rear projection-type image display device 失效
标题翻译：背投式屏幕和背投式图像显示装置
公开(公告)号：US20060126172A1
公开(公告)日：2006-06-15
申请号：US10521610
申请日：2003-07-15
申请人： Takaaki Iwaki , Kyoichi Murakami
发明人： Takaaki Iwaki , Kyoichi Murakami
IPC分类号： G03B21/60
CPC分类号： G03B21/62 , G03B21/625
摘要： A rear projection-type screen includes two sheet-like members having lenses prevented from being deformed and scratched. In the rear projection-type screen (5) for passing and focusing image light L emitted from an image light source (3), two sheet-like members (a lenticular lens sheet 7 and a Fresnel lens sheet 8) each made of a transparent material and having minute lenses (9) and (11) formed on at least one surface thereof are disposed such that their surfaces (7b) and (8a) with the lenses formed thereon confront each other, and a plurality of spacers (14), (14), . . . are disposed at appropriate spaced intervals between the confronting lenses of the two sheet-like members within an effective screen area (5a) for passing and focusing the image light thereon.
摘要翻译：背投式屏幕包括具有防止变形和划伤的镜片的两个片状构件。在用于使从图像光源（3）发射的图像光L的通过和聚焦的后投影型屏幕（5）中，每个由透明的（由透明的）形成的两个片状部件（双凸透镜片7和菲涅尔透镜片8）在其至少一个表面上形成的具有微小透镜（9）和（11）的材料被设置成使得它们在其上形成的透镜的表面（7b）和（8a）彼此面对，并且多个间隔物（14 ），（14），。。。在有效屏幕区域（5a）内的两个片状构件的相对透镜之间以适当间隔设置，用于使图像光在其上通过和聚焦。

7. 发明授权

US5144169A Operational amplifier circuit 失效
标题翻译：运算放大器电路
公开(公告)号：US5144169A
公开(公告)日：1992-09-01
申请号：US759927
申请日：1991-09-13
申请人： Atsushi Hirabayashi , Kyoichi Murakami , Kenji Komori , Masaaki Ishihara
发明人： Atsushi Hirabayashi , Kyoichi Murakami , Kenji Komori , Masaaki Ishihara
IPC分类号： H03F3/34 , H03F1/32 , H03F3/30 , H03F3/45
CPC分类号： H03F1/3211 , H03F3/3071
摘要： An operational amplifier circuit comprises a pair of emitter common transistors forming a differential amplifier circuit including a first conductivity type first and second transistors; a current mirror circuit including a second conductivity type third and fourth transistors having commonly connected bases and collectors which are connected with the first and second transistors, respectively and a second conductivity of fifth transistor having an emitter connected with the common bases and a base connected with the collector of the fourth transistor; and an output circuit including a second conductivity type sixth transistor having a base connected with the collector of the first transistor and a second conductivity type seventh transistor having a base connected with the emitter of the sixth transistor for outputting an output of the collector of the seventh transistor via a transistor buffer. The voltage between the collectors and the emitters of the first and second transistors of the emitter common transistor differential pair are equal to each other so that the current offset is reduced to improve the distortion factor characteristics.
摘要翻译：运算放大器电路包括一对发射极公共晶体管，形成包括第一导电类型的第一和第二晶体管的差分放大器电路; 电流镜电路，包括分别与第一和第二晶体管连接的共同连接的基极和集电极的第二导电类型的第三和第四晶体管，以及具有与公共基极连接的发射极的第五晶体管的第二导电性和与第四晶体管的集电极; 以及输出电路，包括具有与第一晶体管的集电极连接的基极的第二导电型第六晶体管和具有与第六晶体管的发射极连接的基极的第二导电型第七晶体管，用于输出第七晶体管的集电极的输出晶体管通过晶体管缓冲器。集电极和发射极公共晶体管差分对的第一和第二晶体管的发射极之间的电压彼此相等，使得电流偏移减小以改善失真因子特性。

8. 发明授权

US5294866A Raster distortion correcting signal synthesizer 失效
标题翻译：栅格失真校正信号合成器
公开(公告)号：US5294866A
公开(公告)日：1994-03-15
申请号：US848227
申请日：1992-03-09
申请人： Shinichirou Miyazaki , Kyoichi Murakami
发明人： Shinichirou Miyazaki , Kyoichi Murakami
IPC分类号： G09G1/04 , G09G1/00 , G09G1/16 , H04N3/16 , H04N3/233 , H04N3/27 , H01J29/70
CPC分类号： H04N3/2335 , H04N3/27
摘要： A raster distortion correcting signal synthesizer includes a multiplier, an adder, a memory for storing data and a coefficient, and a controller for controlling the multiplier, adder and memory in accordance with a count value of a horizontal sync. signal. The controller calculates a desired raster distortion correcting signal of a high order by utilizing the multiplier and adder on the basis of the count value, and multiplies the count value by a predetermined coefficient to obtain a new count value.
摘要翻译：光栅失真校正信号合成器包括乘法器，加法器，用于存储数据的存储器和系数，以及根据水平同步的计数值来控制乘法器，加法器和存储器的控制器。信号。控制器通过利用乘法器和加法器基于计数值来计算高阶的所需光栅失真校正信号，并将计数值乘以预定系数以获得新的计数值。

9. 发明授权

US4862269A Memory control apparatus 失效
标题翻译：存储器控制装置
公开(公告)号：US4862269A
公开(公告)日：1989-08-29
申请号：US222084
申请日：1988-07-20
申请人： Yutaka Sonoda , Hirofumi Yuchi , Kyoichi Murakami , Masaharu Tokuhara
发明人： Yutaka Sonoda , Hirofumi Yuchi , Kyoichi Murakami , Masaharu Tokuhara
IPC分类号： H04N5/262 , G09G5/399 , H04N5/45 , H04N5/907
CPC分类号： G09G5/399 , H04N5/45 , H04N5/907
摘要： In a memory control apparatus for providing various video display functions by means of a video memory into which video data constituting successive units, such as, frames or fields, or video information are written at repeatedly changing write addresses while concurrently reading out the data from repeatedly changing read-out addresses; the video memory is provided with at least four memory areas each having a capacity to store one of the units of video information, impending overtaking of the write and read-out addresses relative to each other is detected, and, in response to such detection, the one of the memory areas in which the data is being written or read-out is changed so as to maintain a separation of the write and read-out addresses sufficient to ensure avoidance of overtaking and consequent disturbance of the displayed image.

10. 发明授权

US4292597A Circuit for converting single-ended input signals to a pair of differential output signals 失效
标题翻译：用于将单端输入信号转换为一对差分输出信号的电路
公开(公告)号：US4292597A
公开(公告)日：1981-09-29
申请号：US83858
申请日：1979-10-11
申请人： Tsutomu Niimura , Kyoichi Murakami , Akira Yamakoshi
发明人： Tsutomu Niimura , Kyoichi Murakami , Akira Yamakoshi
IPC分类号： H03F3/30 , H03F3/45 , H03G1/00 , H03G3/30
CPC分类号： H03F3/3094 , H03F3/45071 , H03G1/0023
摘要： A circuit that is particularly adapted to convert a single-ended input signal to a pair of differential output signals. First and second series circuits are connected in parallel, the first series circuit being formed of first and second diodes and the second series circuit being formed of a third diode connected with the collector-emitter circuit of a transistor. The base electrode of the transistor is connected to the junction defined by the first and second diodes such that the base-emitter circuit thereof is in parallel arrangement with the second diode. A current source is connected to the parallel-connected series circuits so as to supply currents thereto. An input signal is supplied to the junction defined by the first and second diodes; the first and second outputs are coupled to this junction and to the collector electrode of the transistor, respectively, for providing differential output signal currents that are a function of the supplied signal. This circuit can be connected to a differential amplifier to supply differential signals to the latter, whereby a gain controlled amplification of the original single-ended input signal can be attained.
摘要翻译：特别适用于将单端输入信号转换成一对差分输出信号的电路。第一和第二串联电路并联连接，第一串联电路由第一和第二二极管形成，第二串联电路由与晶体管的集电极 - 发射极连接的第三二极管形成。晶体管的基极连接到由第一和第二二极管限定的结，使得其基极 - 发射极电路与第二二极管并联布置。电流源连接到并联串联电路，以便向其提供电流。输入信号被提供给由第一和第二二极管限定的结; 第一和第二输出分别耦合到该结和晶体管的集电极，以提供作为所提供信号的函数的差分输出信号电流。该电路可以连接到差分放大器以向后者提供差分信号，从而可以获得原始单端输入信号的增益控制放大。

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