会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 3. 发明授权
    • Substrate processing methods for reflectors
    • 反射镜的基板加工方法
    • US08715472B2
    • 2014-05-06
    • US12659331
    • 2010-03-04
    • Sung-Wook HwangChul-Ho Shin
    • Sung-Wook HwangChul-Ho Shin
    • C23C14/34
    • H01J37/32633C23F4/00H01J37/32357
    • A substrate processing method may include forming a plasma; extracting ions from the plasma and accelerating the ions to have uniform or substantially uniform directivity using a grid system; irradiating the ions at a reflector, wherein the reflector includes a plurality of reflecting plates each having a metal plate and an insulating layer on the metal plate, wherein the reflecting plates are parallel or substantially parallel such that the insulating layers are exposed to the ions; reflecting the ions incident on the reflecting plates away from the insulating layers of the reflecting plates; colliding the ions reflected away from the insulating layers with the metal plates to convert the ions into neutral beams; and irradiating the neutral beams onto a substrate to process the substrate.
    • 基板处理方法可以包括形成等离子体; 从等离子体中提取离子并使用网格系统加速离子以具有均匀或基本均匀的方向性; 在反射器处照射离子,其中反射器包括多个反射板,每个反射板在金属板上具有金属板和绝缘层,其中反射板平行或基本平行,使得绝缘层暴露于离子; 将入射到反射板上的离子反射离开反射板的绝缘层; 使离开绝缘层的离子与金属板碰撞,将离子转换为中性光束; 并将中性光束照射到衬底上以处理衬底。
    • 5. 发明授权
    • Ion beam apparatus having plasma sheath controller
    • 具有等离子体鞘控制器的离子束装置
    • US07564042B2
    • 2009-07-21
    • US11834561
    • 2007-08-06
    • Do-Haing LeeSung-Wook HwangChul-Ho Shin
    • Do-Haing LeeSung-Wook HwangChul-Ho Shin
    • H05H1/02H01J3/14H01J37/08
    • H01J37/08H01J27/024H01J37/3053H01J2237/061H01J2237/24542
    • An ion beam apparatus includes a plasma chamber with a grid assembly installed at one end of the plasma chamber and a plasma sheath controller disposed between the plasma chamber and the grid assembly. The grid assembly includes first ion extraction apertures. The plasma sheath controller includes second ion extraction apertures smaller than the first ion extraction apertures. When the plasma sheath controller is used in this configuration, the surface of the plasma takes on a more planar configuration adjacent the controller so that ions, extracted from the plasma in a perpendicular direction to the plasma surface, pass cleanly through the apertures of the grid assembly rather than collide with the sidewalls of the grid assembly apertures. A semiconductor manufacturing apparatus and method for forming an ion beam are also provided.
    • 离子束装置包括等离子体室,其中安装在等离子体室的一端的栅格组件和设置在等离子体室和栅格组件之间的等离子体鞘控制器。 栅格组件包括第一离子提取孔。 等离子体鞘控制器包括比第一离子提取孔小的第二离子提取孔。 当在该构造中使用等离子体鞘控制器时,等离子体的表面具有与控制器相邻的更平面的配置,使得从垂直于等离子体表面的方向从等离子体提取的离子通过网格的孔 组件而不是与栅格组件孔的侧壁碰撞。 还提供了用于形成离子束的半导体制造装置和方法。
    • 10. 发明授权
    • Method for fabricating a capacitor in a semiconductor memory device
    • 在半导体存储器件中制造电容器的方法
    • US06391714B2
    • 2002-05-21
    • US09738296
    • 2000-12-18
    • Chul-Ho ShinU In Chung
    • Chul-Ho ShinU In Chung
    • H01L218242
    • H01L28/84H01L21/3143H01L27/10814H01L27/10855Y10T29/41
    • A method for making a capacitor of a semiconductor memory device capable of providing increased capacitance without degraded resolution, as well as without the removal of any interlayer insulation layers upon formation of a lower electrode for the capacitor, wherein after formation of an access transistor on a semiconductor substrate, a first interlayer insulation layer for planarization of a surface of the semiconductor substrate and a second interlayer insulation layer for formation of the capacitor lower electrode are formed. After formation of an opening for exposing a part of an impurity diffusion region of the access transistor by etching a part of the first and second interlayer insulating layers, a spacer is formed within the opening. Further, after deposition of a conductive layer for the capacitor lower electrode onto a surface of the substrate, a planarization process is carried out until a part of the upper surface of the spacer is exposed. Finally, after removal of the exposed spacer, the dielectric layer and a conductive layer for the upper electrode of the capacitor are formed in sequence. The method does not require any additional insulation layer evaporation process, since the interlayer insulation layer for formation of the reverse storage electrode could be used for formation of a gate contact of a logic region, without removal. Consequently, simplification of fabrication process for a capacitor is achieved.
    • 一种用于制造半导体存储器件的电容器的方法,其能够提供增加的电容而不降低分辨率,以及在形成用于电容器的下电极时不去除任何层间绝缘层,其中在形成存取晶体管 半导体衬底,用于使半导体衬底的表面平坦化的第一层间绝缘层和用于形成电容器下电极的第二层间绝缘层。 在形成用于通过蚀刻第一和第二层间绝缘层的一部分来暴露存取晶体管的一部分杂质扩散区的开口,在开口内形成间隔物。 此外,在将电容器下电极的导电层沉积到基板的表面上之后,进行平坦化处理直到间隔件的上表面的一部分露出。 最后,在去除暴露的间隔物之后,依次形成电介质层和用于电容器的上电极的导电层。 该方法不需要任何额外的绝缘层蒸发工艺,因为用于形成反向存储电极的层间绝缘层可用于形成逻辑区域的栅极接触而不去除。 因此,实现了电容器制造工艺的简化。