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1. 发明申请

US20100306491A1 Data storage device 审中-公开
标题翻译：数据存储设备
公开(公告)号：US20100306491A1
公开(公告)日：2010-12-02
申请号：US12661352
申请日：2010-03-16
申请人： Sun-mi Yoo , Min-cheol Kwon , Seong-jun Ahn , Shine Kim , Mi-kyeong Kang
发明人： Sun-mi Yoo , Min-cheol Kwon , Seong-jun Ahn , Shine Kim , Mi-kyeong Kang
IPC分类号： G06F12/02 , G06F12/10
CPC分类号： G06F12/0246 , G06F2212/7201
摘要： A data storage device capable of improving reading and writing performance includes at least one memory chip comprising a control unit and a plurality of blocks for storing data, and communicating with a host through a channel; and memory storing data output from the at least one memory chip. The control unit may sequentially read data having continuous logic addresses and discontinuous physical addresses from the plurality of blocks and store the data in the memory to have continuous physical addresses.
摘要翻译：能够提高读写性能的数据存储装置包括：至少一个存储芯片，包括控制单元和用于存储数据的多个块，以及通过信道与主机通信; 以及存储器，其存储从所述至少一个存储器芯片输出的数据。控制单元可以顺序地从多个块读取具有连续逻辑地址和不连续物理地址的数据，并将数据存储在存储器中以具有连续的物理地址。

2. 发明申请

US20130024607A1 MEMORY APPARATUS 有权
标题翻译：记忆装置
公开(公告)号：US20130024607A1
公开(公告)日：2013-01-24
申请号：US13547346
申请日：2012-07-12
申请人： Young-ho Park , Seong-jun Ahn , Min-cheol Kwon
发明人： Young-ho Park , Seong-jun Ahn , Min-cheol Kwon
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7202 , G06F2212/7208 , G11C29/82
摘要： A memory apparatus includes first memory chip and second memory chip; and a control unit configured to manage a global reserved area, a first virtual area for the first memory chip, and a second virtual area for the second memory chip, wherein the first virtual area includes a first user area and a first reserved area, the second virtual area includes a second user area and a second reserved area, the global reserved area includes a first plurality of reserved blocks corresponding to the first reserved area and a second plurality of reserved blocks corresponding to the second reserved area, and the control unit is configured to assign a second virtual block included in the global reserved area to the first user area if the control unit detects a first virtual block included in the first user area is a bad block.
摘要翻译：存储装置包括第一存储芯片和第二存储芯片; 以及控制单元，被配置为管理全局保留区域，第一存储器芯片的第一虚拟区域和第二存储器芯片的第二虚拟区域，其中，第一虚拟区域包括第一用户区域和第一保留区域，第二虚拟区域包括第二用户区域和第二保留区域，全局保留区域包括对应于第一保留区域的第一多个保留块和对应于第二保留区域的第二多个保留块，并且控制单元是被配置为如果所述控制单元检测到包括在所述第一用户区域中的第一虚拟块是坏块，则将包含在所述全局保留区域中的第二虚拟块分配给所述第一用户区域。

3. 发明授权

US08935460B2 Memory apparatus 有权
标题翻译：存储设备
公开(公告)号：US08935460B2
公开(公告)日：2015-01-13
申请号：US13547346
申请日：2012-07-12
申请人： Young-ho Park , Seong-jun Ahn , Min-cheol Kwon
发明人： Young-ho Park , Seong-jun Ahn , Min-cheol Kwon
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28 , G06F12/02 , G11C29/00
CPC分类号： G06F12/0246 , G06F2212/7202 , G06F2212/7208 , G11C29/82
摘要： A memory apparatus includes first memory chip and second memory chip; and a control unit configured to manage a global reserved area, a first virtual area for the first memory chip, and a second virtual area for the second memory chip, wherein the first virtual area includes a first user area and a first reserved area, the second virtual area includes a second user area and a second reserved area, the global reserved area includes a first plurality of reserved blocks corresponding to the first reserved area and a second plurality of reserved blocks corresponding to the second reserved area, and the control unit is configured to assign a second virtual block included in the global reserved area to the first user area if the control unit detects a first virtual block included in the first user area is a bad block.
摘要翻译：存储装置包括第一存储芯片和第二存储芯片; 以及控制单元，被配置为管理全局保留区域，第一存储器芯片的第一虚拟区域和第二存储器芯片的第二虚拟区域，其中，第一虚拟区域包括第一用户区域和第一保留区域，第二虚拟区域包括第二用户区域和第二保留区域，全局保留区域包括对应于第一保留区域的第一多个保留块和对应于第二保留区域的第二多个保留块，并且控制单元是被配置为如果所述控制单元检测到包括在所述第一用户区域中的第一虚拟块是坏块，则将包含在所述全局保留区域中的第二虚拟块分配给所述第一用户区域。

4. 发明授权

US07979631B2 Method of prefetching data in hard disk drive, recording medium including program to execute the method, and apparatus to perform the method 有权
标题翻译：在硬盘驱动器中预取数据的方法，包括执行该方法的程序的记录介质以及执行该方法的装置
公开(公告)号：US07979631B2
公开(公告)日：2011-07-12
申请号：US12174661
申请日：2008-07-17
申请人： Seong-jun Ahn , Hyung-gyu Lee , Jung-hwan Kim , Young-bong Kim , Sine Kim , Young-il Seo , Chan-ho Park
发明人： Seong-jun Ahn , Hyung-gyu Lee , Jung-hwan Kim , Young-bong Kim , Sine Kim , Young-il Seo , Chan-ho Park
IPC分类号： G06F12/08
CPC分类号： G06F12/0862 , G06F12/0866 , G06F12/0897 , G06F2212/221 , G06F2212/222
摘要： A method of prefetching data in a hard disk drive includes searching for a logic block address (LBA) of data requested by an external apparatus in a history of a non-volatile cache of the hard disk drive, and if the LBA of the data is stored in the history, storing data recorded in a LBA stored after the LBA of the data requested by the external apparatus from among LBAs stored in the history in a buffer of the hard disk drive.
摘要翻译：在硬盘驱动器中预取数据的方法包括在硬盘驱动器的非易失性缓存的历史中搜索由外部设备请求的数据的逻辑块地址（LBA），并且如果数据的LBA为存储在历史中，将存储在由外部设备请求的数据的LBA之后存储的LBA中的数据从存储在历史中的LBA中存储在硬盘驱动器的缓冲器中。

5. 发明申请

US20100074012A1 Least significant bit page recovery method used in multi-level cell flash memory device 有权
标题翻译：在多级单元闪存设备中使用的最不重要的位页恢复方法
公开(公告)号：US20100074012A1
公开(公告)日：2010-03-25
申请号：US12585299
申请日：2009-09-10
申请人： Kyung-min Park , Seong-jun Ahn
发明人： Kyung-min Park , Seong-jun Ahn
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G11C29/00
摘要： A Least Significant Bit (LSB) page recovery method used in a multi-level cell (MLC) flash memory device is provided. The method includes setting first through nth LSB page groups (n being a natural number that is larger than 2) comprising at least two LSB pages from among the LSB pages included in the MLC flash memory, programming the first through xth LSB pages (x is a natural number that is larger than 2) included in an ith LSB page group (i is a natural number that is smaller than n), generating and storing an ith LSB parity page for the first through xth LSB pages, programming first through xth MSB pages which correspond to one LSB page from among the first through xth LSB pages, and recovering a jth LSB page, which are paired with a jth MSB page, using the ith LSB parity page corresponding to the ith LSB page group, when a power supply to the MLC flash memory is stopped during the programming of the jth MSB page (j is a natural number that is smaller than x).
摘要翻译：提供了在多级单元（MLC）闪存设备中使用的最低有效位（LSB）页面恢复方法。该方法包括从包括在MLC闪存中的LSB页中设置包括至少两个LSB页的第一至第N个LSB页组（n是大于2的自然数），编程第一至第十LSB页（x为大于2的自然数）包含在第i个LSB页组中（i是小于n的自然数），生成并存储第一至第LSB LSB页的第i个LSB奇偶校验页，首先编程到第x个MSB 对应于从第一至第LSB LSB页中的一个LSB页面的页面，以及使用与第i个LSB页面组对应的第i个LSB奇偶校验页面，恢复与第j个MSB页面配对的第j个LSB页面，当电源在第j个MSB页面的编程期间，停止MLC闪速存储器（j是小于x的自然数）。

6. 发明授权

US07990765B2 Least significant bit page recovery method used in multi-level cell flash memory device 有权
标题翻译：在多级单元闪存设备中使用的最不重要的位页恢复方法
公开(公告)号：US07990765B2
公开(公告)日：2011-08-02
申请号：US12585299
申请日：2009-09-10
申请人： Kyung-min Park , Seong-jun Ahn
发明人： Kyung-min Park , Seong-jun Ahn
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G11C29/00
摘要： A Least Significant Bit (LSB) page recovery method used in a multi-level cell (MLC) flash memory device includes setting first through nth LSB page groups (n being a natural number that is larger than 2) comprising at least two LSB pages from among the LSB pages included in the MLC flash memory, programming the first through xth LSB pages (x is a natural number that is larger than 2) included in an ith LSB page group (i is a natural number that is smaller than n), generating and storing an ith LSB parity page for the first through xth LSB pages, programming first through xth MSB pages which correspond to one LSB page from among the first through xth LSB pages, and recovering a jth LSB page, which are paired with a jth MSB page, using the ith LSB parity page corresponding to the ith LSB page group, when a power supply to the MLC flash memory is stopped during the programming of the jth MSB page (j is a natural number that is smaller than x).
摘要翻译：在多级单元（MLC）闪速存储器件中使用的最低有效位（LSB）页恢复方法包括将包括至少两个LSB页的第一至第N个LSB页组（n为大于2的自然数）在包含在MLC闪速存储器中的LSB页之中，对包含在第i个LSB页组（i是小于n的自然数）中的第一至第x LSB页（x是大于2的自然数）进行编程，生成和存储第一至第LSB LSB页面的第i个LSB奇偶校验页面，对应于第一至第LSB页面中的一个LSB页面的第一至第X个MSB页面进行编程，以及恢复与第j个LSB页面配对的第j个LSB页面当在第j个MSB页面的编程（j是小于x的自然数）中停止向MLC闪存的电源供应时，使用与第i个LSB页组对应的第i个LSB奇偶校验页面。

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