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1. 发明申请

US20110101114A1 Memory System and Data Reading Method Thereof 有权
标题翻译：内存系统及其数据读取方法
公开(公告)号：US20110101114A1
公开(公告)日：2011-05-05
申请号：US13006068
申请日：2011-01-13
申请人： Byeong-Hoon Lee , Ki-Hong Kim , Seung-Won Lee , Sun-Kwon Kim
发明人： Byeong-Hoon Lee , Ki-Hong Kim , Seung-Won Lee , Sun-Kwon Kim
IPC分类号： G11C16/06 , G11C16/04 , G11C16/24 , G11C16/26 , G06K19/073
CPC分类号： G11C16/0483
摘要： A memory system includes a memory and a memory controller operating to control the memory. The memory includes a random accessible memory including a memory cell array operable in a random access mode, a NAND flash memory, and a selection circuit making the memory controller operate either one of the random accessible memory or the NAND flash memory.
摘要翻译：存储器系统包括操作以控制存储器的存储器和存储器控制器。存储器包括随机存取存储器，其包括以随机存取模式操作的存储单元阵列，NAND闪速存储器和使存储器控制器操作随机存取存储器或NAND闪速存储器之一的选择电路。

2. 发明授权

US07288926B2 Internal power voltage generator for reducing current consumption 有权
标题翻译：内部电源电压降低电流消耗
公开(公告)号：US07288926B2
公开(公告)日：2007-10-30
申请号：US11050639
申请日：2005-02-03
申请人： Byeong-Hoon Lee , Sun-Kwon Kim
发明人： Byeong-Hoon Lee , Sun-Kwon Kim
IPC分类号： G05F3/16
CPC分类号： G05F1/465
摘要： An internal voltage generator and method are provided, the internal voltage generator including a first reference voltage generator for receiving an external voltage and providing a first reference voltage, a second reference voltage generator for receiving an internal voltage and providing a second reference voltage, and a voltage regulator in signal communication with the first reference voltage generator and/or the second reference voltage generator for receiving one of the first and second reference voltages and providing the internal voltage; and the method for generating an internal voltage including receiving an external voltage, generating a first reference voltage responsive to the received external voltage, regulating an internal voltage in correspondence with the first reference voltage, generating a second reference voltage responsive to the internal voltage, and regulating the internal voltage in correspondence with the second reference voltage.
摘要翻译：提供内部电压发生器和方法，所述内部电压发生器包括用于接收外部电压并提供第一参考电压的第一参考电压发生器，用于接收内部电压并提供第二参考电压的第二参考电压发生器，以及与第一参考电压发生器和/或第二参考电压发生器进行信号通信的电压调节器，用于接收第一和第二参考电压之一并提供内部电压; 以及用于产生包括接收外部电压的内部电压的方法，响应于所接收的外部电压产生第一参考电压，根据第一参考电压调节内部电压，产生响应于内部电压的第二参考电压，以及根据第二参考电压调节内部电压。

3. 发明申请

US20060061346A1 Internal power voltage generator for reducing current consumption 有权
标题翻译：内部电源电压降低电流消耗
公开(公告)号：US20060061346A1
公开(公告)日：2006-03-23
申请号：US11050639
申请日：2005-02-03
申请人： Byeong-Hoon Lee , Sun-Kwon Kim
发明人： Byeong-Hoon Lee , Sun-Kwon Kim
IPC分类号： G05F3/16
CPC分类号： G05F1/465
摘要： An internal voltage generator and method are provided, the internal voltage generator including a first reference voltage generator for receiving an external voltage and providing a first reference voltage, a second reference voltage generator for receiving an internal voltage and providing a second reference voltage, and a voltage regulator in signal communication with the first reference voltage generator and/or the second reference voltage generator for receiving one of the first and second reference voltages and providing the internal voltage; and the method for generating an internal voltage including receiving an external voltage, generating a first reference voltage responsive to the received external voltage, regulating an internal voltage in correspondence with the first reference voltage, generating a second reference voltage responsive to the internal voltage, and regulating the internal voltage in correspondence with the second reference voltage.
摘要翻译：提供内部电压发生器和方法，所述内部电压发生器包括用于接收外部电压并提供第一参考电压的第一参考电压发生器，用于接收内部电压并提供第二参考电压的第二参考电压发生器，以及与第一参考电压发生器和/或第二参考电压发生器进行信号通信的电压调节器，用于接收第一和第二参考电压之一并提供内部电压; 以及用于产生包括接收外部电压的内部电压的方法，响应于所接收的外部电压产生第一参考电压，根据第一参考电压调节内部电压，产生响应于内部电压的第二参考电压，以及根据第二参考电压调节内部电压。

4. 发明授权

US08332662B2 Semiconductor integrated circuit and testing method thereof 有权
标题翻译：半导体集成电路及其测试方法
公开(公告)号：US08332662B2
公开(公告)日：2012-12-11
申请号：US12249495
申请日：2008-10-10
申请人： Sun-Kwon Kim , Byeong-Hoon Lee , Ki-Hong Kim , Hyuck-Jun Cho
发明人： Sun-Kwon Kim , Byeong-Hoon Lee , Ki-Hong Kim , Hyuck-Jun Cho
IPC分类号： G06F21/00
CPC分类号： G06K19/0723
摘要： A semiconductor integrated circuit including a detector and a secure checker. The detector generates a detection signal upon sensing an abnormal state in an operating environment of the semiconductor integrated circuit. The secure checker generates a check signal to find an operating condition of the detector and receives the detection signal. The detector activates the detection signal in response to the check signal.
摘要翻译：一种包括检测器和安全检查器的半导体集成电路。该检测器在感测半导体集成电路的工作环境中的异常状态时产生检测信号。安全检查器产生检查信号以找到检测器的操作条件并接收检测信号。检测器响应于检查信号激活检测信号。

5. 发明授权

US07970982B2 Memory card and memory system having the same 失效
标题翻译：存储卡和存储器系统具有相同的功能
公开(公告)号：US07970982B2
公开(公告)日：2011-06-28
申请号：US11761620
申请日：2007-06-12
申请人： Ki-Hong Kim , Byeong-Hoon Lee , Seung-Won Lee , Sun-Kwon Kim
发明人： Ki-Hong Kim , Byeong-Hoon Lee , Seung-Won Lee , Sun-Kwon Kim
IPC分类号： G06F12/02
CPC分类号： G11C16/20
摘要： A memory card includes: a first memory chip responding to all commands input externally; and a second memory chip responding to commands, among the commands input externally, relevant to reading, programming, and erasing operations with data. Card identification information stored in the first memory chip includes capacity information corresponding to a sum of sizes of the first and second memory chips. The plurality of memory chips of the memory card are useful in designing the memory card with storage capacity in various forms.
摘要翻译：存储卡包括：响应于外部输入的所有命令的第一存储器芯片; 以及响应命令的第二存储器芯片，在外部输入的命令中与数据的读取，编程和擦除操作相关。存储在第一存储器芯片中的卡识别信息包括对应于第一和第二存储器芯片的尺寸之和的容量信息。存储卡的多个存储芯片可用于以各种形式设计具有存储容量的存储卡。

6. 发明授权

US07489557B2 Methods for reducing write time in nonvolatile memory devices and related devices 有权
标题翻译：减少非易失性存储设备和相关设备中写入时间的方法
公开(公告)号：US07489557B2
公开(公告)日：2009-02-10
申请号：US11691703
申请日：2007-03-27
申请人： Sun-Kwon Kim , Byeong-Hoon Lee
发明人： Sun-Kwon Kim , Byeong-Hoon Lee
IPC分类号： G11C11/03
CPC分类号： G11C16/10 , G11C16/30
摘要： A method of operating a non-volatile memory device includes maintaining a write voltage at a predetermined voltage level for programming and/or erasing a memory cell of the non-volatile memory device during a time between execution of consecutive write operations. For example, the write voltage may be activated at the predetermined voltage level responsive to an initial write command, and discharge of the write voltage may be prevented responsive to a signal indicating consecutive write commands. Related devices are also discussed.
摘要翻译：一种操作非易失性存储器件的方法包括将写入电压保持在预定电压电平，以便在执行连续写入操作之间的时间期间编程和/或擦除非易失性存储器件的存储器单元。例如，可以响应于初始写入命令在预定电压电平下激活写入电压，并且可以根据指示连续写入命令的信号来防止写入电压的放电。还讨论了相关设备。

7. 发明授权

US08259501B2 Flash memory system operating in a random access mode 有权
标题翻译：闪存系统以随机存取模式运行
公开(公告)号：US08259501B2
公开(公告)日：2012-09-04
申请号：US13006068
申请日：2011-01-13
申请人： Byeong-Hoon Lee , Ki-Hong Kim , Seung-Won Lee , Sun-Kwon Kim
发明人： Byeong-Hoon Lee , Ki-Hong Kim , Seung-Won Lee , Sun-Kwon Kim
IPC分类号： G11C16/04
CPC分类号： G11C16/0483
摘要： A memory system includes a memory and a memory controller operating to control the memory. The memory includes a random accessible memory including a memory cell array operable in a random access mode, a NAND flash memory, and a selection circuit making the memory controller operate either one of the random accessible memory or the NAND flash memory.
摘要翻译：存储器系统包括操作以控制存储器的存储器和存储器控制器。存储器包括随机存取存储器，其包括以随机存取模式操作的存储单元阵列，NAND闪速存储器和使存储器控制器操作随机存取存储器或NAND闪速存储器之一的选择电路。

8. 发明申请

US20090095955A1 SEMICONDUCTOR INTEGRATED CIRCUIT AND TESTING METHOD THEREOF 有权
标题翻译：半导体集成电路及其测试方法
公开(公告)号：US20090095955A1
公开(公告)日：2009-04-16
申请号：US12249495
申请日：2008-10-10
申请人： Sun-Kwon Kim , Byeong-Hoon Lee , Ki-Hong Kim , Hyuck-Jun Cho
发明人： Sun-Kwon Kim , Byeong-Hoon Lee , Ki-Hong Kim , Hyuck-Jun Cho
IPC分类号： H01L23/58
CPC分类号： G06K19/0723
摘要： A semiconductor integrated circuit including a detector and a secure checker. The detector generates a detection signal upon sensing an abnormal state in an operating environment of the semiconductor integrated circuit. The secure checker generates a check signal to find an operating condition of the detector and receives the detection signal. The detector activates the detection signal in response to the check signal.
摘要翻译：一种包括检测器和安全检查器的半导体集成电路。该检测器在感测半导体集成电路的工作环境中的异常状态时产生检测信号。安全检查器产生检查信号以找到检测器的操作条件并接收检测信号。检测器响应于检查信号激活检测信号。

9. 发明申请

US20080181008A1 FLASH MEMORY SYSTEM CAPABLE OF IMPROVING ACCESS PERFORMANCE AND ACCESS METHOD THEREOF 审中-公开
标题翻译：能够改善访问性能的FLASH存储器系统及其访问方法
公开(公告)号：US20080181008A1
公开(公告)日：2008-07-31
申请号：US11693106
申请日：2007-03-29
申请人： Byeong-Hoon Lee , Ki-Hong Kim , Seung-Won Lee , Sun-Kwon Kim
发明人： Byeong-Hoon Lee , Ki-Hong Kim , Seung-Won Lee , Sun-Kwon Kim
IPC分类号： G11C11/34
CPC分类号： G11C16/10 , G11C16/20
摘要： A flash memory system capable of improving an access performance and an access method thereof. The system includes: a flash memory device including a plurality of storage regions; a contents memory storing setting information corresponding to the plurality of storage regions, respectively; and a processing unit setting operation conditions of the flash memory device by referring to the setting information during an access operation for the flash memory device.
摘要翻译：一种能够提高访问性能的闪存系统及其访问方法。该系统包括：闪存器件，包括多个存储区域; 内容存储器，分别存储与所述多个存储区域相对应的设置信息; 以及处理单元，在闪速存储器件的访问操作期间参考设置信息来设置闪速存储器件的操作条件。

10. 发明申请

US20060020764A1 Information processing apparatus including non-volatile memory device, non-volatile memory device and methods thereof 审中-公开
标题翻译：信息处理装置，包括非易失性存储装置，非易失性存储装置及其方法
公开(公告)号：US20060020764A1
公开(公告)日：2006-01-26
申请号：US11122027
申请日：2005-05-05
申请人： Sun-Kwon Kim , Byeong-Hoon Lee
发明人： Sun-Kwon Kim , Byeong-Hoon Lee
IPC分类号： G06F12/00
CPC分类号： G11C16/26 , G06F13/1668 , G11C16/10 , G11C2216/22
摘要： An information processing apparatus including, non-volatile memory device, non-volatile memory device and methods thereof. The non-volatile memory device outputs a signal indicating to an external device whether a next command may be executed without a processing interruption. The signal may be based on whether the non-volatile memory device is executing a command when the next command is received.
摘要翻译：一种信息处理设备，包括非易失性存储器件，非易失性存储器件及其方法。非易失性存储器件输出指示外部设备的信号是否可以在没有处理中断的情况下执行下一个命令。信号可以基于当接收到下一个命令时非易失性存储器件是否正在执行命令。

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