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    • 1. 发明申请
    • Apparatus and method for estimating coarse carrier frequency offset for frequency synchronization in OFDM receiver
    • 用于估计OFDM接收机中频率同步的粗载波频偏的装置和方法
    • US20080095249A1
    • 2008-04-24
    • US11645743
    • 2006-12-27
    • Su-Jin YoonYun-Ju KwonHee-Jin Roh
    • Su-Jin YoonYun-Ju KwonHee-Jin Roh
    • H04K1/10
    • H04L27/2675H04L27/2659H04L27/2686
    • An apparatus and method for estimating a coarse carrier frequency offset in an OFDM receiver are provided, in which an Fast Fourier Transform (FFT) unit performs FFT for a received signal over one symbol duration and outputs a previously known signal included in the FFT signal, a correlation value calculator evaluates autocorrelation values of the previously known signal for plural candidate offsets, an accumulator accumulates the autocorrelation values to the autocorrelation values evaluated over a previous symbol duration, and a maximum value selector selects first and second maximum values of the autocorrelation values. A threshold tester compares a ratio between the first and second maximum values with a predetermined threshold, and determines a candidate offset corresponding to the first maximum value as the coarse carrier frequency offset if the ratio is less than the threshold. Otherwise, the threshold tester instructs the FFT unit to receive a signal over a next symbol duration.
    • 提供了一种用于估计OFDM接收机中的粗载波频率偏移的装置和方法,其中快速傅立叶变换(FFT)单元在一个符号持续时间内对接收到的信号执行FFT,并输出包括在FFT信号中的先前已知的信号, 相关值计算器对多个候选偏移的先前已知信号的自相关值进行评估,累加器将自相关值累积到在先前符号持续时间内估计的自相关值,最大值选择器选择自相关值的第一和第二最大值。 阈值测试器将第一和第二最大值之间的比率与预定阈值进行比较,并且如果该比率小于阈值,则将与第一最大值相对应的候选偏移量确定为粗略载波频率偏移。 否则,阈值测试器指示FFT单元在下一个符号持续时间内接收信号。
    • 4. 发明授权
    • Apparatus and method for preventing generation of glitch in a clock switching circuit
    • 用于防止在时钟切换电路中产生毛刺的装置和方法
    • US07961012B2
    • 2011-06-14
    • US12188277
    • 2008-08-08
    • Heon-Seok HongYun-Ju KwonYong-Chan Kim
    • Heon-Seok HongYun-Ju KwonYong-Chan Kim
    • H03K5/00
    • G06F1/10
    • An apparatus and for preventing a glitch in a clock switching circuit includes a select signal manager and a clock gate unit. The select signal manager generates a detect change signal, provides the detect change signal as an input signal for generating a clock gate signal to the clock gate unit, and changes a muxsel signal into a select signal using the clock gate signal to select a clock intending for switching. Upon receiving the detect change signal, the clock gate unit gates a received clock, generates the clock gate signal using a level of the detect change signal as an input signal, and provides the generated clock gate signal to the select signal manager.
    • 一种用于防止时钟切换电路中的毛刺的装置包括选择信号管理器和时钟门单元。 选择信号管理器生成检测改变信号,将检测改变信号提供为用于产生时钟门信号到时钟门单元的输入信号,并使用时钟门信号将多路复用器信号改变为选择信号,以选择时钟 用于切换。 在接收到检测变化信号时,时钟门单元对接收到的时钟进行门控,使用检测变化信号的电平作为输入信号产生时钟门信号,并将所生成的时钟门信号提供给选择信号管理器。
    • 10. 发明申请
    • APPARATUS AND METHOD FOR PREVENTING GENERATION OF GLITCH IN A CLOCK SWITCHING CIRCUIT
    • 用于防止在时钟切换电路中产生玻璃的装置和方法
    • US20090039940A1
    • 2009-02-12
    • US12188277
    • 2008-08-08
    • Heon-Seok HongYun-Ju KwonYong-Chan Kim
    • Heon-Seok HongYun-Ju KwonYong-Chan Kim
    • G06F1/04
    • G06F1/10
    • An apparatus and for preventing a glitch in a clock switching circuit includes a select signal manager and a clock gate unit. The select signal manager generates a detect change signal, provides the detect change signal as an input signal for generating a clock gate signal to the clock gate unit, and changes a muxsel signal into a select signal using the clock gate signal to select a clock intending for switching. Upon receiving the detect change signal, the clock gate unit gates a received clock, generates the clock gate signal using a level of the detect change signal as an input signal, and provides the generated clock gate signal to the select signal manager.
    • 一种用于防止时钟切换电路中的毛刺的装置包括选择信号管理器和时钟门单元。 选择信号管理器生成检测改变信号,将检测改变信号提供为用于产生时钟门信号到时钟门单元的输入信号,并使用时钟门信号将多路复用器信号改变为选择信号,以选择时钟 用于切换。 在接收到检测变化信号时,时钟门单元对接收到的时钟进行门控,使用检测变化信号的电平作为输入信号产生时钟门信号,并将所生成的时钟门信号提供给选择信号管理器。