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1. 发明授权

US4780842A Cellular processor apparatus capable of performing floating point arithmetic operations 失效
标题翻译：能进行浮点运算的蜂窝处理装置
公开(公告)号：US4780842A
公开(公告)日：1988-10-25
申请号：US844395
申请日：1986-03-26
申请人： Steven G. Morton , Enrique J. Abreu
发明人： Steven G. Morton , Enrique J. Abreu
IPC分类号： G06F7/57 , G06F11/00 , G06F15/80 , G06F7/38 , G06F13/00
CPC分类号： G06F7/483 , G06F15/8023 , G06F2207/3856 , G06F2207/3896 , G06F7/4991 , G06F7/49936 , G06F7/49947
摘要： A processor apparatus which is capable of performing floating point arithmetic. The processor apparatus includes a plurality of individual processing cells which are interconnected from left to right in a chain so that any of the processor cells can operate to receive a bit of any slice in a digital word. Each cell includes a memory which essentially is coupled via a multiplexer to an arithmetic logic unit, a controllable multiplier quotient store, a controllable loop path, and controllable status path device. Each of these devices are under control of a control mechanism which is included in the cell, and therefore each path can be connected to any other path via various multiplexers utilized in the circuitry. Essentially, each cell includes a multiport RAM, programmable logic arrays which implement the control logic plus path logic which provides the communication between neighboring cells. In order to command a particular 1-bit processor to perform as a particular bit in a floating point word, a multiplicity of slice types is defined. Hence the floating point implementation requires 15 slice types to handle all different combinations of bit operations that must be performed. The logic is such that defective 1-bit processors appear invisible so that data can flow across them without interference. The cell is a relatively unified structure whereby each cell can be thus commanded to perform a particular operation on a particular slice of a given word independent of the operation of any other cell.
摘要翻译：一种能够进行浮点运算的处理器装置。处理器装置包括多个单独处理单元，它们在链中从左到右互连，使得处理器单元中的任何一个可以操作以接收数字字中的任何切片的位。每个单元包括基本上通过多路复用器耦合到算术逻辑单元，可控乘法器商存储器，可控环路径和可控状态路径设备的存储器。这些设备中的每一个都在被包括在单元中的控制机构的控制下，并且因此每个路径可以经由在电路中使用的各种多路复用器连接到任何其他路径。本质上，每个单元包括多端口RAM，其实现了提供相邻单元之间的通信的控制逻辑加路径逻辑的可编程逻辑阵列。为了命令特定的1位处理器作为浮点字中的特定位执行多个片类型的定义。因此，浮点实现需要15个片类型来处理必须执行的位操作的所有不同组合。逻辑是这样的，有缺陷的1位处理器看起来是不可见的，因此数据可以跨越它们而不受干扰。该小区是相对统一的结构，由此可以使每个小区被命令对独立于任何其他小区的操作的给定单词的特定切片执行特定操作。

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