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1. 发明申请

US20060005084A1 Support for nested faults in a virtual machine environment 有权
标题翻译：支持虚拟机环境中的嵌套故障
公开(公告)号：US20060005084A1
公开(公告)日：2006-01-05
申请号：US10882813
申请日：2004-06-30
申请人： Gilbert Neiger , Andrew Anderson , Steven Bennett , Jason Brandt , Erik Cota-Robles , Stalinselvaraj Jeyasingh , Alain Kagi , Sanjoy Mondal , Rajesh Parthasarathy , Dion Rodgers , Lawrence Smith , Richard Uhlig
发明人： Gilbert Neiger , Andrew Anderson , Steven Bennett , Jason Brandt , Erik Cota-Robles , Stalinselvaraj Jeyasingh , Alain Kagi , Sanjoy Mondal , Rajesh Parthasarathy , Dion Rodgers , Lawrence Smith , Richard Uhlig
IPC分类号： G06F11/00
CPC分类号： G06F9/45533 , G06F11/0712 , G06F11/0775 , G06F11/0787 , G06F11/0793
摘要： In one embodiment, information pertaining to a first fault occurring during operation of a virtual machine (VM) is stored in a first field. A second fault is detected while delivering the first fault to the VM, and a determination is made as to whether the second fault is associated with a transition of control to a virtual machine monitor (VMM). If this determination is positive, information pertaining to the second fault is stored in a second field, and control is transitioned to the VMM.
摘要翻译：在一个实施例中，关于在虚拟机（VM）的操作期间发生的第一故障的信息被存储在第一字段中。在向VM提供第一故障时检测到第二故障，并且确定第二故障是否与对虚拟机监视器（VMM）的控制转换相关联。如果该确定是肯定的，则关于第二故障的信息被存储在第二场中，并且控制被转换到VMM。

2. 发明申请

US20050240819A1 Providing support for single stepping a virtual machine in a virtual machine environment 有权
标题翻译：为在虚拟机环境中单步执行虚拟机提供支持
公开(公告)号：US20050240819A1
公开(公告)日：2005-10-27
申请号：US10814569
申请日：2004-03-30
申请人： Steven Bennett , Andrew Anderson , Erik Cota-Robles , Stalinselvaraj Jeyasingh , Alain Kagi , Gilbert Neiger , Richard Uhlig , Sanjoy Mondal , Jason Brandt
发明人： Steven Bennett , Andrew Anderson , Erik Cota-Robles , Stalinselvaraj Jeyasingh , Alain Kagi , Gilbert Neiger , Richard Uhlig , Sanjoy Mondal , Jason Brandt
IPC分类号： G06F9/44 , G06F9/455 , G06F11/00 , G06F11/36
CPC分类号： G06F11/3664 , G06F9/45558 , G06F2009/45579 , G06F2009/45591
摘要： In one embodiment, a method includes receiving a request to transition control to a virtual machine (VM) from a virtual machine monitor (VMM), determining that a single-stepping indicator is set to a single stepping value, and transitioning control to the VM. Further, if an execution of a first instruction in the VM completes successfully, control is transitioned to the VMM following the successful completion of the execution of the first instruction.
摘要翻译：在一个实施例中，一种方法包括从虚拟机监视器（VMM）接收向虚拟机（VM）转换控制的请求，确定单步指标被设置为单个步进值，以及将控制转换到VM 。此外，如果VM中的第一指令的执行成功完成，则在成功完成第一指令的执行之后，将控制转换到VMM。

3. 发明授权

US07356735B2 Providing support for single stepping a virtual machine in a virtual machine environment 有权
标题翻译：为在虚拟机环境中单步执行虚拟机提供支持
公开(公告)号：US07356735B2
公开(公告)日：2008-04-08
申请号：US10814569
申请日：2004-03-30
申请人： Steven M. Bennett , Andrew V. Anderson , Erik Cota-Robles , Stalinselvaraj Jeyasingh , Alain Kägi , Gilbert Neiger , Richard Uhlig , Sanjoy K. Mondal , Jason Brandt
发明人： Steven M. Bennett , Andrew V. Anderson , Erik Cota-Robles , Stalinselvaraj Jeyasingh , Alain Kägi , Gilbert Neiger , Richard Uhlig , Sanjoy K. Mondal , Jason Brandt
IPC分类号： G06F11/00
CPC分类号： G06F11/3664 , G06F9/45558 , G06F2009/45579 , G06F2009/45591
摘要： Methods and systems to provide support for single stepping a virtual machine in a virtual machine environment are disclosed. An exemplary method may include receiving a request to transition control to a virtual machine (VM) from a virtual machine monitor (VMM), determining that a single-stepping indicator is set to a single stepping value, and transitioning control to the VM. Further, if an execution of a first instruction in the VM completes successfully, control is transitioned to the VMM following the successful completion of the execution of the first instruction.
摘要翻译：公开了在虚拟机环境中单步执行虚拟机的方法和系统。示例性方法可以包括从虚拟机监视器（VMM）接收向虚拟机（VM）转换控制的请求，确定单步指示符被设置为单个步进值，并将控制转换到VM。此外，如果VM中的第一指令的执行成功完成，则在成功完成第一指令的执行之后，将控制转换到VMM。

4. 发明授权

US07305592B2 Support for nested fault in a virtual machine environment 有权
标题翻译：支持虚拟机环境中的嵌套故障
公开(公告)号：US07305592B2
公开(公告)日：2007-12-04
申请号：US10882813
申请日：2004-06-30
申请人： Gilbert Neiger , Andrew V. Anderson , Steven M. Bennett , Jason Brandt , Erik Cota-Robles , Stalinselvaraj Jeyasingh , Alain Kägi , Sanjoy K. Mondal , Rajesh Parthasarathy , Dion Rodgers , Lawrence O. Smith , Richard A. Uhlig
发明人： Gilbert Neiger , Andrew V. Anderson , Steven M. Bennett , Jason Brandt , Erik Cota-Robles , Stalinselvaraj Jeyasingh , Alain Kägi , Sanjoy K. Mondal , Rajesh Parthasarathy , Dion Rodgers , Lawrence O. Smith , Richard A. Uhlig
IPC分类号： G06F11/00
CPC分类号： G06F9/45533 , G06F11/0712 , G06F11/0775 , G06F11/0787 , G06F11/0793
摘要： In one embodiment, information pertaining to a first fault occurring during operation of a virtual machine (VM) is stored in a first field. A second fault is detected while delivering the first fault to the VM, and a determination is made as to whether the second fault is associated with a transition of control to a virtual machine monitor (VMM). If this determination is positive, information pertaining to the second fault is stored in a second field, and control is transitioned to the VMM.
摘要翻译：在一个实施例中，关于在虚拟机（VM）的操作期间发生的第一故障的信息被存储在第一字段中。在向VM提供第一故障时检测到第二故障，并且确定第二故障是否与对虚拟机监视器（VMM）的控制转换相关联。如果该确定是肯定的，则关于第二故障的信息被存储在第二场中，并且控制被转换到VMM。

5. 发明申请

US20060026384A1 Maintaining processor resources during architectural events 有权
公开(公告)号：US20060026384A1
公开(公告)日：2006-02-02
申请号：US10903704
申请日：2004-07-30
申请人： Jason Brandt , Sanjoy Mondal , Richard Uhlig , Gilbert Neiger , Robert George
发明人： Jason Brandt , Sanjoy Mondal , Richard Uhlig , Gilbert Neiger , Robert George
IPC分类号： G06F12/10
CPC分类号： G06F12/1036 , G06F9/45533 , G06F9/45558 , G06F9/4843 , G06F12/0292 , G06F12/0804 , G06F12/0891 , G06F12/1027 , G06F12/1063 , G06F12/109 , G06F12/12 , G06F12/123 , G06F2009/45583 , G06F2009/45591 , G06F2212/1016 , G06F2212/152 , G06F2212/30 , G06F2212/50 , G06F2212/604 , G06F2212/657 , G06F2212/68 , G06F2212/683 , G06F2212/684 , G06F2212/69 , G06F2212/70
摘要： In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.

6. 发明申请

US20070006230A1 Method and apparatus for a guest to access a privileged register 有权
标题翻译：客人访问特权登记册的方法和装置
公开(公告)号：US20070006230A1
公开(公告)日：2007-01-04
申请号：US11173312
申请日：2005-06-30
申请人： Gilbert Neiger , Richard Uhlig , Dion Rodgers , Jason Brandt , Rajesh Parthasarathy
发明人： Gilbert Neiger , Richard Uhlig , Dion Rodgers , Jason Brandt , Rajesh Parthasarathy
IPC分类号： G06F9/46
CPC分类号： G06F9/45533
摘要： Embodiments of apparatuses and methods for guest processes to access registers are disclosed. In one embodiment, an apparatus includes an interface to a first register, shadow logic, evaluation logic, and exit logic. The shadow logic is to, in response to a guest attempt to write data to the first register, cause the data to be written to a second register. The evaluation logic is to determine, based on the value of the data, whether to transfer control to a host in response to the guest attempt. The exit logic is to transfer control to the host after the data is written to the second register if the evaluation logic determines to transfer control.
摘要翻译：公开了访问进程访问寄存器的装置和方法的实施例。在一个实施例中，装置包括到第一寄存器，影子逻辑，评估逻辑和退出逻辑的接口。影子逻辑是为了响应客人尝试向第一寄存器写入数据，使数据被写入第二寄存器。评估逻辑是基于数据的值来确定是否将控制转移给主机以响应客人尝试。如果评估逻辑确定传输控制，则退出逻辑是在将数据写入第二寄存器之后将控制传送到主机。

7. 发明申请

US20130179706A1 User Level Control Of Power Management Policies 审中-公开
标题翻译：电力管理政策的用户级别控制
公开(公告)号：US20130179706A1
公开(公告)日：2013-07-11
申请号：US13782473
申请日：2013-03-01
申请人： Krishnakanth V. Sistla , Jeremy Shrall , Stephen H. Gunther , Efraim Rotem , Alon Naveh , Eliezer Weissmann , Anil Aggarwal , Martin T. Rowland , Ankush Varma , Ian M. Steiner , Matthew Bace , Avinash N. Ananthakrishnan , Jason Brandt
发明人： Krishnakanth V. Sistla , Jeremy Shrall , Stephen H. Gunther , Efraim Rotem , Alon Naveh , Eliezer Weissmann , Anil Aggarwal , Martin T. Rowland , Ankush Varma , Ian M. Steiner , Matthew Bace , Avinash N. Ananthakrishnan , Jason Brandt
IPC分类号： G06F1/26
CPC分类号： G06F1/3275 , G06F1/266 , G06F1/3203 , G06F1/3206 , G06F1/3234
摘要： In one embodiment, the present invention includes a processor having a core and a power controller to control power management features of the processor. The power controller can receive an energy performance bias (EPB) value from the core and access a power-performance tuning table based on the value. Using information from the table, at least one setting of a power management feature can be updated. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，本发明包括具有核心的处理器和用于控制处理器的电源管理特征的功率控制器。功率控制器可以从核心接收能量性能偏差（EPB）值，并根据该值访问功率性能调谐表。使用表中的信息，可以更新电源管理功能的至少一个设置。描述和要求保护其他实施例。

8. 发明申请

US20120079248A1 Aliased Parameter Passing Between Microcode Callers and Microcode Subroutines 审中-公开
标题翻译：微代码和微代码子程序之间的别名参数传递
公开(公告)号：US20120079248A1
公开(公告)日：2012-03-29
申请号：US12890292
申请日：2010-09-24
申请人： Jonathan D. Combs , Kameswar Subramaniam , Jason Brandt
发明人： Jonathan D. Combs , Kameswar Subramaniam , Jason Brandt
IPC分类号： G06F9/30 , G06F9/22
CPC分类号： G06F9/384 , G06F9/226 , G06F9/26 , G06F9/30145 , G06F9/3824 , G06F9/4484
摘要： An apparatus of an aspect includes a plurality of microcode alias locations and a microcode storage. A microinstruction of a microcode subroutine is stored in the microcode storage. The microinstruction has an indication of a microcode alias location. A microcode caller of the microcode subroutine is also stored in the microcode storage. The microcode caller is operable to specify a location of a parameter in the microcode alias location that is indicated by the microinstruction of the microcode subroutine. The apparatus also includes parameter location determination logic that is coupled with the microcode alias locations. The parameter location determination logic is operable, responsive to the microinstruction of the microcode subroutine, to receive the indication of the microcode alias location from the microinstruction and determine the location of the parameter specified in the microcode alias location indicated by the microinstruction.
摘要翻译：一个方面的装置包括多个微码别名位置和微码存储器。微代码子程序的微指令存储在微代码存储器中。微指令具有微代码位置的指示。微码子程序的微代码调用者也存储在微代码存储器中。微代码调用者可操作地指定由微代码子程序的微指令指示的微代码别名位置中的参数的位置。该装置还包括与微码别名位置耦合的参数位置确定逻辑。参数位置确定逻辑可操作以响应于微代码子程序的微指令，从微指令接收微码别名位置的指示，并确定由微指令指示的微码别名位置中指定的参数的位置。

9. 发明申请

US20140019733A1 REAL TIME INSTRUCTION TRACING COMPRESSION OF RET INSTRUCTIONS 有权
标题翻译：实时指令跟踪RET指令的压缩
公开(公告)号：US20140019733A1
公开(公告)日：2014-01-16
申请号：US13992712
申请日：2011-12-31
申请人： Jason Brandt , Jonathan Tyler , John Zurawski , Dennis Lastor
发明人： Jason Brandt , Jonathan Tyler , John Zurawski , Dennis Lastor
IPC分类号： G06F9/30
CPC分类号： G06F9/30145 , G06F11/30 , G06F11/3466 , G06F11/348 , G06F11/3636 , G06F2201/805
摘要： In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for implementing Real Time Instruction Tracing compression of RET instructions For example, in one embodiment, such means may include an integrated circuit having means for initiating instruction tracing for instructions of a traced application, mode, or code region, as the instructions are executed by the integrated circuit; means for generating a plurality of packets describing the instruction tracing; and means for compressing a multi-bit RET instruction (RETurn instruction) to a single bit RET instruction.
摘要翻译：根据本文公开的实施例，提供了用于实现RET指令的实时指令跟踪压缩的方法，系统，机制，技术和装置。例如，在一个实施例中，这种装置可以包括具有用于发起指令跟踪的装置的集成电路用于由跟踪的应用程序，模式或代码区域的指令，因为指令由集成电路执行; 用于产生描述所述指令跟踪的多个分组的装置; 以及用于将多位RET指令（RETurn指令）压缩到单个位RET指令的装置。

10. 发明申请

US20120204042A1 User Level Control Of Power Management Policies 有权
标题翻译：电力管理政策的用户级别控制
公开(公告)号：US20120204042A1
公开(公告)日：2012-08-09
申请号：US13326586
申请日：2011-12-15
申请人： Krishnakanth V. Sistla , Jeremy Shrall , Stephen H. Gunther , Efraim Rotem , Alon Naveh , Eliezer Weissmann , Anil Aggarwal , Martin T. Rowland , Ankush Varma , Ian M. Steiner , Matthew Bace , Avinash N. Ananthakrishnan , Jason Brandt
发明人： Krishnakanth V. Sistla , Jeremy Shrall , Stephen H. Gunther , Efraim Rotem , Alon Naveh , Eliezer Weissmann , Anil Aggarwal , Martin T. Rowland , Ankush Varma , Ian M. Steiner , Matthew Bace , Avinash N. Ananthakrishnan , Jason Brandt
IPC分类号： G06F1/32 , G06F1/26
CPC分类号： G06F1/3275 , G06F1/266 , G06F1/3203 , G06F1/3206 , G06F1/3234
摘要： In one embodiment, the present invention includes a processor having a core and a power controller to control power management features of the processor. The power controller can receive an energy performance bias (EPB) value from the core and access a power-performance tuning table based on the value. Using information from the table, at least one setting of a power management feature can be updated. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，本发明包括具有核心的处理器和用于控制处理器的电源管理特征的功率控制器。功率控制器可以从核心接收能量性能偏差（EPB）值，并根据该值访问功率性能调谐表。使用表中的信息，可以更新电源管理功能的至少一个设置。描述和要求保护其他实施例。

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