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1. 发明申请

US20080278216A1 Modular Switching Arrangement 有权
标题翻译：模块化开关布置
公开(公告)号：US20080278216A1
公开(公告)日：2008-11-13
申请号：US11814163
申请日：2006-01-13
申请人： Stephane Darriet , Cicero S. Vaucher
发明人： Stephane Darriet , Cicero S. Vaucher
IPC分类号： H03K17/74
CPC分类号： H03K17/74 , H03K17/76
摘要： The present invention relates to a switching arrangement and method of manufacturing such an arrangement, wherein first and second series-shunt diode structures (D1/D2, D3/D4) are connected to each other in a mirrored configuration to obtain a basic switching cell. This basic switching cell can be used to build a SPDT switch which in turn can be used to build a DPDT switch or switches of higher complexity. Thereby, high isolation and low power consumption can be achieved with the additional advantage of modularity.
摘要翻译：本发明涉及一种制造这种布置的开关装置和方法，其中第一和第二串联分流二极管结构（D 1 / D 2，D 3 / D 4）以镜像配置相互连接以获得基本开关电池这个基本的开关单元可以用于建立一个SPDT开关，这个开关又可以用来构建一个更高复杂度的DPDT开关或开关。因此，可以通过模块化的附加优点实现高隔离度和低功耗。

2. 发明授权

US07898359B2 Modular switching arrangement 有权
标题翻译：模块化交换布置
公开(公告)号：US07898359B2
公开(公告)日：2011-03-01
申请号：US11814163
申请日：2006-01-13
申请人： Stephane Darriet , Cicero S. Vaucher
发明人： Stephane Darriet , Cicero S. Vaucher
IPC分类号： H01P1/10 , H01P1/15
CPC分类号： H03K17/74 , H03K17/76
摘要： The present invention relates to a switching arrangement and method of manufacturing such an arrangement, wherein first and second series-shunt diode structures (D1/D2, D3/D4) are connected to each other in a mirrored configuration to obtain a basic switching cell. This basic switching cell can be used to build a SPDT switch which in turn can be used to build a DPDT switch or switches of higher complexity. Thereby, high isolation and low power consumption can be achieved with the additional advantage of modularity.
摘要翻译：本发明涉及一种制造这种布置的开关装置和方法，其中第一和第二串联分流二极管结构（D1 / D2，D3 / D4）以镜像配置彼此连接以获得基本开关单元。这个基本的开关单元可以用于建立一个SPDT开关，这个开关又可以用来构建一个更高复杂度的DPDT开关或开关。因此，可以通过模块化的附加优点实现高隔离度和低功耗。

3. 发明授权

US5929678A Frequency synthesis circuit having a charge pump 失效
标题翻译：具有电荷泵的频率合成电路
公开(公告)号：US5929678A
公开(公告)日：1999-07-27
申请号：US923048
申请日：1997-09-03
申请人： Wolfdietrich G. Kasperkovitz , Cicero S. Vaucher
发明人： Wolfdietrich G. Kasperkovitz , Cicero S. Vaucher
IPC分类号： H03L7/093 , G05F3/26 , H03L7/089 , H03L7/18 , H03K17/00
CPC分类号： H03L7/0895 , G05F3/265 , H03L7/0896
摘要： A charge pump (CP) is provides for supplying at its output (23) a first current in response to an up-pulse and sinking a second current in response to a down pulse. This charge pump includes a first circuit 200, 22, CM1) for converting the first control signal into the first current, and a second circuit (206, 208, CM2) for converting the second control signal into the second current, said the first and second circuits include circuitry means comprising means (CM1, CM2) for filtering the respective control signals. It is recognized that a charge pump does not have to supply or sink current pulses which are rectangularly shaped in order for it to properly carry out its function. In the subject charge pump invention, the current sources supply or sink current pulses are smoothly shaped because the control signals supplied to the current sources are filtered. This causes the demands on the high frequency performance of the current sources to be greatly reduced. Consequently, relatively slow current sources may be used without the performance of the charge pump being limited by these slow current sources.
摘要翻译：电荷泵（CP）用于在其输出端（23）提供响应于上升脉冲的第一电流并响应于下降脉冲吸收第二电流。该电荷泵包括用于将第一控制信号转换为第一电流的第一电路200,22，CM1，以及用于将第二控制信号转换成第二电流的第二电路（206,208，CM2），所述第一和第二电路包括电路装置，包括用于对各个控制信号进行滤波的装置（CM1，CM2）。可以认识到，电荷泵不必提供或吸收矩形形状的电流脉冲，以使其正常地执行其功能。在本发明的电荷泵发明中，由于提供给电流源的控制信号被滤波，电流源电流或电流电流脉冲是平滑的。这导致对电流源的高频性能的要求大大降低。因此，可以使用相对较慢的电流源，而电荷泵的性能不受这些慢电流源的限制。

4. 发明授权

US5809407A Receiver, an arrangement and a method for comparing two signals 失效
标题翻译：接收机，用于比较两个信号的布置和方法
公开(公告)号：US5809407A
公开(公告)日：1998-09-15
申请号：US762681
申请日：1996-12-11
申请人： Wolfdietrich G. Kasperkovitz , Cicero S. Vaucher
发明人： Wolfdietrich G. Kasperkovitz , Cicero S. Vaucher
IPC分类号： H03J7/00 , H04B1/10 , H04B1/16 , H04B17/00 , H04B1/18
CPC分类号： H03J7/183 , H03J1/0008 , H04H60/58
摘要： A receiver, an arrangement and a method for comparing two signals, based on testing whether a first signal exhibits at least one property during a first time interval, and consecutively testing if a second signal exhibits at least one similar property during a second time interval, following the first time interval, the second time interval being in the range of 200 us to 5 ms. The assumption is made that if a first signal exhibits a certain property during a first time interval, it is likely to exhibit substantially the same property during a second time interval, following the first interval. Thus, if a second signal exhibits such a property during the second time interval, the second signal is deemed to be the same as the first signal. If both tests are positive, the two signals are determined to be the same. In this way, both signals need not be present simultaneously. By choosing the second interval in the range as given above, no extremely fast tuning system is needed, without the comparison becoming annoyingly audible.
摘要翻译：一种基于测试第一信号在第一时间间隔期间是否呈现至少一个属性的接收机，布置和方法来比较两个信号，并且在第二时间间隔期间连续地测试第二信号是否表现出至少一个类似属性，在第一时间间隔之后，第二时间间隔在200US至5ms的范围内。假设如果第一信号在第一时间间隔期间呈现特定属性，则在第一间隔之后的第二时间间隔内可能表现出基本上相同的性质。因此，如果第二信号在第二时间间隔期间表现出这样的性质，则认为第二信号与第一信号相同。如果两个测试都是正的，则两个信号被确定为相同。以这种方式，两个信号不需要同时存在。通过选择上述范围内的第二个间隔，不需要非常快速的调谐系统，而不会使对比变得恼人的声音。

5. 发明授权

US06665523B1 Receiver tuning system 失效
标题翻译：接收机调谐系统
公开(公告)号：US06665523B1
公开(公告)日：2003-12-16
申请号：US09039348
申请日：1998-03-13
申请人： Wolfdietrich G. Kasperkovitz , Cicero S. Vaucher
发明人： Wolfdietrich G. Kasperkovitz , Cicero S. Vaucher
IPC分类号： H04B140
CPC分类号： H03J1/005 , H03L7/187 , H03L7/23
摘要： In a receiver, a frequency-synthesis circuit (SYNTH) generates a stepped-frequency signal (Ssf) having a frequency which can be varied in steps. A synchronization circuit (LOOP) synchronizes a tuning oscillator (LO) with the stepped-frequency signal (Ssf). It provides an integer frequency-relationship between the stepped-frequency signal (Ssf) and the tuning oscillator (LO). That is, if the stepped-frequency signal (Ssf) has a frequency Fsf, the tuning oscillator (LO) will operate at a frequency Flo=N·Fsf, N being an integer or an integer fraction.
摘要翻译：在接收机中，频率合成电路（SYNTH）产生具有能够逐步变化的频率的阶跃频率信号（Ssf）。同步电路（LOOP）使调谐振荡器（LO）与步进频率信号（Ssf）同步。它提供阶梯式频率信号（Ssf）和调谐振荡器（LO）之间的整数频率关系。也就是说，如果步进频率信号（Ssf）具有频率Fsf，则调谐振荡器（LO）将以频率Flo = N.FFf，N为整数或整数分数来工作。

6. 发明授权

US06366769B1 Frequency snythesizer with a digital frequency window detector and a receiver incorporating the same 有权
标题翻译：具有数字频率窗口检测器和包含该数字频率窗口检测器的接收器的频率监测器
公开(公告)号：US06366769B1
公开(公告)日：2002-04-02
申请号：US09419670
申请日：1999-10-15
申请人： Cicero S. Vaucher , Wolfdietrich G. Kasperkovitz
发明人： Cicero S. Vaucher , Wolfdietrich G. Kasperkovitz
IPC分类号： H04B700
CPC分类号： H03J7/065 , H03J5/0272 , H03L7/087 , H03L7/0891
摘要： Frequency synthesizers are used for down conversion of RF signals in a lot of applications, such as digital and analog radio and television receivers, car radios, etc. By combining the voltage-controlled oscillator of the phase-locked loop demodulator with the voltage-controlled oscillator of the frequency synthesizer, a major cost reduction can be achieved, but measures have to be taken to prevent that the two PLLs try to lock the same VCO to different frequencies. These measures include providing a switching circuit between the phase frequency comparator and the charging circuit, and controlling the switching circuit by using a frequency window detector.
摘要翻译：频率合成器用于许多应用中的RF信号的下变频，例如数字和模拟无线电和电视接收机，汽车无线电等。通过将锁相环解调器的压控振荡器与电压控制频率合成器的振荡器，可以实现主要的成本降低，但是必须采取措施来防止两个PLL尝试将相同的VCO锁定到不同的频率。这些措施包括在相位频率比较器和充电电路之间提供开关电路，以及通过使用频率窗口检测器来控制开关电路。

7. 发明授权

US6094568A Radio receiver for receiving a main radio broadcast signal and a monolythic integrated circuit for use in such radio receiver 失效
标题翻译：用于接收主无线电广播信号的无线电接收机和用于这种无线电接收机的单分子集成电路
公开(公告)号：US6094568A
公开(公告)日：2000-07-25
申请号：US959220
申请日：1997-10-28
申请人： Kaveh Kianush , Udo F. Schillhof , Cicero S. Vaucher
发明人： Kaveh Kianush , Udo F. Schillhof , Cicero S. Vaucher
IPC分类号： H03J7/18 , H03J1/00 , H04B1/16 , H04H20/26 , H04H40/18 , H04B1/18
CPC分类号： H03J1/0066 , H04H20/22 , H04H40/18 , H04H2201/13
摘要： An RDS or RDBS radio broadcast receiver, utilizing a microcontroller and a serial communication bus, receives a list of alternative frequencies to allow the receiver to switch to an alternative frequency when the quality of the main radio broadcast signal deteriorates. Therefore the quality of the alternative frequency transmissions has to be updated from time to time. To avoid time delays caused by the relatively slow serial communication bus, the tuning section includes further controller for performing the alternative frequency updates.
摘要翻译：利用微控制器和串行通信总线的RDS或RDBS无线电广播接收机接收替代频率的列表，以便当主无线电广播信号的质量劣化时允许接收机切换到替代频率。因此，替代频率传输的质量必须不时更新。为了避免由相对较慢的串行通信总线引起的时间延迟，调谐部分包括用于执行替代频率更新的另外的控制器。

8. 发明申请

US20080208508A1 Test Prepared Rf Integrated Circuit 有权
标题翻译：测试准备的Rf集成电路
公开(公告)号：US20080208508A1
公开(公告)日：2008-08-28
申请号：US11910186
申请日：2006-03-27
申请人： Cicero S. Vaucher
发明人： Cicero S. Vaucher
IPC分类号： G01R31/28 , G01R31/317
CPC分类号： G01R31/2822
摘要： An integrated circuit (10) comprises a mixer circuit (14, 54a) and a local oscillator circuit (18, 58). During testing a frequency divider circuit (32, 60) in the integrated circuit (10) divides a local oscillator signal to a frequency below a normal operating range of the local oscillator (18, 58). The integrated circuit applies the divided local oscillator signal to the mixer circuit (14, 54a) instead of the local oscillator signal during testing. Signal properties of a signal derived from the mixer circuit (14, 54a) are measured while the divided local oscillator signal is applied to the mixer circuit (14, 54a).
摘要翻译：集成电路（10）包括混频器电路（14,5aa）和本地振荡器电路（18,58）。在测试期间，集成电路（10）中的分频器电路（32,60）将本地振荡器信号分频到低于本地振荡器（18,58）的正常工作范围的频率。在测试期间，集成电路将分频的本地振荡器信号施加到混频器电路（14,5aa）而不是本地振荡器信号。在分配的本地振荡器信号施加到混频器电路（14,5aa）的同时测量从混频器电路（14,5aa）导出的信号的信号特性。

9. 发明授权

US06751445B2 Receiver tuning system 失效
标题翻译：接收机调谐系统
公开(公告)号：US06751445B2
公开(公告)日：2004-06-15
申请号：US10331276
申请日：2002-12-30
申请人： Wolfdietrich G. Kasperkovitz , Cicero S. Vaucher
发明人： Wolfdietrich G. Kasperkovitz , Cicero S. Vaucher
IPC分类号： H04B140
CPC分类号： H03J1/005 , H03L7/187 , H03L7/23
摘要： In a receiver, a frequency-synthesis circuit (SYNTH) generates a stepped-frequency signal (Ssf) having a frequency which can be varied in steps. A synchronization circuit (LOOP) synchronizes a tuning oscillator (LO) with the stepped-frequency signal (Ssf). It provides an integer frequency-relationship between the stepped-frequency signal (Ssf) and the tuning oscillator (LO). That is, if the stepped-frequency signal (Ssf) has a frequency Fsf, the tuning oscillator (LO) will operate at a frequency Flo=N·Fsf, N being an integer or an integer fraction.
摘要翻译：在接收机中，频率合成电路（SYNTH）产生具有可以逐步变化的频率的阶跃频率信号（Ssf）。同步电路（LOOP）使调谐振荡器（LO）与步进频率信号（Ssf）同步。它提供阶梯式频率信号（Ssf）和调谐振荡器（LO）之间的整数频率关系。也就是说，如果步进频率信号（Ssf）具有频率Fsf，则调谐振荡器（LO）将以频率Flo = N.FFf，N为整数或整数分数来工作。

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