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    • 1. 发明申请
    • Ldmos Transistor
    • Ldmos晶体管
    • US20080237705A1
    • 2008-10-02
    • US11997209
    • 2006-08-02
    • Stephan Jo Cecile Henri TheeuwenFreerk Van RijsPetra C.A. Hammes
    • Stephan Jo Cecile Henri TheeuwenFreerk Van RijsPetra C.A. Hammes
    • H01L29/78
    • H01L29/41758H01L21/76895H01L23/4827H01L23/53219H01L29/402H01L29/41725H01L29/4175H01L29/456H01L29/7835H01L2924/0002H01L2924/00
    • The LDMOS transistor (1) of the invention comprises a substrate (2), a gate electrode (10), a substrate contact region (11), a source region (3), a channel region (4) and a drain region (5), which drain region (5) comprises a drain contact region (6) and drain extension region (7). The drain contact region (6) is electrically connected to a top metal layer (23), which extends over the drain extension region (7), with a distance (723) between the top metal layer (23) and the drain extension region (7) that is larger than 2μm. This way the area of the drain contact region (6) may be reduced and the RF power output efficiency of the LDMOS transistor (1) increased. In another embodiment the source region (3) is electrically connected to the substrate contact region (11) via a suicide layer (32) instead of a first metal layer (21), thereby reducing the capacitive coupling between the source region (3) and the drain region (5) and hence increasing the RF power output efficiency of the LDMOS transistor (1) further.
    • 本发明的LDMOS晶体管(1)包括基板(2),栅极电极(10),基板接触区域(11),源极区域(3),沟道区域(4)和漏极区域 ),该漏极区(5)包括漏极接触区(6)和漏极延伸区(7)。 漏极接触区域(6)电连接到在漏极延伸区域(7)上延伸的顶部金属层(23),顶部金属层(23)和漏极延伸区域(23)之间的距离(723) 7)大于2mum。 这样可以减小漏极接触区域(6)的面积,并且增加LDMOS晶体管(1)的RF功率输出效率。 在另一个实施例中,源极区(3)经由硅化物层(32)而不是第一金属层(21)电连接到衬底接触区(11),从而减小源区(3)和 漏极区域(5),从而进一步提高LDMOS晶体管(1)的RF功率输出效率。