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1. 发明授权

US08782367B2 Memory area protection circuit 有权
标题翻译：存储区保护电路
公开(公告)号：US08782367B2
公开(公告)日：2014-07-15
申请号：US11958958
申请日：2007-12-18
申请人： Stéphan Courcambeck , Albert Martinez , Jean Nicolai , William Orlando
发明人： Stéphan Courcambeck , Albert Martinez , Jean Nicolai , William Orlando
IPC分类号： G06F12/00
CPC分类号： G06F12/1483 , G06F21/79
摘要： A circuit for controlling the access to at least one area of a memory accessible by a program execution unit, including a first instruction address input; at least one second data address input, the addresses coming from the execution unit; at least one function of correlation of these addresses; and at least one output of a bit for validating the fulfilling of conditions set by the correlation function.
摘要翻译：一种用于控制对由程序执行单元可访问的存储器的至少一个区域的访问的电路，包括第一指令地址输入; 至少一个第二数据地址输入，来自执行单元的地址; 至少一个这些地址相关的功能; 以及用于验证由相关函数设置的条件的满足的位的至少一个输出。

2. 发明申请

US20080155188A1 MEMORY AREA PROTECTION CIRCUIT 有权
标题翻译：存储区保护电路
公开(公告)号：US20080155188A1
公开(公告)日：2008-06-26
申请号：US11958958
申请日：2007-12-18
申请人： Stephan Courcambeck , Albert Martinez , Jean Nicolai , William Orlando
发明人： Stephan Courcambeck , Albert Martinez , Jean Nicolai , William Orlando
IPC分类号： G06F9/30 , G06F12/02
CPC分类号： G06F12/1483 , G06F21/79
摘要： A circuit for controlling the access to at least one area of a memory accessible by a program execution unit, including a first instruction address input; at least one second data address input, the addresses coming from the execution unit; at least one function of correlation of these addresses; and at least one output of a bit for validating the fulfilling of conditions set by the correlation function.
摘要翻译：一种用于控制对由程序执行单元可访问的存储器的至少一个区域的访问的电路，包括第一指令地址输入; 至少一个第二数据地址输入，来自执行单元的地址; 至少一个这些地址相关的功能; 以及用于验证由相关函数设置的条件的满足的位的至少一个输出。

3. 发明授权

US07581039B2 Procedure and device for programming a DMA controller in which a translated physical address is stored in a buffer register of the address processing unit and then applied to the data bus and stored in a register of the DMA controller 有权
标题翻译：用于对DMA控制器进行编程的程序和设备，其中翻译的物理地址存储在地址处理单元的缓冲寄存器中，然后施加到数据总线并存储在DMA控制器的寄存器中
公开(公告)号：US07581039B2
公开(公告)日：2009-08-25
申请号：US11179033
申请日：2005-07-11
申请人： Albert Martinez , Jean Nicolai
发明人： Albert Martinez , Jean Nicolai
IPC分类号： G06F13/28
CPC分类号： G06F13/28 , G06F12/1081
摘要： A method for programming a DMA controller of a system on a chip that includes a CPU, an MMU, and a DMA controller including source, destination, and size registers associated with a base subaddress. In response to a first instruction of a user program that includes a virtual address, the virtual address is translated into a corresponding physical address, and the physical address is stored in a buffer register that is inaccessible to the user program. In response to a second instruction of the user program, the physical address stored in the buffer register is applied to the data bus and a first word including high-order bits indicating the base subaddress is applied to the address bus. The source or destination register is selected according to the first word applied to the address bus and the physical address applied to the data bus is stored in the selected register.
摘要翻译：一种用于对包括CPU，MMU和DMA控制器的芯片上的系统的DMA控制器进行编程的方法，包括与基本子地址相关联的源，目的地和大小寄存器。响应于包括虚拟地址的用户程序的第一指令，虚拟地址被转换成对应的物理地址，物理地址存储在用户程序不可访问的缓冲寄存器中。响应于用户程序的第二指令，存储在缓冲寄存器中的物理地址被施加到数据总线，并且包括指示基本子地址的高位的第一个字被施加到地址总线。源或目标寄存器根据应用于地址总线的第一个字来选择，并且应用于数据总线的物理地址存储在所选择的寄存器中。

4. 发明授权

US07467239B2 Method and system for programming a DMA controller in a system on a chip, with the DMA controller having source, destination, and size registers 有权
标题翻译：用于在芯片上的系统中对DMA控制器进行编程的方法和系统，其中DMA控制器具有源，目的地和大小寄存器
公开(公告)号：US07467239B2
公开(公告)日：2008-12-16
申请号：US11185529
申请日：2005-07-20
申请人： Jean Nicolai , Albert Martinez
发明人： Jean Nicolai , Albert Martinez
IPC分类号： G06F13/10 , G06F13/14
CPC分类号： G06F13/28 , G06F12/1081 , G06F2213/0038
摘要： A procedure is provided for programming a DMA controller of a system on a chip that includes a CPU, an MMU, a DMA controller including source, destination, and size registers, and entities that are each identified by a physical address and addressable by applying that physical address to the address bus. In response to a first dedicated instruction of a user program, the virtual address is translated into a corresponding physical address, the corresponding physical address is applied to the address bus, a signal having a first value is delivered to the DMA controller, and a signal having a second value is delivered to the entities. When the signal delivered to the DMA controller has the first value, the source register or the destination register of the DMA controller is selected and the corresponding physical address on the address bus is stored in the selected register.
摘要翻译：提供了一种用于对包括CPU，MMU，包括源，目的地和大小寄存器的DMA控制器的芯片上的系统的DMA控制器进行编程的程序，以及每个由物理地址标识并可通过应用该物理地址来寻址的实体物理地址到地址总线。响应于用户程序的第一专用指令，将虚拟地址转换为对应的物理地址，将对应的物理地址应用于地址总线，具有第一值的信号被传送到DMA控制器，并且信号具有第二个值被传递给实体。当传送到DMA控制器的信号具有第一个值时，选择DMA控制器的源寄存器或目标寄存器，并将地址总线上相应的物理地址存储在所选寄存器中。

5. 发明申请

US20060020719A1 Procedure for programming a DMA controller in a system on a chip and associated system on a chip 有权
标题翻译：在芯片上的系统和芯片上的相关系统上对DMA控制器进行编程的过程
公开(公告)号：US20060020719A1
公开(公告)日：2006-01-26
申请号：US11179033
申请日：2005-07-11
申请人： Albert Martinez , Jean Nicolai
发明人： Albert Martinez , Jean Nicolai
IPC分类号： G06F13/28
CPC分类号： G06F13/28 , G06F12/1081
摘要： A method for programming a DMA controller of a system on a chip that includes a CPU, an MMU, and a DMA controller including source, destination, and size registers associated with a base subaddress. In response to a first instruction of a user program that includes a virtual address, the virtual address is translated into a corresponding physical address, and the physical address is stored in a buffer register that is inaccessible to the user program. In response to a second instruction of the user program, the physical address stored in the buffer register is applied to the data bus and a first word including high-order bits indicating the base subaddress is applied to the address bus. The source or destination register is selected according to the first word applied to the address bus and the physical address applied to the data bus is stored in the selected register.
摘要翻译：一种用于对包括CPU，MMU和DMA控制器的芯片上的系统的DMA控制器进行编程的方法，包括与基本子地址相关联的源，目的地和大小寄存器。响应于包括虚拟地址的用户程序的第一指令，虚拟地址被转换成对应的物理地址，物理地址存储在用户程序不可访问的缓冲寄存器中。响应于用户程序的第二指令，存储在缓冲寄存器中的物理地址被施加到数据总线，并且包括指示基本子地址的高位的第一个字被施加到地址总线。源或目标寄存器根据应用于地址总线的第一个字来选择，并且应用于数据总线的物理地址存储在所选择的寄存器中。

6. 发明授权

US07337300B2 Procedure for processing a virtual address for programming a DMA controller and associated system on a chip 有权
标题翻译：处理芯片上DMA控制器和相关系统的虚拟地址的程序
公开(公告)号：US07337300B2
公开(公告)日：2008-02-26
申请号：US11154281
申请日：2005-06-16
申请人： Daniele Fronte , Jean Nicolai , Albert Martinez
发明人： Daniele Fronte , Jean Nicolai , Albert Martinez
IPC分类号： G06F9/34 , G06F9/26 , G06F12/00
CPC分类号： G06F13/28
摘要： A method is provided for processing a virtual address for a program requesting a DMA transfer. The program is designed to be run in user mode on a system on a chip that includes a central processing unit, a memory management unit, and a DMA controller. The virtual address is a source virtual address or a destination virtual address and has a size of N bits. According to the method, the virtual address is divided into at least two fields of bits. For each of the fields, there is created an N-bit address word comprising a prefix having a given value associated with the field and having more than 1 bit, and the field. The DMA controller is programmed using multiple store instructions that include one store instruction relating to each of the address words created.
摘要翻译：提供了一种用于处理请求DMA传输的程序的虚拟地址的方法。该程序被设计为在包括中央处理单元，存储器管理单元和DMA控制器的芯片上的系统上以用户模式运行。虚拟地址是源虚拟地址或目标虚拟地址，并且具有N位的大小。根据该方法，虚拟地址被分成至少两个比特字段。对于每个字段，创建了包括具有与该字段相关联并具有多于1位的给定值的前缀的N位地址字和该字段。使用多个存储指令对DMA控制器进行编程，其中包括与创建的每个地址字相关的一个存储指令。

7. 发明申请

US20060026311A1 Procedure for programming a DMA controller in a system on a chip and associated system on a chip 有权
标题翻译：在芯片上的系统和芯片上的相关系统上对DMA控制器进行编程的过程
公开(公告)号：US20060026311A1
公开(公告)日：2006-02-02
申请号：US11185529
申请日：2005-07-20
申请人： Jean Nicolai , Albert Martinez
发明人： Jean Nicolai , Albert Martinez
IPC分类号： G06F13/28
CPC分类号： G06F13/28 , G06F12/1081 , G06F2213/0038
摘要： A procedure is provided for programming a DMA controller of a system on a chip that includes a CPU, an MMU, a DMA controller including source, destination, and size registers, and entities that are each identified by a physical address and addressable by applying that physical address to the address bus. In response to a first dedicated instruction of a user program, the virtual address is translated into a corresponding physical address, the corresponding physical address is applied to the address bus, a signal having a first value is delivered to the DMA controller, and a signal having a second value is delivered to the entities. When the signal delivered to the DMA controller has the first value, the source register or the destination register of the DMA controller is selected and the corresponding physical address on the address bus is stored in the selected register.
摘要翻译：提供了一种用于对包括CPU，MMU，包括源，目的地和大小寄存器的DMA控制器的芯片上的系统的DMA控制器进行编程的程序，以及每个由物理地址标识并可通过应用该物理地址来寻址的实体物理地址到地址总线。响应于用户程序的第一专用指令，将虚拟地址转换为对应的物理地址，将对应的物理地址应用于地址总线，具有第一值的信号被传送到DMA控制器，并且信号具有第二个值被传递给实体。当传送到DMA控制器的信号具有第一个值时，选择DMA控制器的源寄存器或目标寄存器，并将地址总线上相应的物理地址存储在所选寄存器中。

8. 发明申请

US20060010262A1 Procedure for processing a virtual address for programming a DMA controller and associated system on a chip 有权
标题翻译：处理芯片上DMA控制器和相关系统的虚拟地址的程序
公开(公告)号：US20060010262A1
公开(公告)日：2006-01-12
申请号：US11154281
申请日：2005-06-16
申请人： Daniele Fronte , Jean Nicolai , Albert Martinez
发明人： Daniele Fronte , Jean Nicolai , Albert Martinez
IPC分类号： G06F13/28 , G06F12/08
CPC分类号： G06F13/28
摘要： A method is provided for processing a virtual address for a program requesting a DMA transfer. The program is designed to be run in user mode on a system on a chip that includes a central processing unit, a memory management unit, and a DMA controller. The virtual address is a source virtual address or a destination virtual address and has a size of N bits. According to the method, the virtual address is divided into at least two fields of bits. For each of the fields, there is created an N-bit address word comprising a prefix having a given value associated with the field and having more than 1 bit, and the field. The DMA controller is programmed using multiple store instructions that include one store instruction relating to each of the address words created.
摘要翻译：提供了一种用于处理请求DMA传输的程序的虚拟地址的方法。该程序被设计为在包括中央处理单元，存储器管理单元和DMA控制器的芯片上的系统上以用户模式运行。虚拟地址是源虚拟地址或目标虚拟地址，并且具有N位的大小。根据该方法，虚拟地址被分成至少两个比特字段。对于每个字段，创建了包括具有与该字段相关联并具有多于1位的给定值的前缀的N位地址字和该字段。使用多个存储指令对DMA控制器进行编程，其中包括与创建的每个地址字相关的一个存储指令。

9. 发明申请

US20060182274A1 Method for ciphering a compressed audio or video stream with error tolerance 有权
标题翻译：用于加密具有误差容限的压缩音频或视频流的方法
公开(公告)号：US20060182274A1
公开(公告)日：2006-08-17
申请号：US11331585
申请日：2006-01-13
申请人： Jean Nicolai , William Orlando
发明人： Jean Nicolai , William Orlando
IPC分类号： H04L9/28
CPC分类号： H04L9/065 , H04L2209/08 , H04L2209/30 , H04L2209/34 , H04N7/1675 , H04N19/61 , H04N21/23897
摘要： A method ciphers a standardized stream of compressed audio or video data, wherein at least one part of the bits of data packets delimited by two consecutive synchronization markers is ciphered by pseudo-random stream.
摘要翻译：一种方法加密压缩音频或视频数据的标准化流，其中由两个连续的同步标记定界的数据分组的位的至少一部分被伪随机流加密。

10. 发明授权

US07680269B2 Method for ciphering a compressed audio or video stream with error tolerance 有权
标题翻译：用于加密具有容错的压缩音频或视频流的方法
公开(公告)号：US07680269B2
公开(公告)日：2010-03-16
申请号：US11331585
申请日：2006-01-13
申请人： Jean Nicolai , William Orlando
发明人： Jean Nicolai , William Orlando
IPC分类号： H04L9/00 , H04K1/04 , H04L9/32
CPC分类号： H04L9/065 , H04L2209/08 , H04L2209/30 , H04L2209/34 , H04N7/1675 , H04N19/61 , H04N21/23897
摘要： A method ciphers a standardized stream of compressed audio or video data, wherein at least one part of the bits of data packets delimited by two consecutive synchronization markers is ciphered by pseudo-random stream.
摘要翻译：一种方法加密压缩音频或视频数据的标准化流，其中由两个连续的同步标记定界的数据分组的位的至少一部分被伪随机流加密。

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