专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08131532B2 Software verification using range analysis 有权
标题翻译：使用范围分析进行软件验证
公开(公告)号：US08131532B2
公开(公告)日：2012-03-06
申请号：US11422068
申请日：2006-06-03
申请人： Srihari Cadambi , Aleksandr Zaks , Franjo Ivancic , Ilya Shlyakhter , Zijiang Yang , Malay Ganai , Aarti Gupta , Pranav Ashar
发明人： Srihari Cadambi , Aleksandr Zaks , Franjo Ivancic , Ilya Shlyakhter , Zijiang Yang , Malay Ganai , Aarti Gupta , Pranav Ashar
IPC分类号： G06F9/45 , G06F9/44 , G06F9/455
CPC分类号： G06F11/3608
摘要： A system and method is disclosed for formal verification of software programs that advantageously bounds the ranges of values that a variable in the software can take during runtime.
摘要翻译：公开了用于软件程序的形式验证的系统和方法，其有利地限制了在运行时期间软件中变量可以采用的值的范围。

2. 发明授权

US07019674B2 Content-based information retrieval architecture 失效
标题翻译：基于内容的信息检索架构
公开(公告)号：US07019674B2
公开(公告)日：2006-03-28
申请号：US10909907
申请日：2004-08-02
申请人： Srihari Cadambi , Joseph Kilian , Pranav Ashar , Srimat T. Chakradhar
发明人： Srihari Cadambi , Joseph Kilian , Pranav Ashar , Srimat T. Chakradhar
IPC分类号： H03M7/00
CPC分类号： G06F17/30949 , H04L45/00 , H04L45/745
摘要： A content-based information retrieval architecture is herein disclosed that can achieve correct and predictable high speed lookups while taking advantage of inexpensive conventional memory components. A content-based information retrieval architecture is herein disclosed that can achieve high speed lookups with a constant query time while taking advantage of inexpensive conventional memory components. In accordance with an embodiment of the invention, the architecture comprise a hashing module, a first table of encoded values, a second table of lookup values, and a third table of associated input values. The input value is hashed a number of times to generate a plurality of hashed values, the hashed values corresponding to locations of encoded values in the first table. The encoded values obtained from an input value encode an output value such that the output value cannot be recovered from any single encoded value.
摘要翻译：本文公开了一种基于内容的信息检索架构，其可以在利用廉价的常规存储器组件的情况下实现正确和可预测的高速查找。本文公开了一种基于内容的信息检索架构，其可以利用廉价的常规存储器组件来实现具有恒定查询时间的高速查找。根据本发明的实施例，架构包括散列模块，编码值的第一表，查找值的第二表和相关联的输入值的第三表。输入值被散列多次以产生多个散列值，该散列值对应于第一表中的编码值的位置。从输入值获得的编码值对输出值进行编码，使得输出值不能从任何单个编码值恢复。

3. 发明申请

US20060206744A1 Low-power high-throughput streaming computations 审中-公开
标题翻译：低功耗高通量流量计算
公开(公告)号：US20060206744A1
公开(公告)日：2006-09-14
申请号：US11075277
申请日：2005-03-08
申请人： Srihari Cadambi , Pranav Ashar
发明人： Srihari Cadambi , Pranav Ashar
IPC分类号： G06F1/30
CPC分类号： G06F9/3867 , G06F1/3203 , G06F1/324 , G06F1/3287 , G06F1/3296 , G06F9/3869 , Y02D10/126 , Y02D10/171 , Y02D10/172
摘要： A method for optimizing voltage and frequency for pipelined architectures that offers better power efficiency. The invention provides methods for low-power high-throughput hardware implementations to stream computations by partitioning a computation into temporally distinct stages, assigning a clock frequency to each stage such that an overall computational throughput is met and assigning to each stage a supply voltage according to its respective clock frequency and circuit parameters.
摘要翻译：一种优化流水线架构的电压和频率的方法，可提供更好的功率效率。本发明提供了用于通过将计算划分到时间上不同的阶段来流量计算的低功率高吞吐量硬件实现方法，将时钟频率分配给每个级，使得满足总体计算吞吐量，并且根据其各自的时钟频率和电路参数。

4. 发明申请

US20050174272A1 Content-based information retrieval architecture 失效
标题翻译：基于内容的信息检索架构
公开(公告)号：US20050174272A1
公开(公告)日：2005-08-11
申请号：US10909907
申请日：2004-08-02
申请人： Srihari Cadambi , Joseph Kilian , Pranav Ashar , Srimat Chakradhar
发明人： Srihari Cadambi , Joseph Kilian , Pranav Ashar , Srimat Chakradhar
IPC分类号： G06F17/30 , H03M7/00 , H04L12/56
CPC分类号： G06F17/30949 , H04L45/00 , H04L45/745
摘要： A content-based information retrieval architecture is herein disclosed that can achieve correct and predictable high speed lookups while taking advantage of inexpensive conventional memory components.
摘要翻译：本文公开了一种基于内容的信息检索架构，其可以在利用廉价的常规存储器组件的情况下实现正确和可预测的高速查找。

5. 发明授权

US08874943B2 Energy efficient heterogeneous systems 有权
标题翻译：节能异构系统
公开(公告)号：US08874943B2
公开(公告)日：2014-10-28
申请号：US13079808
申请日：2011-04-04
申请人： Abhinandan Majumdar , Srihari Cadambi , Srimat T Chakradhar
发明人： Abhinandan Majumdar , Srihari Cadambi , Srimat T Chakradhar
IPC分类号： G06F1/32 , G06F9/50 , G06F9/46 , G06F11/30 , G06F11/34
CPC分类号： G06F11/3409 , G06F1/3206 , G06F1/329 , G06F1/3293 , G06F9/5066 , G06F9/5094 , G06F2209/509 , G06N99/005 , Y02D10/122 , Y02D10/124 , Y02D10/22 , Y02D10/24 , Y02D10/34 , Y02D10/36
摘要： Low-power systems and methods are disclosed for executing an application software on a general purpose processor and a plurality of accelerators with a runtime controller. The runtime controller splits a workload across the processor and the accelerators to minimize energy. The system includes building one or more performance models in an application-agnostic manner; and monitoring system performance in real-time and adjusting the workload splitting to minimize energy while conforming to a target quality of service (QoS).
摘要翻译：公开了用于在通用处理器和具有运行时间控制器的多个加速器上执行应用软件的低功率系统和方法。运行时控制器通过处理器和加速器分隔工作负载，以最小化能量。该系统包括以应用无关的方式构建一个或多个性能模型; 并实时监控系统性能，并根据目标服务质量（QoS）调整工作量分配以最小化能源。

6. 发明申请

US20130191612A1 INTERFERENCE-DRIVEN RESOURCE MANAGEMENT FOR GPU-BASED HETEROGENEOUS CLUSTERS 有权
标题翻译：基于GPU的异构集群的干扰驱动资源管理
公开(公告)号：US20130191612A1
公开(公告)日：2013-07-25
申请号：US13646661
申请日：2012-10-06
申请人： Cheng-Hong Li , Srihari Cadambi , Srimat T. Chakradhar , Rajat Phull
发明人： Cheng-Hong Li , Srihari Cadambi , Srimat T. Chakradhar , Rajat Phull
IPC分类号： G06F15/76
CPC分类号： G06T15/005 , G06F2209/501 , G06T2210/52
摘要： Systems and methods are disclosed that share coprocessor resources between two or more applications in a computing cluster using a job selector to receive jobs from a job queue; a node selector coupled to the job selector; an off line profiler with an interference prediction model; a coprocessor dynamic interference detection module; and a coprocessor interference response module.
摘要翻译：公开了系统和方法，其使用作业选择器在计算集群中的两个或更多应用之间共享协处理器资源以从作业队列接收作业; 耦合到作业选择器的节点选择器; 具有干扰预测模型的离线轮廓仪; 协处理器动态干扰检测模块; 和协处理器干扰响应模块。

7. 发明授权

US08442927B2 Dynamically configurable, multi-ported co-processor for convolutional neural networks 有权
标题翻译：用于卷积神经网络的动态配置多端口协处理器
公开(公告)号：US08442927B2
公开(公告)日：2013-05-14
申请号：US12697823
申请日：2010-02-01
申请人： Srimat Chakradhar , Murugan Sankaradas , Venkata S. Jakkula , Srihari Cadambi
发明人： Srimat Chakradhar , Murugan Sankaradas , Venkata S. Jakkula , Srihari Cadambi
IPC分类号： G06F15/18 , G06F15/00 , G06G7/00
CPC分类号： G06N3/063
摘要： A coprocessor and method for processing convolutional neural networks includes a configurable input switch coupled to an input. A plurality of convolver elements are enabled in accordance with the input switch. An output switch is configured to receive outputs from the set of convolver elements to provide data to output branches. A controller is configured to provide control signals to the input switch and the output switch such that the set of convolver elements are rendered active and a number of output branches are selected for a given cycle in accordance with the control signals.
摘要翻译：用于处理卷积神经网络的协处理器和方法包括耦合到输入的可配置输入开关。根据输入开关启用多个卷积器元件。输出开关被配置为从该组卷积单元接收输出以向输出分支提供数据。控制器被配置为向输入开关和输出开关提供控制信号，使得该组卷积单元被激活，并且根据控制信号为给定周期选择多个输出分支。

8. 发明授权

US07653670B2 Storage-efficient and collision-free hash-based packet processing architecture and method 失效
标题翻译：基于存储效率和无冲突的基于哈希的数据包处理架构和方法
公开(公告)号：US07653670B2
公开(公告)日：2010-01-26
申请号：US11564252
申请日：2006-11-28
申请人： Jahangir Hasan , Srihari Cadambi , Srimat T. Chakradhar
发明人： Jahangir Hasan , Srihari Cadambi , Srimat T. Chakradhar
IPC分类号： G06F12/00
CPC分类号： G06F17/30949 , Y10S707/99956
摘要： An architecture and method for data storage and retrieval which also addresses a number of key problems associated with systems employing hash-based techniques. The architecture and method employs a collision-free hashing scheme called Bloomier filter while eliminates its false positives in a storage efficient way. Wildcard support is added through the use of a scheme called prefix collapsing, while introducing only a small additional storage requirement and reduced hardware complexity. Real update traces indicate that both fast and incremental updates are provided—features generally not available in prior-art collision-free hashing schemes.
摘要翻译：一种用于数据存储和检索的架构和方法，其还涉及与采用基于散列技术的系统相关联的许多关键问题。该体系结构和方法采用了一种无冲突的哈希方案，称为波士顿过滤器，同时以有效的方式消除了其假阳性。通过使用称为前缀折叠的方案来添加通配符支持，同时仅引入少量额外的存储要求并降低硬件复杂性。实际的更新跟踪表明快速和增量更新都是提供的 - 通常在现有的无冲突散列方案中不可用。

9. 发明申请

US20060209725A1 Information Retrieval Architecture for Packet Classification 失效
标题翻译：数据包分类信息检索架构
公开(公告)号：US20060209725A1
公开(公告)日：2006-09-21
申请号：US11276665
申请日：2006-03-09
申请人： Srihari Cadambi , Srimat Chakradhar
发明人： Srihari Cadambi , Srimat Chakradhar
IPC分类号： H04L12/28
CPC分类号： H04L12/2854
摘要： An information retrieval architecture is herein disclosed which can handle multi-dimensional search problems such as packet classification.
摘要翻译：这里公开了可以处理诸如分组分类的多维搜索问题的信息检索架构。

10. 发明申请

US20130091507A1 OPTIMIZING DATA WAREHOUSING APPLICATIONS FOR GPUS USING DYNAMIC STREAM SCHEDULING AND DISPATCH OF FUSED AND SPLIT KERNELS 有权
标题翻译：优化数据仓库应用程序使用动态流程调度和分配熔丝和分离机
公开(公告)号：US20130091507A1
公开(公告)日：2013-04-11
申请号：US13646662
申请日：2012-10-06
申请人： Haicheng Wu , Srihari Cadambi , Srimat T. Chakradhar
发明人： Haicheng Wu , Srihari Cadambi , Srimat T. Chakradhar
IPC分类号： G06F9/46
CPC分类号： G06F9/5038 , G06F9/50 , G06F17/30477 , G06F2209/506
摘要： Systems and methods for managing a processor and one or more co-processors for a database application whose queries have been processed into an intermediate form (IR) containing kernels of the database application that have been fused and split; dynamically scheduling such kernels on CUDA streams and further dynamically dispatching kernels to GPU devices by estimating execution time in order to achieve high performance.
摘要翻译：用于管理数据库应用程序的处理器和一个或多个协处理器的系统和方法，所述数据库应用程序的查询已被处理为包含已融合和拆分的数据库应用程序的内核的中间形式（IR）; 通过估计执行时间来实现高性能，在CUDA流上动态调度这样的内核并进一步动态地将内核分配给GPU设备。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式