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1. 发明授权

US08995201B1 Methods circuits apparatuses and systems for sensing a logical state of a non-volatile memory cell and non-volatile memory devices produced accordingly 有权
标题翻译：方法用于感测非易失性存储器单元和非易失性存储器件的逻辑状态的电路装置和系统相应地产生
公开(公告)号：US08995201B1
公开(公告)日：2015-03-31
申请号：US14073914
申请日：2013-11-07
申请人： Spansion LLC
发明人： Alexander Kushnarenko , Yoram Betser
IPC分类号： G11C16/06 , G11C16/28
CPC分类号： G11C16/28 , G11C16/0483 , G11C16/3454
摘要： Disclose is a non-volatile memory (NVM) cell sensing circuit. The sensing circuit may include a sense-side-line conditioning circuit segment adapted to condition a sense-side-line of the NVM cell. Conditioning may include adjusting a charge density within the NVM cell sense-side-line during a first NVM cell current sensing phase. The conditioning circuit segment may also be adapted to maintain an NVM cell current sensing condition during a second NVM cell current sensing phase. Adjusting a charge density within the NVM cell sense-side-line may include inducing current in the sense-side-line in a direction opposite to the sensing current.
摘要翻译： Disclose是一种非易失性存储器（NVM）单元感测电路。感测电路可以包括适于调节NVM单元的感测侧线的感测侧线路调理电路段。调节可以包括在第一NVM单元电流感测阶段期间调整NVM单元感测侧线中的电荷密度。调理电路段还可以适于在第二NVM电池电流感测阶段期间维持NVM电池电流感测条件。调整NVM单元感测侧线内的电荷密度可以包括在与感测电流相反的方向上在感测侧线中感应电流。

2. 发明授权

US09991001B2 Methods, circuits, devices and systems for sensing an NVM cell 有权
公开(公告)号：US09991001B2
公开(公告)日：2018-06-05
申请号：US14284632
申请日：2014-05-22
申请人： Spansion LLC
发明人： Eduardo Maayan , Yoram Betser , Alexander Kushnarenko
IPC分类号： G11C11/34 , G11C16/28 , G11C8/10 , G11C11/56
CPC分类号： G11C16/28 , G11C8/10 , G11C11/5642
摘要： Disclosed is a non-volatile memory (NVM) device including an array of NVM cells segmented into at least a first sector and a second sector and at least one sensing circuit to sense a state of a target NVM cell in the first sector using a reference current of the second sector received from at least a dynamic reference cell.

3. 发明申请

US20150341034A1 Methods, Circuits, Devices and Systems for Integrated Circuit Voltage Level Shifting 有权
标题翻译：用于集成电路电压电平转换的方法，电路，器件和系统
公开(公告)号：US20150341034A1
公开(公告)日：2015-11-26
申请号：US14284812
申请日：2014-05-22
申请人： Spansion LLC
发明人： Roni Varkony , Yoram Betser
IPC分类号： H03K19/0185
CPC分类号： H03K19/018507 , H03K3/35613
摘要： Disclosed is an integrated circuit voltage level shifter including: a first set of pull-up transistors to selectively pull an output voltage towards a high voltage source level based on an input; a second set of pull-down transistors adapted to selectively pull the output voltage towards a lower voltage source level based on the input and a third set of transistors to limit current flow through the second set of pull-down transistors and to mitigate snapback of the second set of pull-down transistors using a bias gate voltage.
摘要翻译：公开了一种集成电路电压电平移位器，包括：第一组上拉晶体管，用于基于输入选择性地将输出电压拉向高电压源电平; 第二组下拉晶体管，其适于基于所述输入和第三组晶体管选择性地将所述输出电压拉向较低的电压源电平，以限制通过所述第二组下拉晶体管的电流，并且减轻所述使用偏置栅极电压的第二组下拉晶体管。

4. 发明申请

US20150341023A1 Methods, Circuits, Devices and Systems for Comparing Signals 审中-公开
标题翻译：用于比较信号的方法，电路，设备和系统
公开(公告)号：US20150341023A1
公开(公告)日：2015-11-26
申请号：US14284727
申请日：2014-05-22
申请人： Spansion LLC
发明人： Alexander Kushnarenko , Yoram Betser
IPC分类号： H03K5/24
CPC分类号： H03K5/2472 , G11C7/065 , G11C7/08 , H03K5/24 , H03K5/2481
摘要： Disclosed is a method of comparing two or more signals which may include: for each of the two or more signals, charging to a fixed voltage a compensation capacitor associated with a sense path of the signal, discharging each of the charged capacitors to a threshold voltage of a transistor in its respective sense path and integrating a discharge current from each capacitor with the signal sensed on the respective sense path.
摘要翻译：公开了一种比较两个或多个信号的方法，其可以包括：对于两个或更多个信号中的每一个，向固定电压充电与该信号的感测路径相关联的补偿电容器，将每个充电电容器放电到阈值电压在其相应的感测路径中的晶体管，并且将来自每个电容器的放电电流与在相应感测路径上感测的信号进行积分。

5. 发明授权

US08760930B1 Memory device with source-side sensing 有权
标题翻译：具有源侧感测的存储器件
公开(公告)号：US08760930B1
公开(公告)日：2014-06-24
申请号：US13769398
申请日：2013-02-18
申请人： (Spansion Inc.) Spansion LLC.
发明人： Alexander Kushnarenko , Yoram Betser
IPC分类号： G11C16/06
CPC分类号： G11C16/26 , G11C16/0491 , G11C16/24
摘要： A source-sensing configuration for non-volatile memory devices to simultaneously read 2 bits in two different memory cells sharing a same word line is disclosed. In a first cell arrangement, a drain of a first read cell is biased and its source and that of two adjacent cells in a direction towards the second read cell are connected through source bit lines to a source sense amplifier. In a second cell arrangement, the drain of the second read cell is biased and its source and that of its two adjacent cells in a direction towards the first read cell are connected through source bit lines to a source sense amplifier. A memory cell acts as a cell pipe and joins together the first and second cell arrangements. Driving all six source bit lines simultaneously allows the 2 bits to be simultaneously read while maintaining currents due to pipe effect substantially minimized.
摘要翻译：公开了一种用于非易失性存储器件同时读取共享相同字线的两个不同存储单元中的2位的源感测配置。在第一单元布置中，第一读单元的漏极被偏置，并且其源极和朝向第二读单元的方向的两个相邻单元的源极通过源位线连接到源读出放大器。在第二单元布置中，第二读单元的漏极被偏置，并且其源向与其第二读单元的方向相反的两个相邻单元的源极通过源位线连接到源读出放大器。存储器单元用作单元管，并将第一和第二单元布置连接在一起。同时驱动所有六个源位线允许同时读取2位，同时由于管道效应基本上最小化而保持电流。

6. 发明授权

US09479171B2 Methods, circuits, devices and systems for integrated circuit voltage level shifting 有权
标题翻译：用于集成电路电压电平转换的方法，电路，器件和系统
公开(公告)号：US09479171B2
公开(公告)日：2016-10-25
申请号：US14284812
申请日：2014-05-22
申请人： Spansion LLC
发明人： Roni Varkony , Yoram Betser
IPC分类号： H03K19/0185 , H03K3/356
CPC分类号： H03K19/018507 , H03K3/35613
摘要： Disclosed is an integrated circuit voltage level shifter including: a first set of pull-up transistors to selectively pull an output voltage towards a high voltage source level based on an input; a second set of pull-down transistors adapted to selectively pull the output voltage towards a lower voltage source level based on the input and a third set of transistors to limit current flow through the second set of pull-down transistors and to mitigate snapback of the second set of pull-down transistors using a bias gate voltage.
摘要翻译：公开了一种集成电路电压电平移位器，包括：第一组上拉晶体管，用于基于输入选择性地将输出电压拉向高电压源电平; 第二组下拉晶体管，其适于基于所述输入和第三组晶体管选择性地将所述输出电压拉向较低的电压源电平，以限制通过所述第二组下拉晶体管的电流，并且减轻所述使用偏置栅极电压的第二组下拉晶体管。

7. 发明申请

US20150340098A1 METHODS, CIRCUITS, DEVICES AND SYSTEMS FOR SENSING AN NVM CELL 有权
标题翻译：方法，电路，用于感测NVM单元的设备和系统
公开(公告)号：US20150340098A1
公开(公告)日：2015-11-26
申请号：US14284632
申请日：2014-05-22
申请人： Spansion LLC
发明人： Eduardo Maayan , Yoram Betser , Alexander Kushnarenko
IPC分类号： G11C16/28
CPC分类号： G11C16/28 , G11C8/10 , G11C11/5642
摘要： Disclosed is a non-volatile memory (NVM) device including an array of NVM cells segmented into at least a first sector and a second sector and at least one sensing circuit to sense a state of a target NVM cell in the first sector using a reference current of the second sector received from at least a dynamic reference cell.
摘要翻译：公开了一种非易失性存储器（NVM）装置，其包括被分割成至少第一扇区和第二扇区的NVM单元的阵列和至少一个感测电路，以使用参考来感测第一扇区中的目标NVM单元的状态从至少动态参考单元接收的第二扇区的电流。

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