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    • 5. 发明授权
    • Method of manufacturing a semiconductor device
    • 制造半导体器件的方法
    • US07704851B2
    • 2010-04-27
    • US11616018
    • 2006-12-26
    • Soo Jin Kim
    • Soo Jin Kim
    • H01L21/76
    • H01L21/823475H01L21/7682H01L27/115H01L27/11521
    • A method of manufacturing a semiconductor device includes providing a semiconductor substrate with gate structures. A sacrificial insulating layer is formed between the gate structures at a height lower than that of the gate structures such that a portion of each gate structure is exposed above the sacrificial insulating layer. Spacers are formed on sidewalls of the exposed portions of the gate structures. A portion of the sacrificial insulating layer between the spacers is exposed. The sacrificial insulating layer is removed, thereby forming spaces below the spacers. An insulating layer is formed to fill the spaces between the spacers such that air pockets are formed between the gate structures and below the spacers.
    • 制造半导体器件的方法包括:提供具有栅极结构的半导体衬底。 在栅极结构之间形成牺牲绝缘层,其高度低于栅极结构的高度,使得每个栅极结构的一部分暴露在牺牲绝缘层的上方。 隔板形成在栅极结构的暴露部分的侧壁上。 间隔物之间​​的牺牲绝缘层的一部分被暴露。 去除牺牲绝缘层,从而在间隔物之下形成空间。 形成绝缘层以填充间隔件之间的空间,使得在栅极结构之间和间隔物下方形成气穴。
    • 6. 发明授权
    • Method of forming a gate of a semiconductor device
    • 形成半导体器件的栅极的方法
    • US07700472B2
    • 2010-04-20
    • US11761281
    • 2007-06-11
    • Soo Jin Kim
    • Soo Jin Kim
    • H01L21/3205H01L21/4763
    • H01L21/28247H01L21/28273H01L27/11521
    • A method of forming a gate of a semiconductor device includes providing a semiconductor substrate over which a first conductive layer, a dielectric layer and a second conductive layer are formed. The second conductive layer is patterned to expose a part of the dielectric layer. A first protection layer is formed on sidewalls of the second conductive layer. A first etch process is performed to remove the exposed dielectric layer and to expose a part of the first conductive layer. A second protection layer is formed on sidewalls of the second conductive layer. A second etch process is performed to remove the exposed first conductive layer.
    • 形成半导体器件的栅极的方法包括提供半导体衬底,在其上形成第一导电层,电介质层和第二导电层。 图案化第二导电层以暴露电介质层的一部分。 第一保护层形成在第二导电层的侧壁上。 执行第一蚀刻工艺以去除暴露的介电层并暴露第一导电层的一部分。 第二保护层形成在第二导电层的侧壁上。 执行第二蚀刻工艺以去除暴露的第一导电层。
    • 8. 发明申请
    • METHOD OF FABRICATING A FLASH MEMORY DEVICE
    • 制造闪速存储器件的方法
    • US20080268594A1
    • 2008-10-30
    • US11856700
    • 2007-09-17
    • Soo Jin Kim
    • Soo Jin Kim
    • H01L21/8239
    • H01L27/105H01L27/11568H01L27/11573
    • In a method of fabricating a flash memory device, a lower capping conductive layer of a peri region is patterned. A step formed between a cell gate and a gate for a peri region transistor is decreased by controlling a target etch thickness of a hard mask. Thus, an impurity does not infiltrate into the bottom of the gate for the peri region transistor through a lost portion of a SAC nitride layer. Accordingly, a hump phenomenon of the transistor formed in the peri region can be improved. Furthermore, a leakage current characteristic of the transistor formed in the peri region can be improved.
    • 在制造闪速存储器件的方法中,对围绕区域的下盖导电层进行图案化。 通过控制硬掩模的目标蚀刻厚度,减小了用于周边晶体管的单元栅极和栅极之间形成的台阶。 因此,通过SAC氮化物层的失去部分,杂质不会渗入到围绕晶体管的栅极的底部。 因此,能够提高在周边区域形成的晶体管的隆起现象。 此外,能够提高形成在周边区域的晶体管的漏电流特性。
    • 9. 发明申请
    • METHOD OF FORMING A GATE OF A SEMICONDUCTOR DEVICE
    • 形成半导体器件栅极的方法
    • US20080160747A1
    • 2008-07-03
    • US11761281
    • 2007-06-11
    • Soo Jin Kim
    • Soo Jin Kim
    • H01L21/4763
    • H01L21/28247H01L21/28273H01L27/11521
    • A method of forming a gate of a semiconductor device includes providing a semiconductor substrate over which a first conductive layer, a dielectric layer and a second conductive layer are formed. The second conductive layer is patterned to expose a part of the dielectric layer. A first protection layer is formed on sidewalls of the second conductive layer. A first etch process is performed to remove the exposed dielectric layer and to expose a part of the first conductive layer. A second protection layer is formed on sidewalls of the second conductive layer. A second etch process is performed to remove the exposed first conductive layer.
    • 形成半导体器件的栅极的方法包括提供半导体衬底,在其上形成第一导电层,电介质层和第二导电层。 图案化第二导电层以暴露电介质层的一部分。 第一保护层形成在第二导电层的侧壁上。 执行第一蚀刻工艺以去除暴露的介电层并暴露第一导电层的一部分。 第二保护层形成在第二导电层的侧壁上。 执行第二蚀刻工艺以去除暴露的第一导电层。
    • 10. 发明授权
    • Electrode with enhanced performance and electrochemical device comprising the same
    • 具有增强性能的电极和包含该电极的电化学装置
    • US07981543B2
    • 2011-07-19
    • US11541204
    • 2006-09-29
    • Soo Jin KimSoon Ho Ahn
    • Soo Jin KimSoon Ho Ahn
    • H01M4/13
    • H01M10/052H01M4/0404H01M4/139H01M4/1393H01M4/621H01M4/622
    • Disclosed is an electrode slurry comprising: (a) an electrode active material capable of lithium intercalation/deintercalation; and (b) monomers capable of forming a polymer via polymerization. An electrode having a binder polymer formed by applying the electrode slurry onto a current collector and carrying out in situ polymerization of the monomers, and an electrochemical device comprising the electrode are also disclosed. The electrode uses monomers capable of forming a binder polymer via polymerization under heat or light upon drying of the electrode, instead of the conventional PVdF or SBR-based binders. Therefore, it is possible to simplify a process for manufacturing an electrode, to provide an eco-friendly electrode by virtue of the use of an aqueous solvent as a dispersion medium, to improve the ion conductivity of a binder by virtue of the use of a solvent for a battery electrolyte as a dispersion medium, and thus to improve the quality of an electrochemical device.
    • 公开了一种电极浆料,其包含:(a)能够插入/脱嵌锂的电极活性材料; 和(b)能够通过聚合形成聚合物的单体。 一种电极,其具有通过将电极浆料涂布在集电体上并进行单体的原位聚合而形成的粘合剂聚合物,以及包含电极的电化学装置。 电极使用能够通过在电极干燥时在热或光下聚合而形成粘合剂聚合物的单体,而不是常规的PVdF或SBR基粘合剂。 因此,可以简化电极的制造工艺,通过使用水性溶剂作为分散介质,提供环保电极,通过使用以下方法提高粘合剂的离子传导性 作为分散介质的电池电解质的溶剂,从而提高电化学装置的质量。