专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5854534A Controlled impedence interposer substrate 失效
标题翻译：受控阻抗插入器基板
公开(公告)号：US5854534A
公开(公告)日：1998-12-29
申请号：US559369
申请日：1995-11-16
申请人： Solomon I. Beilin , William T. Chou , David Kudzuma , Michael G. Lee , Michael G. Peters , James J. Roman , Som S. Swamy , Wen-chou Vincent Wang , Larry L. Moresco , Teruo Murase
发明人： Solomon I. Beilin , William T. Chou , David Kudzuma , Michael G. Lee , Michael G. Peters , James J. Roman , Som S. Swamy , Wen-chou Vincent Wang , Larry L. Moresco , Teruo Murase
IPC分类号： H01L21/48 , H01L23/498 , H01L23/538 , H01L23/66 , H01L25/065 , H05K1/14 , H01L23/52 , H01L23/04 , H01L23/053 , H01L23/34
CPC分类号： H05K1/144 , H01L21/486 , H01L23/49827 , H01L23/49838 , H01L23/4985 , H01L23/5385 , H01L23/5387 , H01L23/66 , H01L25/0652 , H01L2224/16 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H01L2924/19041 , H01L2924/3011
摘要： An interposer substrate for mounting an integrated circuit chip to a substrate, and method of making the same, are shown. The interposer substrate comprises power supply paths and controlled impedance signal paths that are substantially isolated from each other. Power supply is routed though rigid segments and signals are routed though a thin film flexible connector that runs from the upper surface of the interposer substrate to the lower surface. Bypass capacitance is incorporated into the interposer substrate and connected to the power supply so that it is positioned very close to the integrated circuit chip. The interposer may be fabricated by forming a multilayered thin film structure including the signal paths over a rigid substrate having vias formed therein, removing the central portion of the substrate leaving the two end segments, and folding and joining the end segments such that the vias are connected. In another embodiment of the invention, a separate power plate is provided for carrying the power lines. Portions of the power plate, with a multilayered thin film structure thereon, are cut and folded to form interposers. Methods of making single-chip interposers are also disclosed.
摘要翻译：示出了用于将集成电路芯片安装到基板的插入器基板及其制造方法。插入器基板包括彼此基本隔离的电源路径和受控阻抗信号路径。电源通过刚性段传送，信号通过薄膜柔性连接器布线，该连接器从插入器基板的上表面延伸到下表面。旁路电容被并入到插入器基板中并且连接到电源，使得其非常靠近集成电路芯片。可以通过在其上形成有通孔的刚性基板上形成包括信号路径的多层薄膜结构来制造插入件，去除离开两端段的基板的中心部分，以及折叠和连接端部段，使得通孔为连接的。在本发明的另一实施例中，提供了用于承载电源线的单独的功率板。在其上具有多层薄膜结构的功率板的部分被切割和折叠以形成插入件。还公开了制造单芯片插入件的方法。

2. 发明授权

US6102710A Controlled impedance interposer substrate and method of making 失效
标题翻译：受控阻抗插入器基板及其制造方法
公开(公告)号：US6102710A
公开(公告)日：2000-08-15
申请号：US70493
申请日：1998-04-30
申请人： Solomon I. Beilin , William T. Chou , David Kudzuma , Michael G. Lee , Michael G. Peters , James J. Roman , Som S. Swamy , Wen-chou Vincent Wang , Larry L. Moresco , Teruo Murase
发明人： Solomon I. Beilin , William T. Chou , David Kudzuma , Michael G. Lee , Michael G. Peters , James J. Roman , Som S. Swamy , Wen-chou Vincent Wang , Larry L. Moresco , Teruo Murase
IPC分类号： H01L21/48 , H01L23/498 , H01L23/538 , H01L23/66 , H01L25/065 , H05K1/14 , H01R12/00
CPC分类号： H05K1/144 , H01L21/486 , H01L23/49827 , H01L23/49838 , H01L23/4985 , H01L23/5385 , H01L23/5387 , H01L23/66 , H01L25/0652 , H01L2224/16 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H01L2924/19041 , H01L2924/3011
摘要： An interposer substrate for mounting an integrated circuit chip to a substrate, and method of making the same, are shown. The interposer substrate comprises power supply paths and controlled impedance signal paths that are substantially isolated from each other. Power supply is routed through rigid segments and signals are routed through a thin film flexible connector that runs from the upper surface of the interposer substrate to the lower surface. Bypass capacitance is incorporated into the interposer substrate and connected to the power supply so that it is positioned very close to the integrated circuit chip. The interposer may be fabricated by forming a multilayered thin film structure including the signal paths over a rigid substrate having vias formed therein, removing the central portion of the substrate leaving the two end segments, and folding and joining the end segments such that the vias are connected. In another embodiment of the invention, a separate power plate is provided for carrying the power lines. Portions of the power plate, with a multilayered thin film structure thereon, are cut and folded to form interposers. Methods of making single-chip interposers are also disclosed.
摘要翻译：示出了用于将集成电路芯片安装到基板的插入器基板及其制造方法。插入器基板包括彼此基本隔离的电源路径和受控阻抗信号路径。电源通过刚性段布线，信号通过从内插器基板的上表面延伸到下表面的薄膜柔性连接器。旁路电容被并入到插入器基板中并且连接到电源，使得其非常靠近集成电路芯片。可以通过在其上形成有通孔的刚性基板上形成包括信号路径的多层薄膜结构来制造插入件，去除离开两端段的基板的中心部分，以及折叠和连接端部段，使得通孔为连接的。在本发明的另一实施例中，提供了用于承载电源线的单独的功率板。在其上具有多层薄膜结构的功率板的部分被切割和折叠以形成插入件。还公开了制造单芯片插入件的方法。

3. 发明授权

US5778529A Method of making a multichip module substrate 失效
标题翻译：制造多芯片模块基板的方法
公开(公告)号：US5778529A
公开(公告)日：1998-07-14
申请号：US651479
申请日：1996-05-22
申请人： Solomon I. Beilin , William T. Chou , David Kudzuma , Michael G. Lee , Teruo Murase , Michael G. Peters , James J. Roman , Som S. Swamy , Wen-Chou Vincent Wang
发明人： Solomon I. Beilin , William T. Chou , David Kudzuma , Michael G. Lee , Teruo Murase , Michael G. Peters , James J. Roman , Som S. Swamy , Wen-Chou Vincent Wang
IPC分类号： H01L21/48 , H01L23/473 , H01L23/498 , H01L23/538 , H01L23/66 , H01L25/065 , H05K1/14 , H01K3/10 , H05K3/10
CPC分类号： H01L21/486 , H01L21/4857 , H01L23/473 , H01L23/49827 , H01L23/49838 , H01L23/4985 , H01L23/5385 , H01L23/66 , H01L25/0652 , H05K1/144 , H01L2224/16 , H01L2924/00013 , H01L2924/01019 , H01L2924/01078 , H01L2924/09701 , H01L2924/3011 , Y10T29/49155 , Y10T29/49165 , Y10T29/49204
摘要： A multichip module substrate for use in a three-dimensional multichip module, and methods of making the same, are disclosed. The substrate comprises a thin film structure, for routing signals to and from integrated circuit chips, formed over a rigid support base. Apertures are formed in the support base exposing the underside of the thin film structure, thereby allowing high density connectors to be mounted on both surfaces of the thin film structure, greatly enhancing the ability to communicate signals between adjacent substrates in the chip module. This avoids the need to route the signals either through the rigid support base or to the edges of the thin film structure. Power and ground, which do not require a high connection density, are routed in low impedance paths through the support base. Preferably, the thin film structure is made of alternating layers of patterned metal, such as copper, and a low dielectric organic polymer, such as a polyimide.
摘要翻译：公开了一种用于三维多芯片模块的多芯片模块基板及其制造方法。衬底包括薄膜结构，用于将信号路由到集成电路芯片上并从集成电路芯片路由到刚性支撑基底上。在支撑基体中形成孔，露出薄膜结构的下侧，从而允许将高密度连接器安装在薄膜结构的两个表面上，大大增强了在芯片模块中的相邻基板之间传递信号的能力。这避免了将信号路由通过刚性支撑底座或薄膜结构的边缘的需要。不需要高连接密度的电源和接地路径通过支持底座的低阻抗路径。优选地，薄膜结构由诸如铜的图案化金属的交替层和诸如聚酰亚胺的低介电有机聚合物制成。

4. 发明授权

US5544017A Multichip module substrate 失效
标题翻译：多芯片模块基板
公开(公告)号：US5544017A
公开(公告)日：1996-08-06
申请号：US277163
申请日：1994-07-19
申请人： Solomon I. Beilin , William T. Chou , David Kudzuma , Michael G. Lee , Teruo Murase , Michael G. Peters , James J. Roman , Som S. Swamy , Wen-chou V. Wang
发明人： Solomon I. Beilin , William T. Chou , David Kudzuma , Michael G. Lee , Teruo Murase , Michael G. Peters , James J. Roman , Som S. Swamy , Wen-chou V. Wang
IPC分类号： H01L21/48 , H01L23/473 , H01L23/498 , H01L23/538 , H01L23/66 , H01L25/065 , H05K1/14
CPC分类号： H01L21/486 , H01L21/4857 , H01L23/473 , H01L23/49827 , H01L23/49838 , H01L23/4985 , H01L23/5385 , H01L23/66 , H01L25/0652 , H05K1/144 , H01L2224/16 , H01L2924/00013 , H01L2924/01019 , H01L2924/01078 , H01L2924/09701 , H01L2924/3011 , Y10T29/49155 , Y10T29/49165 , Y10T29/49204
摘要： A multichip module substrate for use in a three-dimensional multichip module, and methods of making the same, are disclosed. The substrate comprises a thin film structure, for routing signals to and from integrated circuit chips, formed over a rigid support base. Apertures are formed in the support base exposing the underside of the thin film structure, thereby allowing high density connectors to be mounted on both surfaces of the thin film structure, greatly enhancing the ability to communicate signals between adjacent substrates in the chip module. This avoids the need to route the signals either through the rigid support base or to the edges of the thin film structure. Power and ground, which do not require a high connection density, are routed in low impedance paths through the support base. Preferably, the thin film structure is made of alternating layers of patterned metal, such as copper, and a low dielectric organic polymer, such as a polyimide.
摘要翻译：公开了一种用于三维多芯片模块的多芯片模块基板及其制造方法。衬底包括薄膜结构，用于将信号路由到集成电路芯片上并从集成电路芯片路由到刚性支撑基底上。在支撑基体中形成孔，露出薄膜结构的下侧，从而允许将高密度连接器安装在薄膜结构的两个表面上，大大增强了在芯片模块中的相邻基板之间传递信号的能力。这避免了将信号路由通过刚性支撑底座或薄膜结构的边缘的需要。不需要高连接密度的电源和接地路径通过支持底座的低阻抗路径。优选地，薄膜结构由诸如铜的图案化金属的交替层和诸如聚酰亚胺的低介电有机聚合物制成。

5. 发明授权

US5419038A Method for fabricating thin-film interconnector 失效
标题翻译：制造薄膜互连器的方法
公开(公告)号：US5419038A
公开(公告)日：1995-05-30
申请号：US78461
申请日：1993-06-17
申请人： Wen-chou V. Wang , Solomon I. Beilin , William T. Chou , David Kudzuma , Michael G. Lee , Michael G. Peters , James J. Roman , Som S. Swamy
发明人： Wen-chou V. Wang , Solomon I. Beilin , William T. Chou , David Kudzuma , Michael G. Lee , Michael G. Peters , James J. Roman , Som S. Swamy
IPC分类号： H05K1/11 , H05K1/14 , H05K3/00 , H05K3/46 , H05K3/36
CPC分类号： H05K3/4691 , H05K2201/0394 , H05K3/002 , H05K3/0023 , H05K3/0041 , H05K3/467 , Y10T29/49124 , Y10T29/49126 , Y10T29/49165
摘要： A three dimensional thin-film interconnector is fabricated by depositing a dielectric layer onto the surface of a substrate, depositing a layer of conductive material onto the dielectric layer to form a signal plane, depositing a dielectric layer onto the surface of the signal plane, forming a plurality of through holes in the dielectric layer that extend to the signal plane, and filling the through holes with an electrically conductive material to form vias. The sequence of forming a signal plane, depositing a dielectric layer, forming a plurality of through holes, and filling the through holes is repeated until a predetermined number of signal planes and a predetermined arrangement of vias are obtained. The through holes are formed at locations in the dielectric layers corresponding to both predetermined electrical connections and the vias in a preceding dielectric layer. The signal planes are formed at different locations on the substrate. The sequence of signal planes and dielectric layers at the same location on the substrate form a signal plane set which defines a connector. Contact pads are deposited onto the surface of a final dielectric layer and electrically connect with each via. Wires are used to electrically connect the contact pads of one connector to corresponding contact pads of another connector. A portion of the substrate and dielectric layers not comprising a signal plane set is removed, forming electrical connectors flexibly attached by the plurality of wires.
摘要翻译：通过在衬底的表面上沉积介电层来制造三维薄膜互连器，在电介质层上沉积导电材料层以形成信号平面，在信号面的表面上沉积电介质层，形成电介质层中的多个通孔延伸到信号平面，并用导电材料填充通孔以形成通孔。重复形成信号平面，沉积介电层，形成多个通孔和填充通孔的顺序，直到获得预定数量的信号面和通孔的预定布置。通孔形成在电介质层中对应于先前电介质层中的预定电连接和通路两者的位置处。信号面形成在基板上的不同位置。基板上相同位置处的信号平面和电介质层的顺序形成了限定连接器的信号平面组。接触焊盘沉积在最终电介质层的表面上并与每个通孔电连接。电线用于将一个连接器的接触焊盘电连接到另一个连接器的相应接触焊盘。除去不包括信号平面组的衬底和电介质层的一部分，形成由多个电线柔性附接的电连接器。

6. 发明授权

US06391220B1 Methods for fabricating flexible circuit structures 失效
标题翻译：制造柔性电路结构的方法
公开(公告)号：US06391220B1
公开(公告)日：2002-05-21
申请号：US09376645
申请日：1999-08-18
申请人： Lei Zhang , Solomon Beilin , Som S. Swamy , James J. Roman
发明人： Lei Zhang , Solomon Beilin , Som S. Swamy , James J. Roman
IPC分类号： B32B3100
CPC分类号： B32B37/26 , B32B2457/08 , H01L21/6835 , H01L2221/68318 , H01L2221/68345 , H01L2221/68381 , H05K3/025 , H05K3/205 , Y10S438/957 , Y10S438/968 , Y10S438/976 , Y10T29/49155 , Y10T29/4916 , Y10T156/1082 , Y10T156/1158
摘要： Methods and articles used to fabricate flexible circuit structures are disclosed. The methods include depositing a release layer on substrate, and then forming a conductive laminate on the release layer. After the release layer is formed, the conductive laminate can be easily separated by the substrate to eventually form a flexible circuit structure.
摘要翻译：公开了用于制造柔性电路结构的方法和制品。所述方法包括在基材上沉积剥离层，然后在剥离层上形成导电层压材料。在形成释放层之后，导电层压体可以容易地被衬底分离，最终形成柔性电路结构。

7. 发明授权

US6159666A Environmentally friendly removal of photoresists used in wet etchable polyimide processes 有权
标题翻译：用于湿法蚀刻聚酰亚胺工艺中的光刻胶的环保去除
公开(公告)号：US6159666A
公开(公告)日：2000-12-12
申请号：US227238
申请日：1999-01-08
申请人： David D. Ngo , Som S. Swamy
发明人： David D. Ngo , Som S. Swamy
IPC分类号： G03F7/40 , G03F7/42
CPC分类号： G03F7/40 , G03F7/425
摘要： Normally, a positive photoresist is developed with an alkaline aqueous solution to form patterns, and is subsequently stripped with an organic solvent after the photoresist has served its function. Such strippers are relatively toxic and damaging to the environment, and cannot be handled by standard (community) waste-water treatment facilities. These strippers cannot be easily neutralized, and must be disposed of in a highly specialized and relatively expensive manner. The present invention provides a method of treating positive and negative photoresists during their usage as photo masks such that the photoresists may be removed by less toxic chemicals which can be readily neutralized and handled by conventional waste water treatment facilities.
摘要翻译：通常，使用碱性水溶液显影正性光致抗蚀剂以形成图案，并且在光致抗蚀剂起作用之后随后用有机溶剂剥离。这种剥离剂相对有毒，对环境有害，不能由标准（社区）废水处理设施处理。这些脱模剂不能容易地中和，并且必须以高度专业化和相对昂贵的方式处理。本发明提供了一种在使用期间将正性和负性光致抗蚀剂处理为光掩模的方法，使得光致抗蚀剂可以通过易于被常规废水处理设备中和和处理的毒性较小的化学品除去。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式