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    • 1. 发明申请
    • System and method for video frame buffer compression
    • 用于视频帧缓冲器压缩的系统和方法
    • US20070110151A1
    • 2007-05-17
    • US11274625
    • 2005-11-14
    • Siu-Leong YuNien-Tsu WangKou-Hu TzouChristos ChrysafisXuhui Wu
    • Siu-Leong YuNien-Tsu WangKou-Hu TzouChristos ChrysafisXuhui Wu
    • H04N11/04
    • H04N19/428H04N19/124H04N19/13H04N19/152H04N19/61
    • A system and method are provided for encoding and compressing video data. A memory device is configured to store video data, and a corresponding memory controller controls the storage of video data in the memory device. A frame buffer compression module compresses frame data received from a video module to be stored in the memory device according to the memory controller and decompresses compressed frame data received from the memory device according to the memory controller for use by a video module. The frame buffer compression module includes a frame buffer compression encoder configured to encode and compress frame data received from a video module for storage in memory according to the memory controller. The frame buffer also includes a corresponding frame buffer compression decoder configured to decode and decompress frame data received from memory according to the memory controller for use by a video module.
    • 提供了一种用于对视频数据进行编码和压缩的系统和方法。 存储器设备被配置为存储视频数据,并且相应的存储器控​​制器控制存储器件中的视频数据的存储。 帧缓冲器压缩模块根据存储器控制器压缩从视频模块接收的要存储在存储器装置中的帧数据,并根据存储器控制器解压缩从存储器装置接收的压缩帧数据,供视频模块使用。 帧缓冲器压缩模块包括帧缓冲器压缩编码器,其被配置为根据存储器控制器对从视频模块接收的帧数据进行编码和压缩以存储在存储器中。 帧缓冲器还包括相应的帧缓冲器压缩解码器,其被配置为根据存储器控制器对从存储器接收的帧数据进行解码和解压缩以供视频模块使用。
    • 2. 发明授权
    • Hybrid architecture of TV receiving devices
    • 电视接收装置的混合架构
    • US08212940B2
    • 2012-07-03
    • US11567211
    • 2006-12-06
    • Dave Xiao Dong YangLing ChenNien-Tsu WangHsi-Chen WangChih-Ching Steve Chou
    • Dave Xiao Dong YangLing ChenNien-Tsu WangHsi-Chen WangChih-Ching Steve Chou
    • H04N5/455H04N5/44
    • H04N5/46H04N21/4184H04N21/4263
    • A hybrid architecture of a television (TV) receiving system is disclosed. The architecture includes two portions, a hardware portion and a software portion. The hardware portion includes a minimum amount of hardware to achieve operations of receiving a RF signal, producing an IF signal and outputting data representing the IP signal. The software portion, taking advantage of available computing power (e.g., high-speed microprocessor and a lot of memory) in a computing device and executed therein, includes one or more demodulators, all implemented in software. Each of the demodulators is implemented in accordance with one type of TV standard. Thus depending on the received data, a corresponding demodulator is activated to demodulate the received data and subsequently produces audio and video data. One of the advantages, benefits and objects in the present invention is to have a band of software-based demodulators, any of which may be updated or expanded whenever there is a new TV standard or modification to an existing standard.
    • 公开了一种电视(TV)接收系统的混合架构。 该架构包括两部分,一个硬件部分和一个软件部分。 硬件部分包括最小量的硬件以实现接收RF信号的操作,产生IF信号并输出​​表示IP信号的数据。 利用计算设备中可执行的计算能力(例如,高速微处理器和大量存储器)并在其中执行的软件部分包括全部以软件实现的一个或多个解调器。 每个解调器根据一种类型的电视标准来实现。 因此,取决于所接收的数据,相应的解调器被激活以解调所接收的数据,并随后产生音频和视频数据。 本发明的一个优点,优点和目的是具有基于软件的解调器频带,其中任何一个可以在有新的TV标准或现有标准的修改时被更新或扩展。
    • 3. 发明申请
    • HYBRID ARCHITECTURE OF TV RECEIVING DEVICES
    • 电视接收装置的混合架构
    • US20120086866A1
    • 2012-04-12
    • US11567211
    • 2006-12-06
    • Dave Xiao Dong YangLing ChenNien-Tsu WangHsi-Chen WangChih-Ching Steve Chou
    • Dave Xiao Dong YangLing ChenNien-Tsu WangHsi-Chen WangChih-Ching Steve Chou
    • H04N5/455
    • H04N5/46H04N21/4184H04N21/4263
    • A hybrid architecture of a television (TV) receiving system is disclosed. The architecture includes two portions, a hardware portion and a software portion. The hardware portion includes a minimum amount of hardware to achieve operations of receiving a RF signal, producing an IF signal and outputting data representing the IP signal. The software portion, taking advantage of available computing power (e.g., high-speed microprocessor and a lot of memory) in a computing device and executed therein, includes one or more demodulators, all implemented in software. Each of the demodulators is implemented in accordance with one type of TV standard. Thus depending on the received data, a corresponding demodulator is activated to demodulate the received data and subsequently produces audio and video data. One of the advantages, benefits and objects in the present invention is to have a band of software-based demodulators, any of which may be updated or expanded whenever there is a new TV standard or modification to an existing standard.
    • 公开了一种电视(TV)接收系统的混合架构。 该架构包括两部分,一个硬件部分和一个软件部分。 硬件部分包括最小量的硬件以实现接收RF信号的操作,产生IF信号并输出​​表示IP信号的数据。 利用计算设备中可执行的计算能力(例如,高速微处理器和大量存储器)并在其中执行的软件部分包括全部以软件实现的一个或多个解调器。 每个解调器根据一种类型的电视标准来实现。 因此,取决于所接收的数据,相应的解调器被激活以解调所接收的数据,并随后产生音频和视频数据。 本发明的一个优点,优点和目的是具有基于软件的解调器频带,其中任何一个可以在有新的TV标准或现有标准的修改时被更新或扩展。