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    • 1. 发明申请
    • High Speed Low Voltage Flash
    • 高速低压闪光灯
    • US20110115662A1
    • 2011-05-19
    • US12769784
    • 2010-04-29
    • Simon Chang
    • Simon Chang
    • H03M1/36
    • H03M1/361
    • An analog-to-digital converter comprising: first and second sets of ordered nodes, each first node having a corresponding second node; for each first node, a respective first resistor and current source pair, the resistor of each pair being connected to a first converter input and the current source of each pair being coupled to the respective first node; for each second node, a respective second resistor and current source pair, the resistor of each pair being connected to a second converter input and the current source of each pair being coupled to the respective second node; and a plurality of first comparators, each first comparator having its first input connected to a first node and its second input connected to the corresponding second node; wherein each of the first resistor and current source pairs are configured so as to provide an orderly progression of voltages at the first nodes and each of the second resistor and current source pairs are configured so as to provide an orderly progression of voltages at the second nodes.
    • 一种模拟 - 数字转换器,包括:第一和第二组有序节点,每个第一节点具有对应的第二节点; 对于每个第一节点,相应的第一电阻器和电流源对,每对的电阻器连接到第一转换器输入,并且每对的电流源耦合到相应的第一节点; 对于每个第二节点,相应的第二电阻器和电流源对,每对电阻器连接到第二转换器输入端,并且每对电流源耦合到相应的第二节点; 以及多个第一比较器,每个第一比较器的第一输入端连接到第一节点,其第二输入端连接到对应的第二节点; 其中所述第一电阻器和电流源对中的每一个被配置为在所述第一节点处提供电压的有序进展,并且所述第二电阻器和电流源对中的每一个被配置为提供所述第二节点处的电压的有序进展 。
    • 4. 发明授权
    • Low voltage mixer
    • 低压混频器
    • US07308244B2
    • 2007-12-11
    • US11131339
    • 2005-05-18
    • Simon ChangIan Michael Sabberton
    • Simon ChangIan Michael Sabberton
    • H04B1/26
    • H03D7/1441H03D7/1458H03D7/1491H03D2200/0084
    • A mixer comprising a pair of low frequency mixer inputs, a pair of high frequency mixer inputs, a pair of mixer outputs, four switching units, each switching unit comprising a low frequency switching unit input, a high frequency switching unit input, a switching unit output, a node connected via a high pass filter to the respective high frequency switching unit input and via a low pass filter to the respective low frequency switching unit input and a switching device arranged to provide an output at the respective switching unit output in dependence on the voltage at the respective node, and comprising a first feedback loop responsive to the voltage at the first low frequency mixer input and arranged to regulate the current through the outputs of the first and second ones of the switching units so that the total current through the outputs of the first and second ones of the switching units is substantially proportional to the voltage at the first low frequency mixer input and a second feedback loop responsive to the voltage at the second low frequency mixer input and arranged to regulate the current through the outputs of the third and fourth ones of the switching units so that the total current through the outputs of the third and fourth ones of the switching units is substantially proportional to the voltage at the second low frequency mixer input.
    • 一种混频器,包括一对低频混频器输入,一对高频混频器输入,一对混频器输出,四个开关单元,每个开关单元包括低频切换单元输入,高频切换单元输入,开关单元 输出,通过高通滤波器连接到相应的高频切换单元输入的节点,并且经由低通滤波器连接到相应的低频切换单元输入;以及开关装置,被配置为根据相应的低频切换单元输出,在相应的开关单元输出端提供输出 各个节点处的电压,并且包括响应于第一低频混频器输入处的电压的第一反馈环路,并且被布置成调节通过第一和第二开关单元的输出的电流,使得通过 第一和第二开关单元的输出基本上与第一低频混频器输入端的电压成比例,第二低频混频器输入端的电压基本成比例 响应于第二低频混频器输入处的电压的反馈回路,并被布置成调节通过第三和第四开关单元的输出的电流,使得通过第三和第四开关单元的输出的总电流 基本上与第二低频混频器输入端的电压成比例。
    • 8. 发明申请
    • MEMORY DESIGN
    • 内存设计
    • US20110205786A1
    • 2011-08-25
    • US13009583
    • 2011-01-19
    • Paul EganSimon Chang
    • Paul EganSimon Chang
    • G11C11/413H01L21/8239
    • G11C11/413H01L27/105H01L27/11
    • An improved memory design is described which removes the need to read firmware from ROM into RAM on start-up. A SRAM memory element comprises an influencing element which sets the state of the memory cells within the memory element on start-up to defined values. These defined values are set at the design stage such that on start-up the volatile memory contains firmware or other data. Dependent upon the implementation of the influencing element, the values of stored in the memory cells may be fixed or may subsequently be overwritten during operation of the device. In an example, the memory cell comprises two cross-coupled inverters and the influencing element comprises at least one transistor arranged to connect the input to one of the inverters to ground or a power supply rail when voltage is applied to a controlling node of the transistor.
    • 描述了改进的存储器设计,其消除了在启动时将固件从ROM读取到RAM中的需要。 SRAM存储器元件包括影响元件,其将启动时的存储器单元内的存储单元的状态设置为定义的值。 这些定义的值在设计阶段设置,使得在启动时,易失性存储器包含固件或其他数据。 取决于影响元件的实现,存储在存储器单元中的值可以是固定的,或者可以随后在器件的操作期间被覆盖。 在一个示例中,存储器单元包括两个交叉耦合的反相器,并且影响元件包括至少一个晶体管,该晶体管被布置成当将电压施加到晶体管的控制节点时将输入连接到地之一的反相器或电源轨 。