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1. 发明授权

US09444441B2 Zero-crossing detection circuit and method for synchronous step-down converter 有权
标题翻译：用于同步降压转换器的过零检测电路和方法
公开(公告)号：US09444441B2
公开(公告)日：2016-09-13
申请号：US14541428
申请日：2014-11-14
申请人： Silergy Semiconductor Technology (Hangzhou) LTD
发明人： Jinzhao Hou , Chen Chen
IPC分类号： H02M3/158 , H03K5/1536
CPC分类号： H03K5/1536 , H02M3/158 , H02M3/1588 , Y02B70/1466
摘要： In one embodiment, a zero-crossing detection circuit for a synchronous step-down converter, can include: (i) a state determination circuit configured to compare a drain voltage of a synchronous transistor of the synchronous step-down converter against a reference voltage, and to generate a state digital signal indicative of whether a body diode of the synchronous transistor is turned on; (ii) a logic circuit configured to convert the state digital signal into a counting instruction signal; (iii) a plus-minus counter configured to generate a numerical signal in response to the counting instruction signal; (iv) a DAC configured to generate a correction analog signal based on the numerical signal; and (v) a zero-crossing comparator configured to receive the correction analog signal and the drain voltage of the synchronous transistor, and to provide a zero-crossing comparison signal to a driving circuit of the synchronous step-down converter.
摘要翻译：在一个实施例中，用于同步降压转换器的过零检测电路可以包括：（i）状态确定电路，被配置为将同步降压转换器的同步晶体管的漏极电压与参考电压进行比较，并产生指示同步晶体管的体二极管是否导通的状态数字信号; （ii）逻辑电路，被配置为将所述状态数字信号转换为计数指令信号; （iii）正负计数器，被配置为响应于所述计数指令信号产生数字信号; （iv）配置为基于所述数字信号产生校正模拟信号的DAC; 以及（v）配置成接收所述同步晶体管的校正模拟信号和漏极电压的过零比较器，并且向所述同步降压转换器的驱动电路提供过零比较信号。

2. 发明申请

US20150145489A1 ZERO-CROSSING DETECTION CIRCUIT AND METHOD FOR SYNCHRONOUS STEP-DOWN CONVERTER 有权
标题翻译：零交叉检测电路和同步降压转换器的方法
公开(公告)号：US20150145489A1
公开(公告)日：2015-05-28
申请号：US14541428
申请日：2014-11-14
申请人： Silergy Semiconductor Technology (Hangzhou) LTD
发明人： Jinzhao Hou , Chen Chen
IPC分类号： H03K5/1536 , H02M3/158 , H02M1/08
CPC分类号： H03K5/1536 , H02M3/158 , H02M3/1588 , Y02B70/1466
摘要： In one embodiment, a zero-crossing detection circuit for a synchronous step-down converter, can include: (i) a state determination circuit configured to compare a drain voltage of a synchronous transistor of the synchronous step-down converter against a reference voltage, and to generate a state digital signal indicative of whether a body diode of the synchronous transistor is turned on; (ii) a logic circuit configured to convert the state digital signal into a counting instruction signal; (iii) a plus-minus counter configured to generate a numerical signal in response to the counting instruction signal; (iv) a DAC configured to generate a correction analog signal based on the numerical signal; and (v) a zero-crossing comparator configured to receive the correction analog signal and the drain voltage of the synchronous transistor, and to provide a zero-crossing comparison signal to a driving circuit of the synchronous step-down converter.
摘要翻译：在一个实施例中，用于同步降压转换器的过零检测电路可以包括：（i）状态确定电路，被配置为将同步降压转换器的同步晶体管的漏极电压与参考电压进行比较，并产生指示同步晶体管的体二极管是否导通的状态数字信号; （ii）逻辑电路，被配置为将所述状态数字信号转换为计数指令信号; （iii）正负计数器，被配置为响应于所述计数指令信号产生数字信号; （iv）配置为基于所述数字信号产生校正模拟信号的DAC; 以及（v）配置成接收所述同步晶体管的校正模拟信号和漏极电压的过零比较器，并且向所述同步降压转换器的驱动电路提供过零比较信号。

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