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1. 发明授权

US08373164B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08373164B2
公开(公告)日：2013-02-12
申请号：US12613769
申请日：2009-11-06
申请人： Shunpei Yamazaki , Kengo Akimoto , Daisuke Kawae
发明人： Shunpei Yamazaki , Kengo Akimoto , Daisuke Kawae
IPC分类号： H01L29/04 , H01L29/10 , H01L31/00 , H01L21/00
CPC分类号： H01L29/41733 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L27/1225 , H01L27/1288 , H01L29/4908 , H01L29/786 , H01L29/78618 , H01L29/7869 , H01L29/78696 , H01L51/0508 , H01L51/0512 , H01L51/0545 , H01L51/105
摘要： A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle θ1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle θ2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.
摘要翻译：下栅极薄膜晶体管中的源电极和漏电极之间可能发生的电场浓度被放宽并且抑制了开关特性的劣化的结构及其制造方法。制造在源电极和漏电极上设置氧化物半导体层的底栅薄膜晶体管，与氧化物半导体层接触的源电极的侧表面的角度和角度;角度和角度; 与氧化物半导体层接触的漏电极的侧面的两个面积分别被设定为大于或等于20°且小于90°，使得从上边缘到下边缘的距离每个电极的侧表面增加。

2. 发明授权

US08278162B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08278162B2
公开(公告)日：2012-10-02
申请号：US12768205
申请日：2010-04-27
申请人： Kengo Akimoto , Daisuke Kawae
发明人： Kengo Akimoto , Daisuke Kawae
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L27/1225 , H01L27/1214 , H01L29/7869
摘要： A formation of a gate electrode provided over an oxide semiconductor layer of a thin film transistor is performed together with a patterning of the oxide semiconductor layer.
摘要翻译：在薄膜晶体管的氧化物半导体层上设置的栅电极的形成与氧化物半导体层的图案化一起进行。

3. 发明授权

US08294155B2 Thin film transistor, display device having thin film transistor, and method for manufacturing the same 有权
标题翻译：薄膜晶体管，具有薄膜晶体管的显示装置及其制造方法
公开(公告)号：US08294155B2
公开(公告)日：2012-10-23
申请号：US13187584
申请日：2011-07-21
申请人： Shunpei Yamazaki , Yoshiyuki Kurokawa , Yasuhiro Jinbo , Satoshi Kobayashi , Daisuke Kawae
发明人： Shunpei Yamazaki , Yoshiyuki Kurokawa , Yasuhiro Jinbo , Satoshi Kobayashi , Daisuke Kawae
IPC分类号： H01L29/10
CPC分类号： H01L29/4908 , H01L27/124 , H01L27/1288 , H01L29/04 , H01L29/41733 , H01L29/66765 , H01L29/78696
摘要： A thin film transistor with excellent electric characteristics, a display device having the thin film transistor, and a method for manufacturing the thin film transistor and the display device are proposed. The thin film transistor includes a gate insulating film formed over a gate electrode, a microcrystalline semiconductor film formed over the gate insulating film, a buffer layer formed over the microcrystalline semiconductor film, a pair of semiconductor films to which an impurity element imparting one conductivity type is added and which are formed over the buffer layer, and wirings formed over the pair of semiconductor films to which the impurity element imparting one conductivity type is added. A part of the gate insulating film or the entire gate insulating film, and/or a part of the microcrystalline semiconductor or the entire microcrystalline semiconductor includes an impurity element which serves as a donor.
摘要翻译：提出了具有优异电特性的薄膜晶体管，具有薄膜晶体管的显示装置，以及制造薄膜晶体管和显示装置的方法。薄膜晶体管包括形成在栅电极上的栅极绝缘膜，形成在栅极绝缘膜上的微晶半导体膜，形成在微晶半导体膜上的缓冲层，一对半导体膜，赋予一种导电型的杂质元素并且形成在缓冲层之上，并且在添加有赋予一种导电类型的杂质元素的一对半导体膜上形成的布线。栅极绝缘膜或整个栅极绝缘膜的一部分和/或微晶半导体的一部分或整个微晶半导体包括用作供体的杂质元素。

4. 发明授权

US07989332B2 Thin film transistor, display device having thin film transistor, and method for manufacturing the same 有权
标题翻译：薄膜晶体管，具有薄膜晶体管的显示装置及其制造方法
公开(公告)号：US07989332B2
公开(公告)日：2011-08-02
申请号：US12839669
申请日：2010-07-20
申请人： Shunpei Yamazaki , Yoshiyuki Kurokawa , Yasuhiro Jinbo , Satoshi Kobayashi , Daisuke Kawae
发明人： Shunpei Yamazaki , Yoshiyuki Kurokawa , Yasuhiro Jinbo , Satoshi Kobayashi , Daisuke Kawae
IPC分类号： H01L21/3205
CPC分类号： H01L29/4908 , H01L27/124 , H01L27/1288 , H01L29/04 , H01L29/41733 , H01L29/66765 , H01L29/78696
摘要： A thin film transistor with excellent electric characteristics, a display device having the thin film transistor, and a method for manufacturing the thin film transistor and the display device are proposed. The thin film transistor includes a gate insulating film formed over a gate electrode, a microcrystalline semiconductor film formed over the gate insulating film, a buffer layer formed over the microcrystalline semiconductor film, a pair of semiconductor films to which an impurity element imparting one conductivity type is added and which are formed over the buffer layer, and wirings formed over the pair of semiconductor films to which the impurity element imparting one conductivity type is added. A part of the gate insulating film or the entire gate insulating film, and/or a part of the microcrystalline semiconductor or the entire microcrystalline semiconductor includes an impurity element which serves as a donor.
摘要翻译：提出了具有优异电特性的薄膜晶体管，具有薄膜晶体管的显示装置，以及制造薄膜晶体管和显示装置的方法。薄膜晶体管包括形成在栅电极上的栅极绝缘膜，形成在栅极绝缘膜上的微晶半导体膜，形成在微晶半导体膜上的缓冲层，一对半导体膜，赋予一种导电型的杂质元素并且形成在缓冲层之上，并且在添加有赋予一种导电类型的杂质元素的一对半导体膜上形成的布线。栅极绝缘膜或整个栅极绝缘膜的一部分和/或微晶半导体的一部分或整个微晶半导体包括用作供体的杂质元素。

5. 发明授权

US08633485B2 Display device and manufacturing method thereof 有权
标题翻译：显示装置及其制造方法
公开(公告)号：US08633485B2
公开(公告)日：2014-01-21
申请号：US13075436
申请日：2011-03-30
申请人： Satoshi Kobayashi , Yoshiyuki Kurokawa , Shunpei Yamazaki , Daisuke Kawae
发明人： Satoshi Kobayashi , Yoshiyuki Kurokawa , Shunpei Yamazaki , Daisuke Kawae
IPC分类号： H01L31/00 , H01L29/10 , H01L29/76 , H01L31/036 , H01L31/112 , H01L21/02
CPC分类号： H01L29/41733 , H01L29/04 , H01L29/66765 , H01L29/78696
摘要： To provide a display device having a thin film transistor with high electric characteristics and excellent reliability and a manufacturing method thereof. A gate electrode, a gate insulating film provided over the gate electrode, a first semiconductor layer provided over the gate insulating film and having a microcrystalline semiconductor, a second semiconductor layer provided over the first semiconductor layer and having an amorphous semiconductor, and a source region and a drain region provided over the second semiconductor layer are provided. The first semiconductor layer has high crystallinity than the second semiconductor layer. The second semiconductor layer includes an impurity region having a conductivity type different from a conductivity type of the source region and the drain region between the source region and the drain region.
摘要翻译：提供具有高电特性和优异可靠性的薄膜晶体管的显示装置及其制造方法。栅电极，设置在栅电极上的栅极绝缘膜，设置在栅绝缘膜上并具有微晶半导体的第一半导体层，设置在第一半导体层上并具有非晶半导体的第二半导体层，以及源极区并且设置在第二半导体层上的漏极区。第一半导体层具有比第二半导体层高的结晶度。第二半导体层包括具有不同于源极区域的导电类型和源极区域与漏极区域之间的漏极区域的导电类型的杂质区域。

6. 发明授权

US08492806B2 Non-linear element, display device including non-linear element, and electronic device including display device 有权
标题翻译：非线性元件，包括非线性元件的显示装置和包括显示装置的电子装置
公开(公告)号：US08492806B2
公开(公告)日：2013-07-23
申请号：US12912353
申请日：2010-10-26
申请人： Shunpei Yamazaki , Daisuke Kawae
发明人： Shunpei Yamazaki , Daisuke Kawae
IPC分类号： H01L31/062 , H01L31/113
CPC分类号： H01L27/0255 , H01L27/1225 , H01L27/1255 , H01L29/78642 , H01L29/7869 , H01L29/861 , H02H9/044 , Y10S257/91
摘要： A non-linear element, such as a diode, in which an oxide semiconductor is used and a rectification property is favorable is provided. In a thin film transistor including an oxide semiconductor in which the hydrogen concentration is less than or equal to 5×1019/cm3, the work function φms of a source electrode in contact with the oxide semiconductor, the work function φmd of a drain electrode in contact with the oxide semiconductor, and electron affinity χ of the oxide semiconductor satisfy φms≦χ
摘要翻译：提供了使用氧化物半导体的非线性元件，例如二极管，并且整流性能良好。在其中氢浓度小于或等于5×1019 / cm3的氧化物半导体的薄膜晶体管中，与氧化物半导体接触的源电极的功函数phim，漏电极的功函数phim 与氧化物半导体接触，并且氧化物半导体的电子亲和力chi满足phim @ chi

7. 发明授权

US08390044B2 Non-linear element, display device including non-linear element, and electronic device including display device 有权
标题翻译：非线性元件，包括非线性元件的显示装置和包括显示装置的电子装置
公开(公告)号：US08390044B2
公开(公告)日：2013-03-05
申请号：US12954338
申请日：2010-11-24
申请人： Daisuke Kawae , Hideki Uochi , Shunpei Yamazaki
发明人： Daisuke Kawae , Hideki Uochi , Shunpei Yamazaki
IPC分类号： H01L31/062
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/78606 , H01L29/78642 , H01L29/78645 , H01L29/78648 , H01L29/78696
摘要： A non-linear element (such as a diode) which includes an oxide semiconductor and has a favorable rectification property is provided. In a transistor including an oxide semiconductor in which the hydrogen concentration is 5×1019/cm3 or lower, a work function φms of a source electrode in contact with the oxide semiconductor, a work function φmd of a drain electrode in contact with the oxide semiconductor, and electron affinity χ of the oxide semiconductor satisfy φms≦χ
摘要翻译：提供了包括氧化物半导体并且具有有利的整流特性的非线性元件（例如二极管）。在包含氢浓度为5×1019 / cm3以下的氧化物半导体的晶体管中，与氧化物半导体接触的源电极的功函数＆amp; ms，接触的漏电极的功函数＆phd 与氧化物半导体相比，氧化物半导体的电子亲和力χ满足＆lt; ms＆nlE;χ＆phgr; md，并且漏电极和氧化物半导体之间的接触面积大于源电极和源电极之间的接触面积氧化物半导体。通过电连接晶体管中的栅电极和漏电极，可以实现具有良好整流特性的非线性元件。

8. 发明授权

US08373203B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08373203B2
公开(公告)日：2013-02-12
申请号：US12954222
申请日：2010-11-24
申请人： Shunpei Yamazaki , Hiromichi Godo , Daisuke Kawae
发明人： Shunpei Yamazaki , Hiromichi Godo , Daisuke Kawae
IPC分类号： H01L27/148
CPC分类号： H01L29/78693 , H01L29/41733 , H01L29/42384 , H01L29/4908 , H01L29/66969 , H01L29/7869 , H01L29/78696
摘要： An intrinsic or substantially intrinsic semiconductor, which has been subjected to a step of dehydration or dehydrogenation and a step of adding oxygen so that the carrier concentration is less than 1×1012/cm3 is used for an oxide semiconductor layer of an insulated gate transistor, in which a channel region is formed. The length of the channel formed in the oxide semiconductor layer is set to 0.2 μm to 3.0 μm an inclusive and the thicknesses of the oxide semiconductor layer and the gate insulating layer are set to 15 nm to 30 nm inclusive and 20 nm to 50 nm inclusive, respectively, or 15 nm to 100 nm inclusive and 10 nm to 20 nm inclusive, respectively. Consequently, a short-channel effect can be suppressed, and the amount of change in threshold voltage can be less than 0.5 V in the range of the above channel lengths.
摘要翻译：对于绝缘栅极晶体管的氧化物半导体层，使用已进行脱水或脱氢工序的本征或本质上本征的半导体，以及添加氧以使载流子浓度小于1×10 12 / cm 3的步骤，其中形成沟道区。将形成在氧化物半导体层中的沟道的长度设定为0.2μm〜3.0μm，氧化物半导体层和栅极绝缘层的厚度为15nm〜30nm，包括20nm〜50nm ，或分别为15nm〜100nm，10nm〜20nm。因此，可以抑制短沟道效应，并且在上述通道长度的范围内阈值电压的变化量可以小于0.5V。

9. 发明授权

US08174021B2 Semiconductor device and method of manufacturing the semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08174021B2
公开(公告)日：2012-05-08
申请号：US12695179
申请日：2010-01-28
申请人： Yoshiaki Oikawa , Hotaka Maruyama , Hiromichi Godo , Daisuke Kawae , Shunpei Yamazaki
发明人： Yoshiaki Oikawa , Hotaka Maruyama , Hiromichi Godo , Daisuke Kawae , Shunpei Yamazaki
IPC分类号： H01L27/14
CPC分类号： H01L27/1225 , G02F1/1368 , G02F2201/121 , G02F2201/123 , H01L21/02565 , H01L21/02631 , H01L27/1214 , H01L27/124 , H01L27/156 , H01L27/3248 , H01L27/3262 , H01L29/24 , H01L29/78618 , H01L29/7869 , H01L29/78693 , H01L29/78696
摘要： An object is to provide a semiconductor device provided with a thin film transistor having excellent electric characteristics using an oxide semiconductor layer. An In—Sn—O-based oxide semiconductor layer including SiOX is used for a channel formation region. In order to reduce contact resistance between the In—Sn—O-based oxide semiconductor layer including SiOX and a wiring layer formed from a metal material having low electric resistance, a source region or drain region is formed between a source electrode layer or drain electrode layer and the In—Sn—O-based oxide semiconductor layer including SiOX. The source region or drain region and a pixel region are formed using an In—Sn—O-based oxide semiconductor layer which does not include SiOX.
摘要翻译：本发明的目的是提供一种具有使用氧化物半导体层的具有优异电特性的薄膜晶体管的半导体器件。包括SiOX的In-Sn-O系氧化物半导体层用于沟道形成区域。为了降低包含SiOX的In-Sn-O系氧化物半导体层与由电阻低的金属材料形成的布线层之间的接触电阻，在源电极层或漏极之间形成源极区或漏极区层和包含SiOX的In-Sn-O系氧化物半导体层。使用不包含SiOX的In-Sn-O系氧化物半导体层来形成源极区域或漏极区域以及像素区域。

10. 发明申请

US20110101338A1 NON-LINEAR ELEMENT, DISPLAY DEVICE INCLUDING NON-LINEAR ELEMENT, AND ELECTRONIC DEVICE INCLUDING DISPLAY DEVICE 有权
标题翻译：非线性元件，包括非线性元件的显示装置和包括显示装置的电子装置
公开(公告)号：US20110101338A1
公开(公告)日：2011-05-05
申请号：US12912353
申请日：2010-10-26
申请人： Shunpei Yamazaki , Daisuke Kawae
发明人： Shunpei Yamazaki , Daisuke Kawae
IPC分类号： H01L29/16
CPC分类号： H01L27/0255 , H01L27/1225 , H01L27/1255 , H01L29/78642 , H01L29/7869 , H01L29/861 , H02H9/044 , Y10S257/91
摘要： A non-linear element, such as a diode, in which an oxide semiconductor is used and a rectification property is favorable is provided. In a thin film transistor including an oxide semiconductor in which the hydrogen concentration is less than or equal to 5×1019/cm3, the work function φms of a source electrode in contact with the oxide semiconductor, the work function φmd of a drain electrode in contact with the oxide semiconductor, and electron affinity χ of the oxide semiconductor satisfy φms≦χ
摘要翻译：提供了使用氧化物半导体的非线性元件，例如二极管，并且整流性能良好。在包含氢浓度小于或等于5×1019 / cm3的氧化物半导体的薄膜晶体管中，与氧化物半导体接触的源电极的功函数＆amp; ms，与氧化物半导体接触的漏极，氧化物半导体的电子亲和力χ满足＆lt; ms＆nlE;χ＆phgr; md。通过电连接薄膜晶体管的栅电极和漏电极，可以实现具有更好的整流特性的非线性元件。

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