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1. 发明授权

US08278644B2 Switching device and nonvolatile memory device 有权
标题翻译：开关器件和非易失性存储器件
公开(公告)号：US08278644B2
公开(公告)日：2012-10-02
申请号：US12710942
申请日：2010-02-23
申请人： Shosuke Fujii , Koichi Muraoka
发明人： Shosuke Fujii , Koichi Muraoka
IPC分类号： H01L29/06
CPC分类号： H01L29/51 , H01L29/1606 , H01L29/7781 , H01L29/78
摘要： A switching device includes: a first layer including a carbon material having a six-member ring network structure; a first electrode electrically connected to a first portion of the first layer; a second electrode electrically connected to a second portion of the first layer and provided apart from the first electrode; a third electrode including a fourth portion provided opposing a third portion between the first portion and the second portion of the first layer; and a second layer provided between the third portion of the first layer and the fourth portion of the third electrode. The second layer includes: a base portion; and a functional group portion. The functional group portion is provided between the base portion and the first layer. The functional group portion is bonded to the base portion. A ratio of sp2-bonded carbon and sp3-bonded carbon of the first layer is changeable by a voltage applied between the first layer and the third electrode.
摘要翻译：开关装置包括：第一层，包括具有六元环网结构的碳材料; 电连接到第一层的第一部分的第一电极; 电连接到第一层的第二部分并且与第一电极分开设置的第二电极; 第三电极，包括与所述第一层的第一部分和第二部分之间的第三部分相对设置的第四部分; 以及设置在第一层的第三部分和第三电极的第四部分之间的第二层。第二层包括：基部; 和官能团部分。功能组部分设置在基部和第一层之间。官能团部分结合到基部。第一层的sp2键合碳和sp3键合碳的比例可以通过施加在第一层和第三电极之间的电压而改变。

2. 发明申请

US20100078704A1 SEMICONDUCTOR STORAGE ELEMENT AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体存储元件及其制造方法
公开(公告)号：US20100078704A1
公开(公告)日：2010-04-01
申请号：US12404648
申请日：2009-03-16
申请人： Tsunehiro Ino , Shosuke Fujii , Jun Fujiki , Akira Takashima , Masao Shingu , Daisuke Matsushita , Naoki Yasuda , Koichi Muraoka
发明人： Tsunehiro Ino , Shosuke Fujii , Jun Fujiki , Akira Takashima , Masao Shingu , Daisuke Matsushita , Naoki Yasuda , Koichi Muraoka
IPC分类号： H01L29/792 , H01L21/28
CPC分类号： H01L29/792 , H01L29/517 , H01L29/66833
摘要： A semiconductor storage element includes: a source region and a drain region provided in a semiconductor substrate; a tunnel insulating film provided on the semiconductor substrate between the source region and the drain region; a charge storage film provided on the tunnel insulating film; a block insulating film provided on the charge storage film; a gate electrode provided on the block insulating film; and a region containing a gas molecule, the region provided in a neighborhood of an interface between the charge storage film and the block insulating film.
摘要翻译：半导体存储元件包括：设置在半导体衬底中的源极区域和漏极区域; 设置在所述源极区域和所述漏极区域之间的所述半导体衬底上的隧道绝缘膜; 设置在所述隧道绝缘膜上的电荷存储膜; 设置在电荷存储膜上的块状绝缘膜; 设置在所述块绝缘膜上的栅电极; 以及包含气体分子的区域，所述区域设置在电荷存储膜和块绝缘膜之间的界面附近。

3. 发明授权

US08569823B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08569823B2
公开(公告)日：2013-10-29
申请号：US13235970
申请日：2011-09-19
申请人： Tsunehiro Ino , Masao Shingu , Shosuke Fujii , Akira Takashima , Daisuke Matsushita , Jun Fujiki , Naoki Yasuda , Yasushi Nakasaki , Koichi Muraoka
发明人： Tsunehiro Ino , Masao Shingu , Shosuke Fujii , Akira Takashima , Daisuke Matsushita , Jun Fujiki , Naoki Yasuda , Yasushi Nakasaki , Koichi Muraoka
IPC分类号： H01L29/788
CPC分类号： H01L29/513 , H01L21/28282 , H01L27/11568 , H01L29/517 , H01L29/66833 , H01L29/792
摘要： According to one embodiment, a semiconductor device includes a semiconductor region, a tunnel insulating film provided on the semiconductor region, a charge storage insulating film provided on the tunnel insulating film and having a hafnium oxide including a cubic region, a block insulating film provided on the charge storage insulating film, and a control gate electrode provided on the block insulating film.
摘要翻译：根据一个实施例，半导体器件包括半导体区域，设置在半导体区域上的隧道绝缘膜，设置在隧道绝缘膜上并具有包含立方体区域的氧化铪的电荷存储绝缘膜，设置在电荷存储绝缘膜和设置在块绝缘膜上的控制栅电极。

4. 发明申请

US20120068250A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120068250A1
公开(公告)日：2012-03-22
申请号：US13235970
申请日：2011-09-19
申请人： Tsunehiro Ino , Masao Shingu , Shosuke Fujii , Akira Takashima , Daisuke Matsushita , Jun Fujiki , Naoki Yasuda , Yasushi Nakasaki , Koichi Muraoka
发明人： Tsunehiro Ino , Masao Shingu , Shosuke Fujii , Akira Takashima , Daisuke Matsushita , Jun Fujiki , Naoki Yasuda , Yasushi Nakasaki , Koichi Muraoka
IPC分类号： H01L29/788 , H01L21/28
CPC分类号： H01L29/513 , H01L21/28282 , H01L27/11568 , H01L29/517 , H01L29/66833 , H01L29/792
摘要： According to one embodiment, a semiconductor device includes a semiconductor region, a tunnel insulating film provided on the semiconductor region, a charge storage insulating film provided on the tunnel insulating film and having a hafnium oxide including a cubic region, a block insulating film provided on the charge storage insulating film, and a control gate electrode provided on the block insulating film.
摘要翻译：根据一个实施例，半导体器件包括半导体区域，设置在半导体区域上的隧道绝缘膜，设置在隧道绝缘膜上并具有包含立方体区域的氧化铪的电荷存储绝缘膜，设置在电荷存储绝缘膜和设置在块绝缘膜上的控制栅电极。

5. 发明授权

US07956405B2 Semiconductor storage element and manufacturing method thereof 有权
标题翻译：半导体存储元件及其制造方法
公开(公告)号：US07956405B2
公开(公告)日：2011-06-07
申请号：US12404648
申请日：2009-03-16
申请人： Tsunehiro Ino , Shosuke Fujii , Jun Fujiki , Akira Takashima , Masao Shingu , Daisuke Matsushita , Naoki Yasuda , Koichi Muraoka
发明人： Tsunehiro Ino , Shosuke Fujii , Jun Fujiki , Akira Takashima , Masao Shingu , Daisuke Matsushita , Naoki Yasuda , Koichi Muraoka
IPC分类号： H01L29/788
CPC分类号： H01L29/792 , H01L29/517 , H01L29/66833
摘要： A semiconductor storage element includes: a source region and a drain region provided in a semiconductor substrate; a tunnel insulating film provided on the semiconductor substrate between the source region and the drain region; a charge storage film provided on the tunnel insulating film; a block insulating film provided on the charge storage film; a gate electrode provided on the block insulating film; and a region containing a gas molecule, the region provided in a neighborhood of an interface between the charge storage film and the block insulating film.
摘要翻译：半导体存储元件包括：设置在半导体衬底中的源极区域和漏极区域; 设置在所述源极区域和所述漏极区域之间的所述半导体衬底上的隧道绝缘膜; 设置在隧道绝缘膜上的电荷存储膜; 设置在电荷存储膜上的块状绝缘膜; 设置在所述块绝缘膜上的栅电极; 以及包含气体分子的区域，所述区域设置在电荷存储膜和块绝缘膜之间的界面附近。

6. 发明申请

US20100213435A1 SWITCHING DEVICE AND NONVOLATILE MEMORY DEVICE 有权
标题翻译：开关器件和非易失性存储器件
公开(公告)号：US20100213435A1
公开(公告)日：2010-08-26
申请号：US12710942
申请日：2010-02-23
申请人： Shosuke Fujii , Koichi Muraoka
发明人： Shosuke Fujii , Koichi Muraoka
IPC分类号： H01L29/66 , H01L29/78
CPC分类号： H01L29/51 , H01L29/1606 , H01L29/7781 , H01L29/78
摘要： A switching device includes: a first layer including a carbon material having a six-member ring network structure; a first electrode electrically connected to a first portion of the first layer; a second electrode electrically connected to a second portion of the first layer and provided apart from the first electrode; a third electrode including a fourth portion provided opposing a third portion between the first portion and the second portion of the first layer; and a second layer provided between the third portion of the first layer and the fourth portion of the third electrode. The second layer includes: a base portion; and a functional group portion. The functional group portion is provided between the base portion and the first layer. The functional group portion is bonded to the base portion. A ratio of sp2-bonded carbon and sp3-bonded carbon of the first layer is changeable by a voltage applied between the first layer and the third electrode.
摘要翻译：开关装置包括：第一层，包括具有六元环网结构的碳材料; 电连接到第一层的第一部分的第一电极; 电连接到第一层的第二部分并且与第一电极分开设置的第二电极; 第三电极，包括与所述第一层的第一部分和第二部分之间的第三部分相对设置的第四部分; 以及设置在第一层的第三部分和第三电极的第四部分之间的第二层。第二层包括：基部; 和官能团部分。功能组部分设置在基部和第一层之间。官能团部分结合到基部。第一层的sp2键合碳和sp3键合碳的比例可以通过施加在第一层和第三电极之间的电压而改变。

7. 发明授权

US09379320B2 Nonvolatile memory device 有权
标题翻译：非易失性存储器件
公开(公告)号：US09379320B2
公开(公告)日：2016-06-28
申请号：US13362832
申请日：2012-01-31
申请人： Masao Shingu , Akira Takashima , Koichi Muraoka
发明人： Masao Shingu , Akira Takashima , Koichi Muraoka
IPC分类号： H01L45/00 , H01L27/06 , H01L27/24 , H01L27/10
CPC分类号： H01L45/1273 , H01L27/101 , H01L27/2436 , H01L27/2463 , H01L45/08 , H01L45/1226 , H01L45/146 , H01L45/1616 , H01L45/1675
摘要： According to one embodiment, a nonvolatile memory device includes a memory section. The memory section includes a first insulating layer, a second insulating layer and a pair of electrodes. The second insulating layer is formed on and in contact with the first insulating layer. The second insulating layer has at least one of a composition different from a composition of the first insulating layer and a phase state different from a phase state of the first insulating layer. The pair of electrodes is capable of passing a current through a current path along a boundary portion between the first insulating layer and the second insulating layer. An electrical resistance of the current path is changed by a voltage applied between the pair of electrodes.
摘要翻译：根据一个实施例，非易失性存储器件包括存储器部分。存储部分包括第一绝缘层，第二绝缘层和一对电极。第二绝缘层形成在第一绝缘层上并与第一绝缘层接触。第二绝缘层具有与第一绝缘层的组成不同的组成和与第一绝缘层的相位状态不同的相位状态中的至少一个。一对电极能够使电流通过沿着第一绝缘层和第二绝缘层之间的边界部分的电流路径。通过施加在该对电极之间的电压来改变电流路径的电阻。

8. 发明授权

US08779502B2 Nonvolatile semiconductor memory 失效
标题翻译：非易失性半导体存储器
公开(公告)号：US08779502B2
公开(公告)日：2014-07-15
申请号：US13316603
申请日：2011-12-12
申请人： Kiwamu Sakuma , Atsuhiro Kinoshita , Masahiro Kiyotoshi , Daisuke Hagishima , Koichi Muraoka
发明人： Kiwamu Sakuma , Atsuhiro Kinoshita , Masahiro Kiyotoshi , Daisuke Hagishima , Koichi Muraoka
IPC分类号： H01L29/792 , H01L29/66 , H01L21/70 , H01L21/336
CPC分类号： H01L29/42328 , H01L21/28273 , H01L21/28282 , H01L27/11521 , H01L27/11524 , H01L27/11551 , H01L27/11568 , H01L27/11578 , H01L29/42344 , H01L29/66825 , H01L29/66833 , H01L29/7881 , H01L29/792
摘要： According to one embodiment, a nonvolatile semiconductor memory includes first to n-th (n is a natural number not less than 2) semiconductor layers in a first direction and extend in a second direction, and the semiconductor layers having a stair case pattern in a first end of the second direction, a common semiconductor layer connected to the first to n-th semiconductor layers commonly in the first end of the second direction, first to n-th layer select transistors which are provided in order from the first electrode side between the first electrode and the first to n-th memory strings, and first to n-th impurity regions which make the i-th layer select transistor (i is one of 1 to n) a normally-on state in the first end of the second direction of the i-th semiconductor layer.
摘要翻译：根据一个实施例，非易失性半导体存储器包括在第一方向上的第一至第n（n是不小于2的自然数）半导体层，并且在第二方向上延伸，并且半导体层具有阶梯状图案第二方向的第一端，在第二方向的第一端中共同连接到第一至第n半导体层的公共半导体层，第一至第n层选择晶体管，其从第一电极侧第一电极和第一至第n存储器串以及使第i层选择晶体管（i为1至n之一）的第一至第n杂质区在第一端中的正常导通状态第i个半导体层的第2方向。

9. 发明授权

US08610196B2 Memory including transistors with double floating gate structures 失效
标题翻译：存储器包括具有双浮栅结构的晶体管
公开(公告)号：US08610196B2
公开(公告)日：2013-12-17
申请号：US13608436
申请日：2012-09-10
申请人： Tetsufumi Tanamoto , Kosuke Tatsumura , Kiwamu Sakuma , Atsuhiro Kinoshita , Shinobu Fujita , Koichi Muraoka
发明人： Tetsufumi Tanamoto , Kosuke Tatsumura , Kiwamu Sakuma , Atsuhiro Kinoshita , Shinobu Fujita , Koichi Muraoka
IPC分类号： H01L27/11
CPC分类号： H01L29/42332 , G11C11/412 , G11C14/0063 , H01L27/1104 , H01L29/7881
摘要： In a memory of an embodiment, first and second P-channel transistors are formed on a first semiconductor region, and each of the first and second P-channel transistors has a structure formed by stacking a first insulating film, a first floating gate, a second insulating film, a second floating gate, a third insulating film, and a first control gate in this order on the first semiconductor region. In the memory, first and second N-channel transistors are formed on a second semiconductor region, and each of the first and second N-channel transistors has a structure formed by stacking a fourth insulating film, a third floating gate, a fifth insulating film, a fourth floating gate, a sixth insulating film, and a second control gate in this order on the second semiconductor region.
摘要翻译：在实施例的存储器中，第一和第二P沟道晶体管形成在第一半导体区域上，并且第一和第二P沟道晶体管中的每一个具有通过堆叠第一绝缘膜，第一浮动栅极，第二绝缘膜，第二浮栅，第三绝缘膜和第一控制栅极。在存储器中，第一和第二N沟道晶体管形成在第二半导体区域上，并且第一和第二N沟道晶体管中的每一个具有通过堆叠第四绝缘膜，第三浮栅，第五绝缘膜，第四浮栅，第六绝缘膜和第二控制栅极。

10. 发明授权

US08319271B2 NAND-type nonvolatile semiconductor memory device 有权
标题翻译： NAND型非易失性半导体存储器件
公开(公告)号：US08319271B2
公开(公告)日：2012-11-27
申请号：US13182283
申请日：2011-07-13
申请人： Shoko Kikuchi , Yasushi Nakasaki , Koichi Muraoka
发明人： Shoko Kikuchi , Yasushi Nakasaki , Koichi Muraoka
IPC分类号： H01L29/788
CPC分类号： H01L27/11568 , H01L21/28282 , H01L29/513 , H01L29/517 , H01L29/78
摘要： The present invention provides a high-performance MONOS-type NAND-type nonvolatile semiconductor memory device using an aluminum oxide film as a part of gate insulating film in a select transistor and as a block insulating film in a memory transistor. The NAND-type nonvolatile semiconductor memory device has, on a semiconductor substrate, a plurality of memory cell transistors connected to each other in series and a select transistor. The memory cell transistor includes a first insulating film on the semiconductor substrate, a charge trapping layer, a second insulating film made of aluminum oxide, a first control gate electrode, and a first source/drain region. The select transistor includes a third insulating film on the semiconductor substrate, a fourth insulating film made of an aluminum oxide containing at least one of a tetravalent cationic element, a pentavalent cationic element, and N (nitrogen), a second control gate electrode, and a second source/drain region.
摘要翻译：本发明提供一种在选择晶体管中使用氧化铝膜作为栅绝缘膜的一部分的高性能MONOS型NAND型非易失性半导体存储器件，并且作为存储晶体管中的块绝缘膜。 NAND型非易失性半导体存储器件在半导体衬底上具有串联连接的多个存储单元晶体管和选择晶体管。存储单元晶体管包括半导体衬底上的第一绝缘膜，电荷俘获层，由氧化铝制成的第二绝缘膜，第一控制栅极电极和第一源极/漏极区域。选择晶体管包括半导体衬底上的第三绝缘膜，由包含四价阳离子元素，五价阳离子元素和N（氮）中的至少一种的氧化铝制成的第四绝缘膜，第二控制栅电极和第二源极/漏极区域。

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