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1. 发明授权

US4679140A Data processor with control of the significant bit lengths of general purpose registers 失效
标题翻译：数据处理器可控制通用寄存器的有效位长度
公开(公告)号：US4679140A
公开(公告)日：1987-07-07
申请号：US684785
申请日：1984-12-21
申请人： Shizuo Gotou , Toyohiko Kagimasa , Seiichi Yoshizumi , Yooichi Shintani
发明人： Shizuo Gotou , Toyohiko Kagimasa , Seiichi Yoshizumi , Yooichi Shintani
IPC分类号： G06F9/318 , G06F9/355 , G06F12/04
CPC分类号： G06F9/342 , G06F9/30036 , G06F9/30181
摘要： A mode register stores a mode bit for each of the general registers, an access circuit accesses the general registers and the mode register so that a general register designated by an instruction and a corresponding mode bit are read out together. A data use circuit or a data supply circuit connected to the general registers includes a circuit portion which effectively changes the significant bit length of the data read out of the designated general register or of the data to be written into the designated general register.
摘要翻译：模式寄存器存储每个通用寄存器的模式位，访问电路访问通用寄存器和模式寄存器，使得由指令指定的通用寄存器和相应的模式位一起读出。连接到通用寄存器的数据使用电路或数据提供电路包括有效地改变从指定通用寄存器读出的数据或要写入指定通用寄存器的数据的有效位长度的电路部分。

2. 发明授权

US4876646A Data processor having multilevel address translation tables 失效
标题翻译：具有多级地址转换表的数据处理器
公开(公告)号：US4876646A
公开(公告)日：1989-10-24
申请号：US810189
申请日：1985-12-18
申请人： Shizuo Gotou , Toyohiko Kagimasa , Seiichi Yoshizumi
发明人： Shizuo Gotou , Toyohiko Kagimasa , Seiichi Yoshizumi
IPC分类号： G06F12/02 , G06F12/10
CPC分类号： G06F12/1009 , G06F12/0292
摘要： An information processing system including a group of translation tables in a multilevel structure for achieving address translation from a virtual address into a real address, a control register for keeping a starting point address data of a translation table located at a highest level among the address translation tables and a level data indicating a level (n) of the translation table at the highest level among the group of translation tables, and a unit for sequentially accessing the address translation tables at levels lower than the level (n) indicated by the level data in the control register based on the starting point address data and a virtual address to be translated, thereby translating the virtual address into a real address.
摘要翻译：一种信息处理系统，包括用于实现从虚拟地址到实际地址的地址转换的多级结构中的一组转换表，用于保持地址转换中位于最高级别的翻译表的起点地址数据的控制寄存器表和表示该组转换表中的最高级别的翻译表的级别（n）的级别数据，以及用于以低于由级别数据指示的级别（n）顺序访问地址转换表的单元在控制寄存器中基于起始点地址数据和要转换的虚拟地址，从而将虚拟地址转换为实际地址。

3. 发明授权

US4792897A Address translation unit for translation of virtual address to real address using translation tables of multi-level hierarchical structure 失效
标题翻译：地址转换单元，用于使用多级分层结构的转换表将虚拟地址转换为实地址
公开(公告)号：US4792897A
公开(公告)日：1988-12-20
申请号：US783084
申请日：1985-10-02
申请人： Shizuo Gotou , Toyohiko Kagimasa
发明人： Shizuo Gotou , Toyohiko Kagimasa
IPC分类号： G06F12/10
CPC分类号： G06F12/1027 , G06F12/1009 , G06F2212/651
摘要： An extended address translation equipment wherein an address translation buffer has entries each provided with a record of translation table addresses of each level, thereby eliminating the need for accessing the translation table up to a portion consistent with the virtual address.
摘要翻译：一种扩展地址转换设备，其中地址转换缓冲器具有各自具有每个级别的转换表地址的记录的条目，从而不需要访问转换表直到与虚拟地址一致的部分。

4. 发明授权

US5109331A Compiling a source program by analyzing a subscript of an array included in a loop processing of a computer 失效
标题翻译：通过分析包含在计算机的循环处理中的阵列的脚本来编译源程序
公开(公告)号：US5109331A
公开(公告)日：1992-04-28
申请号：US97196
申请日：1987-09-16
申请人： Kazuhisa Ishida , Yasusi Kanada , Shizuo Gotou
发明人： Kazuhisa Ishida , Yasusi Kanada , Shizuo Gotou
IPC分类号： G06F9/45 , G06F17/16
CPC分类号： G06F8/433
摘要： An induction variable contained in a definition formula for a variable in a loop is analyzed for a source program to be compiled in order to optimize the execution of the program. The induction variable is represented by a standard form expressed by a value (initial value) in a first interation of the loop and a value (increment) which is incremented for each iteration of the loop, and a subscript in an array in the loop is represented by linear coupling to the standard form. Whether the subscript assumes the same value in one or more iterations of the loop for a pair of arrays in the loop is checked to analyze the independency and dependency of the arrays in the loop.
摘要翻译：分析包含在循环中的变量的定义公式中的归纳变量以供编译的源程序，以优化程序的执行。感应变量由循环的第一个交互中的值（初始值）表示的标准形式和循环的每次迭代递增的值（增量）表示，循环中的数组中的下标为由标准形式的线性耦合表示。检查下标在循环中一对数组的循环的一个或多个迭代中是否具有相同的值，以分析循环中数组的独立性和依赖性。

5. 发明授权

US4807126A Method for converting a source program having a loop including a control statement into an object program 失效
标题翻译：用于将具有包括控制语句的循环的源程序转换为对象程序的方法
公开(公告)号：US4807126A
公开(公告)日：1989-02-21
申请号：US12991
申请日：1987-02-10
申请人： Shizuo Gotou , Yasusi Kanada , Kyoko Iwasawa
发明人： Shizuo Gotou , Yasusi Kanada , Kyoko Iwasawa
IPC分类号： G06F9/45 , G06F1/00
CPC分类号： G06F8/443
摘要： A method for converting a source program having a loop including a control statement into an object program including the steps of detecting from the statements of a first loop of a source program a control statement (an inductive control statement) having a control expression; detecting based on the control expression a turning form indicating whether a change of a turning number representing a loop iteration count indicates changes from values for a successful branch to values for an unsuccessful branch or vice versa and a turning point type indicating whether the turning number is an initial iteration count, a final iteration count, or an intermediate iteration count of the first loop; generating a string of statements having a loop not including the control statement and generating an execution result identical to an execution result of the first loop based on the first loop, the turning number, the turning form and the turning point type detected on the control statement; and converting the generated string of statements into an object code.
摘要翻译：一种用于将具有包括控制语句的循环的源程序转换成对象程序的方法，包括以下步骤：从源程序的第一循环的语句中检测具有控制表达式的控制语句（归纳控制语句）; 基于所述控制表达式检测表示循环迭代计数的转向数的改变的转弯表示是否从成功分支的值改变为不成功分支的值或反之亦然，以及指示转向数是否为初始迭代计数，最终迭代计数或第一循环的中间迭代计数; 生成具有不包括控制语句的循环的语句串，并且基于在控制语句上检测到的第一循环，转弯次数，转弯形式和转折点类型，生成与第一循环的执行结果相同的执行结果 ; 并将生成的语句字符串转换为目标代码。

6. 发明授权

US5067068A Method for converting an iterative loop of a source program into parellelly executable object program portions 失效
标题翻译：将源程序的迭代循环转换为可执行对象程序部分的方法
公开(公告)号：US5067068A
公开(公告)日：1991-11-19
申请号：US201772
申请日：1988-06-02
申请人： Kyoko Iwasawa , Yoshikazu Tanaka , Shizuo Gotou
发明人： Kyoko Iwasawa , Yoshikazu Tanaka , Shizuo Gotou
IPC分类号： G06F9/45 , G06F15/16
CPC分类号： G06F8/452
摘要： In a compiling method, whether a variable (induction variable)recurrsively defined during loop iteration is included in an iteratively executed loop portion of a source program is detected. If such a variable is detected, a computation program portion for calculating a value of the variable which the variable should have during loop iteration of an arbitrary loop iteration number is generated. A plurality of parallely executable object program portions each for executing one of a plurality of processing to be executed during loop iteration of a respective loop iteration number of the loop portion is generated. Each of the object program portions includes a portion for executing the generated computation program portion for a respective loop iteration number to calculate a value of the variable for that loop iteration number.
摘要翻译：在编译方法中，检测在循环迭代期间重复定义的变量（感应变量）是否包含在源程序的迭代执行循环部分中。如果检测到这样的变量，则生成用于计算变量在任意循环迭代次数的循环迭代期间应该具有的变量的值的计算程序部分。生成多个并行执行对象程序部分，每个用于执行循环部分的相应循环迭代次数的循环迭代期间要执行的多个处理中的一个。每个对象程序部分包括用于执行相应的循环次数的所生成的计算程序部分的部分，以计算该循环迭代次数的变量的值。

7. 发明授权

US5151991A Parallelization compile method and system 失效
标题翻译：并行编译方法和系统
公开(公告)号：US5151991A
公开(公告)日：1992-09-29
申请号：US259243
申请日：1988-10-18
申请人： Kyoko Iwasawa , Yoshikazu Tanaka , Shizuo Gotou
发明人： Kyoko Iwasawa , Yoshikazu Tanaka , Shizuo Gotou
IPC分类号： G06F9/45
CPC分类号： G06F8/452
摘要： In order to make parallel processing of a serial execution type user program automatically and at a high speed without re-coding, an object code is parallelized by detection of the possibility of parallel execution in an iteration unit of a loop, detection of the possibility of parallel execution of each statement in the loop, the interchange of an outer loop by an inner loop of a multiple loop, reduction of the multiple loop to a single loop, inclined coversion for making parallel execution along a wave front plane (line) when sufficient multiplicity is not derived, and the program which is estimated to have the shortest processing time is selected from the granularity, and multiplicity of the object code, the variance of the number of instructions and the proportion of synchronization control at the time of parallelization of the object code.
摘要翻译：为了自动和高速地并行处理串行执行型用户程序，无需重新编码，通过检测循环的迭代单元中的并行执行的可能性来并行化目标代码，检测可能性在循环中并行执行每个语句，通过多个循环的内部循环来交换外部循环，将多个循环减少到单个循环，当足够的时候沿着波形平面（线）并行执行倾斜的转换不导出多重性，并且从粒度，目标码的多样性，指令数的方差以及在并行化时的同步控制的比例的粒度，多项性中选择估计具有最短处理时间的程序目标代码。

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