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    • 1. 发明授权
    • Tracheal smooth muscle relaxant
    • 气管平滑肌松弛剂
    • US06180659B2
    • 2001-01-30
    • US09101842
    • 1998-08-31
    • Shinya YamashitaJiro TakeoShuji JinnoYasuyo KogureHiroyuki OnukiTakaaki OkitaJunichiro HataYasuhiro FukudaNaomi Ohtsuka
    • Shinya YamashitaJiro TakeoShuji JinnoYasuyo KogureHiroyuki OnukiTakaaki OkitaJunichiro HataYasuhiro FukudaNaomi Ohtsuka
    • A61K3138
    • C07D337/14A61K31/352A61K31/382C07D313/14Y10S514/826
    • The present invention offers a tracheal smooth muscle relaxant containing the compound represented by the following formula (1) or pharmacologically acceptable salt thereof as an effective ingredient. [In the formula, X and Y each is any group selected from a group consisting of CH2, CHW1 (where W1 is halogen atom, hydroxyl group or lower alkoxy group) and C═O when the bond of X and Y is a single bond while, when it is a double bond, X and Y each is any group selected from a group consisting of CH and COW2 (where W2 is lower alkyl group or lower alkylcarbonyl group); Z is O, S, S═O or SO2; and R1˜R8 each is selected from a group consisting of hydrogen atom, VR9 (where V is O, S, S═O or SO2; and R9 is hydrogen atom, lower alkyl group, hydroxy lower alkyl group, lower acyl group, trihalomethyl group or carboxyl lower alkyl group), carboxyl lower alkyl group, hydroxy lower alkyl group, hydroxy lower alkenyl group, hydroxy lower alkynyl group, halogen atom, lower alkyl group, lower alkyl ketone, trihalomethyl group, trimethylsilylethynyl, nitro group, amino group, N-carbonyl lower alkyl group, lower alkylphenyl group and phenyl group].
    • 本发明提供含有下述式(1)表示的化合物或其药理学上可接受的盐作为有效成分的气管平滑肌松弛剂。[式中,X和Y各自为选自CH 2, CHW1(其中W1为卤原子,羟基或低级烷氧基),当X和Y的键为单键时为C = O,而当为双键时,X和Y各自为选自 由CH和COW 2组成(其中W2是低级烷基或低级烷基羰基); Z是O,S,S = O或SO 2; R1〜R8各自选自氢原子,VR9(其中V为O,S,S = O或SO2; R9为氢原子,低级烷基,羟基低级烷基,低级酰基,三卤甲基 羧基低级烷基,羟基低级烷基,羟基低级烯基,羟基低级炔基,卤素原子,低级烷基,低级烷基酮,三卤代甲基,三甲基甲硅烷基乙炔基,硝基,氨基, N-羰基低级烷基,低级烷基苯基和苯基]。
    • 4. 发明申请
    • SEMICONDUCTOR DEVICE WITH ESD PROTECTION FUNCTION AND ESD PROTECTION CIRCUIT
    • 具有ESD保护功能和ESD保护电路的半导体器件
    • US20100134938A1
    • 2010-06-03
    • US12688080
    • 2010-01-15
    • Yasuhiro Fukuda
    • Yasuhiro Fukuda
    • H02H9/04
    • H01L27/0255H01L21/84H01L27/0266H01L27/1203
    • A semiconductor device with an ESD protection function has an SOI substrate, first to fourth diffusion layers, and a gate. The SOI substrate has a semiconductor layer on an insulation layer. The first diffusion layer is of a first conductivity type and is formed on the semiconductor layer. The second diffusion layer is of the first conductivity type and is formed on the semiconductor layer. The third diffusion layer is of a second conductivity type and is formed on the semiconductor layer so as to be adjacent to the first and second diffusion layers. The fourth diffusion layer is of the second conductivity type and is formed on the semiconductor layer so as to be adjacent to the first diffusion layer and electrically connected to the second diffusion layer. The gate is formed over the third diffusion layer.
    • 具有ESD保护功能的半导体器件具有SOI衬底,第一至第四扩散层和栅极。 SOI衬底在绝缘层上具有半导体层。 第一扩散层是第一导电类型并形成在半导体层上。 第二扩散层是第一导电类型,并形成在半导体层上。 第三扩散层是第二导电类型,并且形成在半导体层上以便与第一和第二扩散层相邻。 第四扩散层是第二导电类型,并且形成在半导体层上以与第一扩散层相邻并且电连接到第二扩散层。 栅极形成在第三扩散层上。
    • 6. 发明授权
    • Driving circuit
    • 驱动电路
    • US06919870B2
    • 2005-07-19
    • US09887594
    • 2001-06-22
    • Yasuhiro Fukuda
    • Yasuhiro Fukuda
    • G02F1/133G09G3/20G09G3/36G11C19/00H03F1/02H03F3/34H03F3/72
    • G11C19/00G09G3/3614G09G3/3688G09G2310/027G09G2310/0291G09G2310/0294G09G2310/0297G09G2320/02G09G2330/021
    • The objective of this invention is to compensate or avoid the influence of offset in an easy and efficient manner, to correctly match the voltage of the output signal with the voltage of the input signal, that is, the target value, and to significantly reduce the current consumption. When voltage follower 32L supplies bias voltage VBn to each of constant current source circuits 58L, 60L, it acts as a source-type voltage follower. However, when the bias voltage applied to each of constant current source circuits 58L, 60L is changed from VBn to Vss of the power supply voltage level, each of constant current source circuits 58L, 60L is turned off, and no current flows through them. When the constant current source circuit 58 is turned off in differential input part 44L, the potential at the output terminal (node) NL rises almost to the level of the power supply voltage Vdd. In this way, the driving transistor 62L is also turned off in output part 46L.
    • 本发明的目的是以容易和有效的方式补偿或避免偏移的影响,以将输出信号的电压与输入信号的电压,即目标值正确地匹配,并且显着地减少 目前的消费。 当电压跟随器32L向每个恒流源电路58L,60L提供偏置电压VBn时,其作为源极型电压跟随器。 然而,当施加到恒定电流源电路58L,60L中的每一个的偏置电压从电源电压电平的VBn变为Vss时,恒流源电路58L,60L中的每一个都断开,并且没有电流 流过他们。 当差动输入部分44L中的恒流源电路58断开时,输出端(节点)NL处的电位几乎上升到电源电压Vdd的电平。 以这种方式,驱动晶体管62L也在输出部分46L中截止。
    • 10. 发明授权
    • Electro-static discharge protection circuit and semiconductor device having the same
    • 静电放电保护电路和具有相同的半导体器件
    • US07498615B2
    • 2009-03-03
    • US11276403
    • 2006-02-28
    • Toshikazu KurodaHirokazu HayashiYasuhiro Fukuda
    • Toshikazu KurodaHirokazu HayashiYasuhiro Fukuda
    • H01L29/74
    • H01L27/0262
    • An electro-static discharge protection circuit includes a thyristor mode ensuring circuit and a thyristor rectifier circuit. The thyristor mode ensuring circuit includes a capacitive element connected between a higher potential line and a lower potential line, and ensures a constant and sufficient capacity independently of the number of input/output signal bits, even when the number of input/output signal bits is a theoretical minimum, i.e. 1, so that a surge current induced by electro-static discharge (ESD) applied to an output pad is injected into the first capacitive element to charge it. Thus, by means of the current caused by the surge current, the thyristor rectifier circuit is triggered into a thyristor mode, which allows the surge current to flow to the lower potential line through the thyristor rectifier circuit, protecting circuitry against the surge current.
    • 一种静电放电保护电路包括晶闸管模式保护电路和晶闸管整流电路。 晶闸管模式确保电路包括连接在较高电位线和下电位线之间的电容元件,并且即使当输入/输出信号位的数量为 理论最小值,即1,使得由施加到输出焊盘的静电放电(ESD)引起的浪涌电流被注入到第一电容元件中以对其充电。 因此,通过由浪涌电流引起的电流,晶闸管整流电路被触发成晶闸管模式,这允许浪涌电流通过晶闸管整流电路流向下电位线,保护电路免受浪涌电流的影响。