专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US6125432A Image process apparatus having a storage device with a plurality of banks storing pixel data, and capable of precharging one bank while writing to another bank 失效
标题翻译：具有存储装置的图像处理装置具有存储像素数据的多个存储体，并且能够在写入另一个存储体时对一个存储体进行预充电
公开(公告)号：US6125432A
公开(公告)日：2000-09-26
申请号：US903348
申请日：1997-07-30
申请人： Atsuo Hanami , Shinichi Nakagawa , Tetsuya Matsumura , Hiroshi Segawa , Kazuya Ishihara , Satoshi Kumaki
发明人： Atsuo Hanami , Shinichi Nakagawa , Tetsuya Matsumura , Hiroshi Segawa , Kazuya Ishihara , Satoshi Kumaki
IPC分类号： G06F12/06 , G06F12/00 , G06T1/60 , G09G5/39 , G09G5/399 , G11C11/401 , G11C11/407 , H04N7/50 , G06F12/02
CPC分类号： G09G5/39 , H04N19/423 , H04N19/61 , G09G2340/02 , G09G2360/123 , G09G5/399
摘要： Screen data consists of two sets of field data. Each set of field data is divided into a plurality of data blocks which has four rows of pixel data corresponding to four rows of pixels vertically arranged. Every data block corresponding to one set of field data is stored in the first bank (bank0) of a frame buffer memory while that corresponding to the other set of field data is stored in the second bank (bank1). One row address is assigned to each data block. Bank1 is precharged while bank0 is in a write operation and vice versa in order to carry out the precharging operation and the write operation concurrently, so that the pixel data can be transferred at a high data transfer rate and each of two sets of field data can be transferred independently.
摘要翻译：屏幕数据由两组现场数据组成。每组场数据被分成多个数据块，其具有与垂直排列的四行像素对应的四行像素数据。对应于一组场数据的每个数据块被存储在帧缓冲存储器的第一存储体（存储体0）中，而与另一组场数据相对应的数据块存储在第二存储体（存储体1）中）。一行地址分配给每个数据块。 Bank1被预充电，而bank0处于写操作，反之亦然，以便同时执行预充电操作和写操作，使得可以以高数据传输速率传输像素数据，并且两组现场数据可以独立转让

2. 发明授权

US5651123A Program execution control device having addressability in accordance with M series pseudo-random number sequence 失效
标题翻译：具有符合M系列伪随机数序列的寻址能力的程序执行控制装置
公开(公告)号：US5651123A
公开(公告)日：1997-07-22
申请号：US460947
申请日：1995-06-05
申请人： Shinichi Nakagawa , Kazuya Ishihara , Satoshi Kumaki , Atsuo Hanami , Hiroshi Segawa , Tetsuya Matsumura
发明人： Shinichi Nakagawa , Kazuya Ishihara , Satoshi Kumaki , Atsuo Hanami , Hiroshi Segawa , Tetsuya Matsumura
IPC分类号： G06F9/32 , G06F9/38 , G06F9/30
CPC分类号： G06F9/3802 , G06F9/321 , G06F2207/7219
摘要： Instructions of a program are stored at addresses sequentially designated in accordance with an M series pseudo-random number sequence in an instruction memory in the order of program addresses. A pseudo-random number program counter has a feedback shift register for generating the same M series pseudo-random number sequence and applies an address of an instruction to be read from the instruction memory to the instruction memory based on a generated pseudo-random number, and a jump address and a select signal from an instruction decoder. As a result, instructions are read from the instruction memory and executed in the order of program addresses. The feedback shift register can be implemented as a small-scale circuit and operable at high speed.
摘要翻译：程序的指令按照程序地址的顺序存储在指令存储器中根据M系列伪随机数序列顺序指定的地址处。伪随机数程序计数器具有用于产生相同M系列伪随机数序列的反馈移位寄存器，并且基于生成的伪随机数将从指令存储器读出的指令的地址应用于指令存储器，以及来自指令解码器的跳转地址和选择信号。结果，从指令存储器中读取指令并按程序地址的顺序执行。反馈移位寄存器可以实现为小规模电路并且可以高速运行。

3. 发明授权

US6122317A Motion vector detector 失效
标题翻译：运动矢量检测器
公开(公告)号：US6122317A
公开(公告)日：2000-09-19
申请号：US975207
申请日：1997-11-20
申请人： Atsuo Hanami , Tetsuya Matsumura , Hiroshi Segawa , Kazuya Ishihara , Satoshi Kumaki , Yoshinori Matsuura
发明人： Atsuo Hanami , Tetsuya Matsumura , Hiroshi Segawa , Kazuya Ishihara , Satoshi Kumaki , Yoshinori Matsuura
IPC分类号： H04N19/50 , H03M7/30 , H04N19/436 , H04N19/46 , H04N19/463 , H04N19/503 , H04N19/51 , H04N19/517 , H04N19/57 , H04N19/70 , H04N7/12 , H04B1/66
CPC分类号： H04N19/105 , H04N19/112 , H04N19/137 , H04N19/51 , H04N19/517 , H04N19/56
摘要： An evaluation value operation part computes evaluation values of a template block and a search window block in accordance with respective ones of a plurality of predictive modes in parallel with each other, and a candidate vector determination part decides candidate vectors indicating optimum vectors in accordance with the computed evaluation values and on the basis of priority levels from a priority generation part. In accordance with these candidate vectors, an optimum vector decision part decides the optimum vectors for the respective predictive modes. Thus provided is an image coding system which can reduce the amount of codes of motion vectors with excellent picture quality.
摘要翻译：评估值操作部分根据多个预测模式中的各自相互并行地计算模板块和搜索窗口块的评估值，并且候选向量确定部分根据所述候选向量确定部分来确定表示最佳向量的候选向量计算的评估值，并根据优先级生成部分的优先级。根据这些候选向量，最佳矢量判定部分决定各个预测模式的最佳向量。这样提供了一种图像编码系统，其可以减少具有优良图像质量的运动矢量的编码量。

4. 发明授权

US06516031B1 Motion vector detecting device 失效
标题翻译：运动矢量检测装置
公开(公告)号：US06516031B1
公开(公告)日：2003-02-04
申请号：US09084504
申请日：1998-05-27
申请人： Kazuya Ishihara , Atsuo Hanami , Tetsuya Matsumura , Satoshi Kumaki , Hiroshi Segawa , Yoshinori Matsuura , Stefan Scotzniovsky
发明人： Kazuya Ishihara , Atsuo Hanami , Tetsuya Matsumura , Satoshi Kumaki , Hiroshi Segawa , Yoshinori Matsuura , Stefan Scotzniovsky
IPC分类号： H04N732
CPC分类号： H04N5/145 , G06T7/231 , G06T2200/28 , G06T2207/10016
摘要： Element processors (PE00 to PE33) included in a processor array (7) store pixel values of a search window, shifting them forward. Further, only hatched element processors (PE00, PE02, PE11, PE13, PE20, PE22, PE31, PE33) store pixel values of a template block, and compare them with the pixel values in the search to evaluate a similarity of pixel values. In other words, the pixel values of the template block are skipped and the pixel values which are left after skipping are compared. Therefore, it is possible to cut a hardware volume.
摘要翻译：包含在处理器阵列（7）中的元件处理器（PE00至PE33）存储搜索窗口的像素值，将它们向前移位。此外，只有阴影元素处理器（PE00，PE02，PE11，PE13，PE20，PE22，PE31，PE33）存储模板块的像素值，并将其与搜索中的像素值进行比较，以评估像素值的相似度。换句话说，跳过模板块的像素值，并比较跳过之后留下的像素值。因此，可以削减硬件容量。

5. 发明授权

US06674798B2 Motion vector detecting device capable of accommodating a plurality of predictive modes 失效
标题翻译：能够适应多种预测模式的运动矢量检测装置
公开(公告)号：US06674798B2
公开(公告)日：2004-01-06
申请号：US09961139
申请日：2001-09-24
申请人： Kazuya Ishihara , Shinichi Uramoto , Shinichi Nakagawa , Tetsuya Matsumura , Satoshi Kumaki , Atsuo Hanami
发明人： Kazuya Ishihara , Shinichi Uramoto , Shinichi Nakagawa , Tetsuya Matsumura , Satoshi Kumaki , Atsuo Hanami
IPC分类号： H04N736
CPC分类号： H04N5/145 , G06T7/223 , G06T7/231 , G06T2207/10016 , H04N19/433 , H04N19/51
摘要： A processor array includes element processors which are arranged in a matrix in correspondence to respective pixels of a template block, which is a current picture image pixel block. Each element processor stores pixel data of a search window block, which is a corresponding reference picture image pixel block, and obtains an evaluation function value component with respect to the template block pixel data. A summing part sorts the evaluation function components received from the respective element processors of the processor array in accordance with a plurality of predictive modes and sums up the components for the respective sorts, for forming evaluation function values for the respective predictive modes. A comparison part compares the evaluation function values received from the summing part for each predictive mode, to decide a displacement vector providing the best similarity as a motion vector for each predictive mode. It is possible to simultaneously detect motion vectors according to a plurality of predictive modes. It is possible to detect motion vectors employed for moving image predictive compensation in accordance with a plurality of predictive modes at a high speed with a small hardware volume.
摘要翻译：处理器阵列包括对应于作为当前图像像素块的模板块的各个像素的矩阵排列的元件处理器。每个元素处理器存储作为对应的参考图像像素块的搜索窗口块的像素数据，并获得关于模板块像素数据的评估函数值分量。求和部分根据多种预测模式对从处理器阵列的相应元件处理器接收的评估函数分量进行排序，并对各种类型的组件求和，以形成各个预测模式的评估函数值。比较部分比较从每个预测模式的求和部分接收的评估函数值，以确定提供最佳相似度的位移矢量作为每个预测模式的运动矢量。可以根据多种预测模式同时检测运动矢量。根据具有小硬件体积的高速的多种预测模式，可以检测用于运动图像预测补偿的运动矢量。

6. 发明授权

US6141451A Image coding method and apparatus 失效
标题翻译：图像编码方法及装置
公开(公告)号：US6141451A
公开(公告)日：2000-10-31
申请号：US982427
申请日：1997-12-02
申请人： Satoshi Kumaki , Tetsuya Matsumura , Hiroshi Segawa , Kazuya Ishihara , Yoshinori Matsuura , Atsuo Hanami
发明人： Satoshi Kumaki , Tetsuya Matsumura , Hiroshi Segawa , Kazuya Ishihara , Yoshinori Matsuura , Atsuo Hanami
IPC分类号： H04N19/50 , G06T9/00 , H03M7/36 , H04N19/42 , H04N19/423 , H04N19/46 , H04N19/503 , H04N19/51 , H04N19/61 , H04N19/625 , H04N19/70 , H04N19/80 , H04N19/87 , H04N19/91 , G06K9/36
CPC分类号： G06T9/004
摘要： Disclosed is an image coding method and apparatus for preventing a coding quantity of coding data from being increased when a redundancy between image planes is low. A selector outputs either an optimum motion vector output from a motion vector detecting device or a motion vector output from a motion vector storing section to a real time image coding device for performing coding on the basis of an evaluation value output from the motion vector detecting device. If it is decided, according to the evaluation value, that a redundancy between a reference image plane and a coding object image plane is low, the motion vector is selected so that the coding quantity of the coding data can be prevented from being increased.
摘要翻译：公开了一种图像编码方法和装置，用于在图像平面之间的冗余度低时防止编码数据的编码量增加。选择器输出从运动矢量检测装置输出的最佳运动矢量或从运动矢量存储部分输出的运动矢量到实时图像编码装置，用于根据从运动矢量检测装置输出的评估值进行编码。如果根据评估值确定参考图像平面和编码对象图像平面之间的冗余度低，则选择运动矢量，使得可以防止编码数据的编码量增加。

7. 发明授权

US06765965B1 Motion vector detecting apparatus 失效
标题翻译：运动矢量检测装置
公开(公告)号：US06765965B1
公开(公告)日：2004-07-20
申请号：US09425214
申请日：1999-10-22
申请人： Atsuo Hanami , Tetsuya Matsumura , Satoshi Kumaki , Kazuya Ishihara
发明人： Atsuo Hanami , Tetsuya Matsumura , Satoshi Kumaki , Kazuya Ishihara
IPC分类号： H04B166
CPC分类号： H04N19/159 , H04N5/145 , H04N19/523 , H04N19/57 , H04N19/577
摘要： A plurality of motion detecting units of which at least a template block size, i.e., the number of estimation pixels, or a search area size is different among the motion detecting units are used adaptively according to the characteristic of, or the prediction coding type of, a target picture. This enables efficient motion vector detection to be accomplished without increasing the amount of hardware or power consumption.
摘要翻译：根据运动检测单元的特性或预测编码类型，运动检测单元中的至少模板块大小（即，估计像素的数量）或搜索区域大小不同的多个运动检测单元，目标图片。这使得能够在不增加硬件或功耗的情况下实现有效的运动矢量检测。

8. 发明授权

US5949486A Unit for detecting motion vector for motion compensation 失效
标题翻译：用于检测运动补偿运动矢量的单元
公开(公告)号：US5949486A
公开(公告)日：1999-09-07
申请号：US795217
申请日：1997-02-05
申请人： Kazuya Ishihara , Shinichi Uramoto , Tetsuya Matsumura , Satoshi Kumaki , Atsuo Hanami , Shinichi Masuda
发明人： Kazuya Ishihara , Shinichi Uramoto , Tetsuya Matsumura , Satoshi Kumaki , Atsuo Hanami , Shinichi Masuda
IPC分类号： H04N19/50 , H03M7/30 , H03M7/36 , H04N5/14 , H04N19/423 , H04N19/436 , H04N19/51 , H04N7/12
CPC分类号： H04N19/433 , H04N19/51 , H04N5/145
摘要： Each of element processors arranged in correspondence to pixels of a template block and a search window block respectively includes an A register and a B register provided in parallel with each other for storing search window block pixel data respectively, and a T register for storing template block pixel data. Motion vector evaluation value calculation is performed through a first one of the A and B registers and the pixel data stored in the T register, while operated data is transferred to the second one of the A and B registers from the first one of the A and B registers in parallel with the calculation operation, for storing head search window block pixel data of a next search window. A motion vector is detected at a high speed in excellent coding efficiency.
摘要翻译：与模板块和搜索窗口块的像素相对应地布置的每个元素处理器分别包括彼此并行提供的用于存储搜索窗口块像素数据的A寄存器和B寄存器，以及用于存储模板块的T寄存器像素数据。通过A和B寄存器中的第一个和存储在T寄存器中的像素数据执行运动矢量评估值计算，而操作数据从A和B中的第一个传送到A和B寄存器中的第二个， B与计算操作并行登记，用于存储下一个搜索窗口的头部搜索窗口块像素数据。以良好的编码效率高速检测运动矢量。

9. 发明授权

US06918002B2 Data processor and data processing method reduced in power consumption during memory access 失效
标题翻译：数据处理器和数据处理方法降低了存储器访问期间的功耗
公开(公告)号：US06918002B2
公开(公告)日：2005-07-12
申请号：US10053545
申请日：2002-01-24
申请人： Satoshi Kumaki , Tetsuya Matsumura , Hiroshi Segawa , Atsuo Hanami , Vasile Mosneaga
发明人： Satoshi Kumaki , Tetsuya Matsumura , Hiroshi Segawa , Atsuo Hanami , Vasile Mosneaga
IPC分类号： G06F1/26 , G06F1/32 , G06F12/00 , G06F12/04 , G06F13/42
CPC分类号： G06F13/4239 , G11C7/1006 , G11C11/419 , Y02D10/14 , Y02D10/151
摘要： When the CPU writes data into a memory, a 0 detection circuit detects the number of bits having the value 0 from the data. When the number of bits with 0 is equal to or larger than the number of bits with 1, the data output from the CPU is provided to the memory under control of a selector. When the number of bits with 0 is fewer than the number of bits with 1, the data output from the CPU is inverted and provided to the memory under control of the selector. Accordingly, the rewriting frequency of each memory cell from 0 to 1 or from 1 to 0 in the memory can be reduced in average. Thus the power consumption of the memory in a data writing mode can be reduced.
摘要翻译：当CPU将数据写入存储器时，0检测电路从数据中检测出具有值0的位数。当具有0的比特数等于或大于具有1的比特数时，在选择器的控制下，从CPU输出的数据被提供给存储器。当具有0的比特数少于具有1的比特数时，从CPU输出的数据被反转，并在选择器的控制下提供给存储器。因此，可以平均地减少存储器中的每个存储单元从0到1或从1到0的重写频率。因此，可以减少数据写入模式中的存储器的功耗。

10. 发明授权

US5740088A Control signal generating device generating various control signals using storage unit having small storage capacity 失效
标题翻译：控制信号发生装置利用具有小存储容量的存储单元产生各种控制信号
公开(公告)号：US5740088A
公开(公告)日：1998-04-14
申请号：US530497
申请日：1995-09-19
申请人： Shinichi Nakagawa , Kiyofumi Kawamoto , Kazuya Ishihara , Satoshi Kumaki , Atsuo Hanami
发明人： Shinichi Nakagawa , Kiyofumi Kawamoto , Kazuya Ishihara , Satoshi Kumaki , Atsuo Hanami
IPC分类号： H03K3/84 , G05B19/07 , G06F7/00 , G06F7/58 , H04L7/00 , G06F1/02
CPC分类号： G05B19/07 , G06F7/00
摘要： A first pseudo random number generating circuit sequentially provides an output signal to a matching detecting circuit in response to a clock signal. A second pseudo random number generating circuit generates an initial value, and then, sequentially provides an output signal to a storage device in response to an output signal from the matching detecting circuit and the clock signal. Data with the output signal as an address is provided as an output signal from the storage device. When the matching detecting circuit detects matching between the output signals, the matching detecting circuit provides the output signals to the second pseudo random number generating circuit and an AND logic circuit. As described above, when the output signal of the matching detecting circuit is provided, the output signals from the storage device are provided as respective output control signals.
摘要翻译：第一伪随机数产生电路响应于时钟信号顺序地向匹配检测电路提供输出信号。第二伪随机数发生电路产生初始值，然后响应于来自匹配检测电路的输出信号和时钟信号，向存储装置依次提供输出信号。以输出信号作为地址的数据作为来自存储装置的输出信号提供。当匹配检测电路检测输出信号之间的匹配时，匹配检测电路将输出信号提供给第二伪随机数产生电路和与逻辑电路。如上所述，当提供匹配检测电路的输出信号时，来自存储装置的输出信号被提供为相应的输出控制信号。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式