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1. 发明申请

US20080122007A1 Semiconductor device and fabrication process thereof 审中-公开
标题翻译：半导体器件及其制造工艺
公开(公告)号：US20080122007A1
公开(公告)日：2008-05-29
申请号：US11812516
申请日：2007-06-19
申请人： Shinichi Kawai , Takashi Saiki , Naoyoshi Tamura
发明人： Shinichi Kawai , Takashi Saiki , Naoyoshi Tamura
IPC分类号： H01L27/092
CPC分类号： H01L29/4925 , H01L21/28044 , H01L21/823814 , H01L21/823842 , H01L29/665 , H01L29/6653 , H01L29/66545 , H01L29/6659 , H01L29/66628 , H01L29/7833 , H01L29/7834
摘要： A semiconductor device includes a first polycrystalline semiconductor gate electrode structure formed in a first device region of a substrate via a gate insulation film and having a stacked structure in which a lower polycrystalline semiconductor layer and an upper polycrystalline semiconductor layer are stacked consecutively, the first polycrystalline gate electrode structure being doped to the second conductivity type, a second polycrystalline semiconductor gate electrode structure formed in a second device region of the substrate via a gate insulation film and having a stacked structure in which a lower polycrystalline semiconductor layer and an upper polycrystalline semiconductor layer are stacked consecutively, the second polycrystalline gate electrode structure being doped to the first conductivity type, a pair of diffusion regions of the second conductivity type formed in the first device region at respective lateral sides of the first polycrystalline semiconductor gate electrode structure, and a pair of diffusion regions of the first conductivity type formed in the second device region at respective lateral sides of the second polycrystalline semiconductor gate electrode structure, wherein, in each of the first and second polycrystalline semiconductor gate electrode structures, the lower polycrystalline semiconductor layer comprises semiconductor crystal grains of a grain diameter smaller than semiconductor crystal grains constituting the upper polycrystalline semiconductor layer, in each of the first and second polycrystalline semiconductor gate electrode structures, the lower polycrystalline semiconductor layer has a dopant concentration level equal to or higher than a dopant concentration level of the upper polycrystalline semiconductor layer.
摘要翻译：一种半导体器件包括：第一多晶半导体栅极电极结构，其经由栅极绝缘膜形成在基板的第一器件区域中，并具有其中下部多晶半导体层和上部多晶半导体层连续堆叠的堆叠结构，第一多晶栅极电极结构被掺杂到第二导电类型，第二多晶半导体栅极电极结构通过栅极绝缘膜形成在衬底的第二器件区域中并且具有堆叠结构，其中下部多晶半导体层和上部多晶半导体层被连续地堆叠，所述第二多晶栅极电极结构被掺杂到所述第一导电类型，所述第二导电类型的一对扩散区形成在所述第一多晶半导体栅极电极的各个侧面的所述第一器件区域中 e结构，以及在所述第二多晶半导体栅电极结构的各个侧面处形成在所述第二器件区域中的所述第一导电类型的一对扩散区域，其中，在所述第一和第二多晶半导体栅电极结构中的每一个中，多晶半导体层包括晶粒直径小于构成上多晶半导体层的半导体晶粒的半导体晶粒，在第一和第二多晶半导体栅电极结构中，下多晶半导体层的掺杂浓度水平等于或等于比上多晶半导体层的掺杂剂浓度水平高。

2. 发明授权

US06977748B2 Image communication apparatus and data storage method 失效
标题翻译：图像通信装置和数据存储方法
公开(公告)号：US06977748B2
公开(公告)日：2005-12-20
申请号：US09814707
申请日：2001-03-23
申请人： Shinichi Kawai
发明人： Shinichi Kawai
IPC分类号： H04N1/00 , H04N1/21 , H04N1/32 , G06F15/00
CPC分类号： H04N1/00973 , H04N1/32358 , H04N1/32379 , H04N2201/001 , H04N2201/0086 , H04N2201/0087 , H04N2201/3298
摘要： The image communication apparatus of the present invention compares the capacity of data received from a communication line with the capacity of existing memory of the image communication apparatus and determines the presence or absence of any expanded memory in the image communication apparatus when the capacity of the received data exceeds the capacity of the existing memory. Then, when the expanded memory is present, the image communication apparatus compares the capacity of the expanded memory with the capacity of the received data and stores the received data in the expanded memory when the capacity of the expanded memory exceeds the capacity of the received data.
摘要翻译：本发明的图像通信装置将从通信线路接收到的数据的容量与图像通信装置的现有存储器的容量进行比较，并且当接收到的容量的容量确定图像通信装置中是否存在扩展的存储器数据超过了现有内存的容量。然后，当扩展存储器存在时，图像通信装置将扩展存储器的容量与接收数据的容量进行比较，并且当扩展存储器的容量超过接收数据的容量时，将接收到的数据存储在扩展存储器中。

3. 发明授权

US6049100A Solid state image sensor unit with wide dynamic range and high resolution 失效
标题翻译：固态图像传感器单元，动态范围宽，分辨率高
公开(公告)号：US6049100A
公开(公告)日：2000-04-11
申请号：US994896
申请日：1997-12-19
申请人： Shinichi Kawai , Yasutaka Nakashiba
发明人： Shinichi Kawai , Yasutaka Nakashiba
IPC分类号： H01L27/14 , H01L27/148 , H04N5/335 , H04N5/341 , H04N5/369 , H04N5/3728 , H01L29/768 , H01L31/0232
CPC分类号： H01L27/14812
摘要： In a solid state image sensor unit which includes a substrate having a substrate surface and a plurality of first semiconductor regions formed on the substrate surface along a predetermined direction of the substrate surface with said first semiconductor regions substantially isolated electrically from each other. The solid state image sensor unit comprises a connection member formed on the substrate surface for supplying a reference potential to the first semiconductor regions in common.
摘要翻译：在固态图像传感器单元中，其包括具有衬底表面的衬底和沿着衬底表面的预定方向形成在衬底表面上的多个第一半导体区域，所述第一半导体区域彼此基本上隔离。固态图像传感器单元包括形成在基板表面上用于向第一半导体区域共同提供参考电位的连接构件。

4. 发明授权

US5369050A Method of fabricating semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US5369050A
公开(公告)日：1994-11-29
申请号：US889953
申请日：1992-05-29
申请人： Shinichi Kawai
发明人： Shinichi Kawai
IPC分类号： H01L21/302 , H01L21/02 , H01L21/306 , H01L21/3065 , H01L21/336 , H01L21/762 , H01L23/544 , H01L27/12 , H01L21/76
CPC分类号： H01L29/66772 , H01L21/76251 , H01L21/76264 , H01L23/544 , H01L21/76267 , H01L21/76275 , H01L21/76281 , H01L21/76283 , H01L2223/5442 , H01L2223/54426 , H01L2223/54453 , H01L2924/0002
摘要： A method of fabricating a semiconductor device includes the steps of forming a semiconductor layer having a convex device area and a convex alignment mark on an insulating layer. The insulating layer around the alignment mark is etched using the alignment mark as a mask to thereby form a groove around the alignment mark. A mask pattern is aligned with the device using the alignment mark surrounded by the groove as a reference point. Consequently the alignment mark can be detected using the step contour provided by the groove. This makes alignment using the so-called direct alignment technique possible, and alignment precision is improved.
摘要翻译：制造半导体器件的方法包括以下步骤：在绝缘层上形成具有凸形器件区域和凸形对准标记的半导体层。使用对准标记作为掩模蚀刻对准标记周围的绝缘层，从而在对准标记周围形成槽。使用由凹槽围绕的对准标记作为参考点将掩模图案与设备对准。因此，可以使用由凹槽提供的阶梯轮廓来检测对准标记。这使得可以使用所谓的直接对准技术进行对准，并且提高对准精度。

5. 发明授权

US5296727A Double gate FET and process for manufacturing same 失效
标题翻译：双栅极FET及其制造方法
公开(公告)号：US5296727A
公开(公告)日：1994-03-22
申请号：US57016
申请日：1993-05-05
申请人： Shinichi Kawai , Tetsuo Izawa
发明人： Shinichi Kawai , Tetsuo Izawa
IPC分类号： H01L21/336 , H01L29/06 , H01L29/10 , H01L29/78 , H01L29/786 , H01L21/265
CPC分类号： H01L29/66484 , H01L29/0657 , H01L29/1083 , H01L29/7832 , H01L29/78606 , H01L29/78645 , H01L29/78648
摘要： A high speed and highly functional MOSFET having a thin channel formed in a single crystalline layer is controlled by voltages applied to both an upper gate electrode and a buried gate layer that sandwich the channel therebetween.
摘要翻译：具有形成在单晶层中的薄沟道的高速和高功能的MOSFET由施加到夹在其间的沟道的上栅极电极和掩埋栅极层的电压控制。

6. 发明申请

US20060138551A1 Semiconductor device, manufacturing method thereof, and CMOS integrated circuit device 有权
标题翻译：半导体装置及其制造方法以及CMOS集成电路装置
公开(公告)号：US20060138551A1
公开(公告)日：2006-06-29
申请号：US11345238
申请日：2006-02-02
申请人： Taketo Watanabe , Toshio Nomura , Shinichi Kawai , Takayuki Kawamata , Shigeo Satoh
发明人： Taketo Watanabe , Toshio Nomura , Shinichi Kawai , Takayuki Kawamata , Shigeo Satoh
IPC分类号： H01L29/94
CPC分类号： H01L29/66537 , H01L21/823807 , H01L29/1041 , H01L29/1045 , H01L29/1083 , H01L29/66545 , H01L29/66553 , H01L29/6659 , H01L29/7827 , H01L29/7833
摘要： A semiconductor device includes a semiconductor substrate. A gate electrode is formed on the semiconductor substrate via a gate insulating film. A source region and a drain region of a first conductivity type are formed on the first side and the second side of the gate electrode, respectively, in the semiconductor substrate. A punch-through stopper region of a second conductivity type is formed in the semiconductor substrate such that the second conductivity type punch-through stopper region is located between the source region and the drain region at distances from the source region and the drain region and extends in the direction perpendicular to the principal surface of the semiconductor substrate. The concentration of an impurity element of the second conductivity type in the punch-through stopper region is set to be at least five times the substrate impurity concentration between the source region and the drain region.
摘要翻译：半导体器件包括半导体衬底。栅电极通过栅极绝缘膜形成在半导体衬底上。在半导体衬底中分别在栅电极的第一侧和第二侧上形成第一导电类型的源极区和漏极区。在半导体衬底中形成第二导电类型的穿通止挡区域，使得第二导电类型穿通阻止区域位于距源极区域和漏极区域的距离处的源极区域和漏极区域之间，并且延伸在垂直于半导体衬底的主表面的方向上。穿通阻止区域中的第二导电类型的杂质元素的浓度被设定为源极区域和漏极区域之间的衬底杂质浓度的至少五倍。

7. 发明授权

US07034366B2 Semiconductor device, manufacturing method thereof, and CMOS integrated circuit device 有权
公开(公告)号：US07034366B2
公开(公告)日：2006-04-25
申请号：US10633538
申请日：2003-08-05
申请人： Taketo Watanabe , Toshio Nomura , Shinichi Kawai , Takayuki Kawamata , Shigeo Satoh
发明人： Taketo Watanabe , Toshio Nomura , Shinichi Kawai , Takayuki Kawamata , Shigeo Satoh
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/66537 , H01L21/823807 , H01L29/1041 , H01L29/1045 , H01L29/1083 , H01L29/66545 , H01L29/66553 , H01L29/6659 , H01L29/7827 , H01L29/7833
摘要： A semiconductor device includes a semiconductor substrate. A gate electrode is formed on the semiconductor substrate via a gate insulating film. A source region and a drain region of a first conductivity type are formed on the first side and the second side of the gate electrode, respectively, in the semiconductor substrate. A punch-through stopper region of a second conductivity type is formed in the semiconductor substrate such that the second conductivity type punch-through stopper region is located between the source region and the drain region at distances from the source region and the drain region and extends in the direction perpendicular to the principal surface of the semiconductor substrate. The concentration of an impurity element of the second conductivity type in the punch-through stopper region is set to be at least five times the substrate impurity concentration between the source region and the drain region.

8. 发明授权

US06525165B1 Trimethylene-2, 6-naphthalene dicarboxylate (co)polymer film, quaternary phosphonium sulfonate copolymer and compositions thereof 有权
标题翻译：三亚甲基-2,6-萘二甲酸酯（共）聚合物膜，季鏻磺酸盐共聚物及其组合物
公开(公告)号：US06525165B1
公开(公告)日：2003-02-25
申请号：US09720991
申请日：2001-01-03
申请人： Ryoji Tsukamoto , Takafumi Kudo , Masahiko Kosuge , Tomokatsu Ura , Hideshi Kurihara , Shinichi Kawai , Shinya Watanabe , Koji Furuya , Makoto Handa , Kenji Suzuki
发明人： Ryoji Tsukamoto , Takafumi Kudo , Masahiko Kosuge , Tomokatsu Ura , Hideshi Kurihara , Shinichi Kawai , Shinya Watanabe , Koji Furuya , Makoto Handa , Kenji Suzuki
IPC分类号： C08G6300
CPC分类号： B32B27/36 , B32B27/08 , B32B2307/412 , B32B2307/518 , B32B2307/54 , B32B2307/5825 , B32B2307/7145 , B32B2307/72 , B32B2307/7242 , B32B2367/00 , B32B2439/70 , C08G63/189 , C08G63/6926 , C08G63/85 , C08J5/18 , C08J2367/02
摘要： An aromatic polyester film, which comprises an aromatic polyester comprising 2,6-naphthalenedicarboxylic acid as the main dicarboxylic acid component and 1,3-propanediol as the main diol component and having a density of at least 1.310 g/cm3. A laminated film comprising another polyester layer can be formed from this aromatic polyester film. An aromatic polyester containing a small amount of a sulfonic acid phosphonium salt used as one of the aromatic polyesters forming this laminated film is excellent in electrostatic casting properties and resistance to the contamination of an electrostatic wire, and an aromatic polyester containing an inorganic anti-fungus agent is used for antifungal application.
摘要翻译：一种芳族聚酯膜，其包含以2,6-萘二甲酸为主要二羧酸组分的芳族聚酯和1,3-丙二醇作为主要二醇组分，其密度至少为1.310g / cm3。可以由该芳族聚酯膜形成包含另一聚酯层的层叠膜。作为形成该层叠膜的芳香族聚酯之一，含有少量磺酸鏻盐的芳香族聚酯具有优异的静电铸造性和抗静电丝的污染性，以及含有无机抗真菌的芳香族聚酯试剂用于抗真菌应用。

9. 发明授权

US06355345B1 Laminate film for preventing glass from shattering 失效
标题翻译：防止玻璃破碎的层压膜
公开(公告)号：US06355345B1
公开(公告)日：2002-03-12
申请号：US09581133
申请日：2000-06-09
申请人： Koji Furuya , Shinya Watanabe , Shinichi Kawai , Kenji Suzuki
发明人： Koji Furuya , Shinya Watanabe , Shinichi Kawai , Kenji Suzuki
IPC分类号： B32B1504
CPC分类号： C03C17/324 , B32B17/10018 , B32B17/1033 , B32B17/10779 , C03C17/42 , C03C2217/445 , C03C2217/475 , Y10T428/28
摘要： A laminate film for preventing glass from shattering, which comprises: (A) a biaxially oriented polyester film of a copolyester containing ethylene-2,6-naphthalenedicarboxylate recurring units in an amount of at least 80 mol % of all recurring units, (B) an adhesive coating film on at least one side of the above biaxially oriented polyester film, (C) a hard coat layer on the above adhesive coating film, and (D) an antireflection layer on the above hard coat layer. This laminate film has not only excellent adhesive properties, surface hardness and abrasion resistance but also sufficient transparency, antireflection property and glass shatterproof performance.
摘要翻译：一种防止玻璃破碎的层压膜，其包括：（A）含有至少80摩尔％全部重复单元的乙烯-2,6-萘二羧酸酯重复单元的共聚酯的双轴取向聚酯膜，（B）在上述双轴取向聚酯膜的至少一面上的粘合剂涂膜，（C）上述粘合剂涂膜上的硬涂层，（D）上述硬涂层上的防反射层。该层压膜没有仅具有优异的粘合性能，表面硬度和耐磨性，而且具有足够的透明度，抗反射性和玻璃破碎性能。

10. 发明授权

US4813529A Conveyor system for use in automobile assembly line 失效
标题翻译：用于汽车装配线的输送系统
公开(公告)号：US4813529A
公开(公告)日：1989-03-21
申请号：US648222
申请日：1984-09-07
申请人： Shinichi Kawai , Eiji Fukazawa , Hiroshi Miyashita , Yoshio Shiiba
发明人： Shinichi Kawai , Eiji Fukazawa , Hiroshi Miyashita , Yoshio Shiiba
IPC分类号： B62D65/18 , B65G25/00
CPC分类号： B62D65/18 , Y10T29/53548
摘要： A conveyor system for use in an automobile assembly line having a body-carrying tact conveyor arranged in an endless form past an engine mounting position, and switchable between a running mode and a stopping mode, a body-carrying continuous conveyor arranged in an endless form and having an inlet section and an outlet section which are arranged on the extensions of the inlet section and the outlet section of the tact engine mounting position, a pair of feeders for delivery an automobile body between the inlet sections of both conveyors and between the outlet sections of both conveyors, and engine transferring conveyor arranged in an endless form past a delivery position near the engine position and stoppable at the body delivery position, and an engine shifting conveyor having an engine shifting jig and extending between the body delivery position and the engine mounting position and being reciprocable at a comparatively high speed.
摘要翻译：一种用于汽车装配线的输送机系统，其具有经由发动机安装位置以无端方式布置的身体运送式输送机，并且可在行驶模式和停止模式之间切换，携带式连续输送机以无限方式布置并具有一个入口部分和一个出口部分，它们设置在触发发动机安装位置的入口部分和出口部分的延伸部分上，一对进给器，用于将两个输送机的入口部分之间以及出口两个输送机和发动机传送输送机的部分以循环的形式布置，经过发动机位置附近的输送位置，并可在主体输送位置处停止;以及发动机换档输送机，其具有发动机转换夹具并且在主体输送位置和发动机之间延伸安装位置并以相对较高的速度往复运动。

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