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1. 发明授权

US08026744B2 Clock signal switching device, clock signal switching method, data bus switching device, and data bus switching method 有权
标题翻译：时钟信号切换装置，时钟信号切换方式，数据总线切换装置和数据总线切换方式
公开(公告)号：US08026744B2
公开(公告)日：2011-09-27
申请号：US12861411
申请日：2010-08-23
申请人： Shinichi Hashimoto , Tadahiro Yoshida , Ryogo Yanagisawa
发明人： Shinichi Hashimoto , Tadahiro Yoshida , Ryogo Yanagisawa
IPC分类号： H03K17/00
CPC分类号： H03K5/135 , G06F1/08
摘要： A clock signal switching device includes: a plurality of signal synchronization generation means for generating mask signals and synchronized switching signals; a plurality of clock signal mask means for generating masked clock signals; a synchronized switching signal selection means for selecting one from among the synchronized switching signals; and a masked clock signal selection means for selecting one from among the masked clock signals.
摘要翻译：时钟信号切换装置包括：多个信号同步产生装置，用于产生屏蔽信号和同步切换信号; 用于产生屏蔽时钟信号的多个时钟信号屏蔽装置; 同步切换信号选择装置，用于从同步切换信号中选择一个; 以及屏蔽时钟信号选择装置，用于从屏蔽的时钟信号中选择一个。

2. 发明申请

US20050012530A1 Clock signal switching device, clock signal switching method, data bus switching device, and data bus switching method 有权
标题翻译：时钟信号切换装置，时钟信号切换方式，数据总线切换装置和数据总线切换方式
公开(公告)号：US20050012530A1
公开(公告)日：2005-01-20
申请号：US10890154
申请日：2004-07-14
申请人： Shinichi Hashimoto , Tadahiro Yoshida , Ryogo Yanagisawa
发明人： Shinichi Hashimoto , Tadahiro Yoshida , Ryogo Yanagisawa
IPC分类号： G06F1/08 , H03K5/135 , H03K3/00
CPC分类号： H03K5/135 , G06F1/08
摘要： A clock signal switching device includes: a plurality of signal synchronization generation means for generating mask signals and synchronized switching signals; a plurality of clock signal mask means for generating masked clock signals; a synchronized switching signal selection means for selecting one from among the synchronized switching signals; and a masked clock signal selection means for selecting one from among the masked clock signals.
摘要翻译：时钟信号切换装置包括：多个信号同步产生装置，用于产生屏蔽信号和同步切换信号; 用于产生屏蔽时钟信号的多个时钟信号屏蔽装置; 同步切换信号选择装置，用于从同步切换信号中选择一个; 以及屏蔽时钟信号选择装置，用于从屏蔽的时钟信号中选择一个。

3. 发明授权

US07423459B2 Clock signal switching device, clock signal switching method, data bus switching device, and data bus switching method 有权
标题翻译：时钟信号切换装置，时钟信号切换方式，数据总线切换装置和数据总线切换方式
公开(公告)号：US07423459B2
公开(公告)日：2008-09-09
申请号：US11598020
申请日：2006-11-13
申请人： Shinichi Hashimoto , Tadahiro Yoshida , Ryogo Yanagisawa
发明人： Shinichi Hashimoto , Tadahiro Yoshida , Ryogo Yanagisawa
IPC分类号： H03K17/00
CPC分类号： H03K5/135 , G06F1/08
摘要： A clock signal switching device includes: a plurality of signal synchronization generation means for generating mask signals and synchronized switching signals; a plurality of clock signal mask means for generating masked clock signals; a synchronized switching signal selection means for selecting one from among the synchronized switching signals; and a masked clock signal selection means for selecting one from among the masked clock signals.
摘要翻译：时钟信号切换装置包括：多个信号同步产生装置，用于产生屏蔽信号和同步切换信号; 用于产生屏蔽时钟信号的多个时钟信号屏蔽装置; 同步切换信号选择装置，用于从同步切换信号中选择一个; 以及屏蔽时钟信号选择装置，用于从屏蔽的时钟信号中选择一个。

4. 发明申请

US20070061927A1 Clock signal switching device, clock signal switching method, data bus switching device, and data bus switching method 有权
标题翻译：时钟信号切换装置，时钟信号切换方式，数据总线切换装置和数据总线切换方式
公开(公告)号：US20070061927A1
公开(公告)日：2007-03-15
申请号：US11598020
申请日：2006-11-13
申请人： Shinichi Hashimoto , Tadahiro Yoshida , Ryogo Yanagisawa
发明人： Shinichi Hashimoto , Tadahiro Yoshida , Ryogo Yanagisawa
IPC分类号： G01R21/02
CPC分类号： H03K5/135 , G06F1/08
摘要： A clock signal switching device includes: a plurality of signal synchronization generation means for generating mask signals and synchronized switching signals; a plurality of clock signal mask means for generating masked clock signals; a synchronized switching signal selection means for selecting one from among the synchronized switching signals; and a masked clock signal selection means for selecting one from among the masked clock signals.
摘要翻译：时钟信号切换装置包括：多个信号同步产生装置，用于产生屏蔽信号和同步切换信号; 用于产生屏蔽时钟信号的多个时钟信号屏蔽装置; 同步切换信号选择装置，用于从同步切换信号中选择一个; 以及屏蔽时钟信号选择装置，用于从屏蔽的时钟信号中选择一个。

5. 发明申请

US20100315129A1 CLOCK SIGNAL SWITCHING DEVICE, CLOCK SIGNAL SWITCHING METHOD, DATA BUS SWITCHING DEVICE, AND DATA BUS SWITCHING METHOD 有权
标题翻译：时钟信号切换装置，时钟信号切换方法，数据总线切换装置和数据总线切换方法
公开(公告)号：US20100315129A1
公开(公告)日：2010-12-16
申请号：US12861411
申请日：2010-08-23
申请人： Shinichi Hashimoto , Tadahiro Yoshida , Ryogo Yanagisawa
发明人： Shinichi Hashimoto , Tadahiro Yoshida , Ryogo Yanagisawa
IPC分类号： H03K17/00
CPC分类号： H03K5/135 , G06F1/08
摘要： A clock signal switching device includes: a plurality of signal synchronization generation means for generating mask signals and synchronized switching signals; a plurality of clock signal mask means for generating masked clock signals; a synchronized switching signal selection means for selecting one from among the synchronized switching signals; and a masked clock signal selection means for selecting one from among the masked clock signals.
摘要翻译：时钟信号切换装置包括：多个信号同步产生装置，用于产生屏蔽信号和同步切换信号; 用于产生屏蔽时钟信号的多个时钟信号屏蔽装置; 同步切换信号选择装置，用于从同步切换信号中选择一个; 以及屏蔽时钟信号选择装置，用于从屏蔽的时钟信号中选择一个。

6. 发明授权

US07816952B2 Clock signal switching device, clock signal switching method, data bus switching device, and data bus switching method 有权
标题翻译：时钟信号切换装置，时钟信号切换方式，数据总线切换装置和数据总线切换方式
公开(公告)号：US07816952B2
公开(公告)日：2010-10-19
申请号：US12184949
申请日：2008-08-01
申请人： Shinichi Hashimoto , Tadahiro Yoshida , Ryogo Yanagisawa
发明人： Shinichi Hashimoto , Tadahiro Yoshida , Ryogo Yanagisawa
IPC分类号： H03K17/00
CPC分类号： H03K5/135 , G06F1/08
摘要： A clock signal switching device includes: a plurality of signal synchronization generation means for generating mask signals and synchronized switching signals; a plurality of clock signal mask means for generating masked clock signals; a synchronized switching signal selection means for selecting one from among the synchronized switching signals; and a masked clock signal selection means for selecting one from among the masked clock signals.
摘要翻译：时钟信号切换装置包括：多个信号同步产生装置，用于产生屏蔽信号和同步切换信号; 用于产生屏蔽时钟信号的多个时钟信号屏蔽装置; 同步切换信号选择装置，用于从同步切换信号中选择一个; 以及屏蔽时钟信号选择装置，用于从屏蔽的时钟信号中选择一个。

7. 发明申请

US20080290913A1 CLOCK SIGNAL SWITCHING DEVICE, CLOCK SIGNAL SWITCHING METHOD, DATA BUS SWITCHING DEVICE, AND DATA BUS SWITCHING METHOD 有权
标题翻译：时钟信号切换装置，时钟信号切换方法，数据总线切换装置和数据总线切换方法
公开(公告)号：US20080290913A1
公开(公告)日：2008-11-27
申请号：US12184949
申请日：2008-08-01
申请人： Shinichi HASHIMOTO , Tadahiro Yoshida , Ryogo Yanagisawa
发明人： Shinichi HASHIMOTO , Tadahiro Yoshida , Ryogo Yanagisawa
IPC分类号： H03L7/00
CPC分类号： H03K5/135 , G06F1/08
摘要： A clock signal switching device includes: a plurality of signal synchronization generation means for generating mask signals and synchronized switching signals; a plurality of clock signal mask means for generating masked clock signals; a synchronized switching signal selection means for selecting one from among the synchronized switching signals; and a masked clock signal selection means for selecting one from among the masked clock signals.
摘要翻译：时钟信号切换装置包括：多个信号同步产生装置，用于产生屏蔽信号和同步切换信号; 用于产生屏蔽时钟信号的多个时钟信号屏蔽装置; 同步切换信号选择装置，用于从同步切换信号中选择一个; 以及屏蔽时钟信号选择装置，用于从屏蔽的时钟信号中选择一个。

8. 发明授权

US07145368B2 Clock signal switching device, clock signal switching method, data bus switching device, and data bus switching method 有权
标题翻译：时钟信号切换装置，时钟信号切换方式，数据总线切换装置和数据总线切换方式
公开(公告)号：US07145368B2
公开(公告)日：2006-12-05
申请号：US10890154
申请日：2004-07-14
申请人： Shinichi Hashimoto , Tadahiro Yoshida , Ryogo Yanagisawa
发明人： Shinichi Hashimoto , Tadahiro Yoshida , Ryogo Yanagisawa
IPC分类号： H03K17/00
CPC分类号： H03K5/135 , G06F1/08
摘要： A clock signal switching device includes: a plurality of signal synchronization generation means for generating mask signals and synchronized switching signals; a plurality of clock signal mask means for generating masked clock signals; a synchronized switching signal selection means for selecting one from among the synchronized switching signals; and a masked clock signal selection means for selecting one from among the masked clock signals.
摘要翻译：时钟信号切换装置包括：多个信号同步产生装置，用于产生屏蔽信号和同步切换信号; 用于产生屏蔽时钟信号的多个时钟信号屏蔽装置; 同步切换信号选择装置，用于从同步切换信号中选择一个; 以及屏蔽时钟信号选择装置，用于从屏蔽的时钟信号中选择一个。

9. 发明授权

US07321403B2 Video signal transmitting/receiving system 有权
标题翻译：视频信号发射/接收系统
公开(公告)号：US07321403B2
公开(公告)日：2008-01-22
申请号：US11020046
申请日：2004-12-23
申请人： Ryogo Yanagisawa , Tadahiro Yoshida , Satoshi Takahashi
发明人： Ryogo Yanagisawa , Tadahiro Yoshida , Satoshi Takahashi
IPC分类号： H04N5/38 , H04N5/04
CPC分类号： H04N5/073 , H04N11/04 , H04N11/20
摘要： In a transmitting section for a video signal transmitting/receiving system for transmitting digital video signals using a plurality of transmission channels, video guard band signals are inserted into video signals associated with the transmission channels immediately before transition from a blanking region to an effective video region. In a receiving section for the system, the inserted video guard band signals are detected for the respective transmission channels. A skew among the transmission channels is detected based on the detection result. To synchronize the video guard band signals among all the transmission channels, with reference to one of the video signals associated with a transmission channel with the longest delay (i.e., delayed by one clock cycle 1T), a delay of 1T is given to the other video signals. As a result, even if a skew occurs among the transmission channels, correct pixel data is displayed.
摘要翻译：在用于使用多个发送信道发送数字视频信号的视频信号发送/接收系统的发送部分中，在从消隐区域到有效视频区域的转换之前，将视频保护带信号插入到与传输信道相关联的视频信号中。在系统的接收部分中，针对各个传输信道检测插入的视频保护频带信号。基于检测结果检测传输信道之间的偏移。为了使所有传输信道中的视频保护频带信号同步，参考与具有最长延迟（即，延迟一个时钟周期1T）的传输信道相关联的视频信号之一，将1T的延迟给予其他视频信号。结果，即使在发送信道之间发生偏斜，也显示正确的像素数据。

10. 发明申请

US20050104876A1 Video signal transmitting/receiving system 有权
标题翻译：视频信号发射/接收系统
公开(公告)号：US20050104876A1
公开(公告)日：2005-05-19
申请号：US11020046
申请日：2004-12-23
申请人： Ryogo Yanagisawa , Tadahiro Yoshida , Satoshi Takahashi
发明人： Ryogo Yanagisawa , Tadahiro Yoshida , Satoshi Takahashi
IPC分类号： H04N5/04 , G09G5/00 , H04J3/00 , H04N5/073 , H04N11/04 , H04N11/20
CPC分类号： H04N5/073 , H04N11/04 , H04N11/20
摘要： In a transmitting section for a video signal transmitting/receiving system for transmitting digital video signals using a plurality of transmission channels, video guard band signals are inserted into video signals associated with the transmission channels immediately before transition from a blanking region to an effective video region. In a receiving section for the system, the inserted video guard band signals are detected for the respective transmission channels. A skew among the transmission channels is detected based on the detection result. To synchronize the video guard band signals among all the transmission channels, with reference to one of the video signals associated with a transmission channel with the longest delay (i.e., delayed by one clock cycle 1T), a delay of 1T is given to the other video signals. As a result, even if a skew occurs among the transmission channels, correct pixel data is displayed.
摘要翻译：在用于使用多个发送信道发送数字视频信号的视频信号发送/接收系统的发送部分中，在从消隐区域到有效视频区域的转换之前，将视频保护带信号插入到与传输信道相关联的视频信号中。在系统的接收部分中，针对各个传输信道检测插入的视频保护频带信号。基于检测结果检测传输信道之间的偏移。为了使所有传输信道中的视频保护频带信号同步，参考与具有最长延迟（即，延迟一个时钟周期1T）的传输信道相关联的视频信号之一，将1T的延迟给予其他视频信号。结果，即使在发送信道之间发生偏斜，也显示正确的像素数据。

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