会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明授权
    • Data communication adapter and data communication terminal apparatus for
performing data transmission and reception between terminals
    • 用于在终端之间执行数据发送和接收的数据通信适配器和数据通信终端装置
    • US5682552A
    • 1997-10-28
    • US248529
    • 1994-05-24
    • Shigeo KubokiNorihiko SugimotoShunji InadaKazuhisa InadaTomoaki AokiMasahiro UenoYasushi NakamuraEiki KondohToshihiko Tominaga
    • Shigeo KubokiNorihiko SugimotoShunji InadaKazuhisa InadaTomoaki AokiMasahiro UenoYasushi NakamuraEiki KondohToshihiko Tominaga
    • H04L29/08G06F13/12G06F13/38G06F13/40
    • G06F13/128G06F13/385
    • In a data communication adapter apparatus for a digital data communication connected between a signal transmission path for transmitting both receive data and transmit data, and a host processor unit for producing frame data to output the frame data therefrom, an internal host bus is newly employed in the data communication apparatus irrelevant to the employment of a CPU dedicated bus, and the transmission/reception data generated and interpreted by the host processor is transferred via the internal host bus, a bus interface, and a system data bus between a transmission memory or a reception memory and a buffer memory. Furthermore, a reception memory (host dedicated reception memory) for storing only the reception data to be interpreted by the host processor is separately provided with another reception memory (CPU dedicated reception memory) for storing only the reception data to be interpreted by a CPU, one reception data to be interpreted by the CPU is once transferred from the transmission/reception control unit to the CPU dedicated memory and thereafter read out via the CPU dedicated bus under the control of the CPU, and the other reception data to be interpreted by the host processor is one stored in the host dedicated reception memory and then read out via the internal host bus and bus interface under the control of the host processor.
    • 在连接在用于发送接收数据和发送数据两者的信号传输路径之间的数字数据通信用的数据通信适配器装置中,以及用于产生帧数据以从其输出帧数据的主机处理器单元, 与使用CPU专用总线无关的数据通信装置,并且由主处理器生成和解释的发送/接收数据经由内部主机总线,总线接口和系统数据总线传送到发送存储器或 接收存储器和缓冲存储器。 此外,用于仅存储要由主处理器解释的接收数据的接收存储器(主机专用接收存储器)分别设置有用于仅存储要由CPU解释的接收数据的另一个接收存储器(CPU专用接收存储器) 要由CPU解释的一个接收数据一次从发送/接收控制单元传送到CPU专用存储器,然后经由CPU专用总线在CPU的控制下读出,并且其他接收数据由 主处理器是存储在主机专用接收存储器中的一个主处理器,然后通过内部主机总线和总线接口在主处理器的控制下读出。
    • 10. 发明授权
    • Electrical capacitance proximity sensor
    • 电容接近传感器
    • US07119554B2
    • 2006-10-10
    • US11178383
    • 2005-07-12
    • Yasushi NakamuraAkira Kamijima
    • Yasushi NakamuraAkira Kamijima
    • G01R27/26
    • G01D5/2405G01D5/24G01R27/2605G01V3/088
    • An electrical capacitance proximity sensor for detecting a nearby object takes a normal operation mode for detecting the nearby object approaching and a self-diagnostic mode for detecting a correct connection between a sensor section and a detecting circuit section. The detecting circuit section is provided with a buffer controller which supplies a second oscillation signal having the same phase and voltage as a first oscillation signal applied to a guard electrode in the normal operation mode, and stops supplying the second oscillation signal in the self-diagnostic mode. A control circuit determines whether the sensor section is correctly connected to the detecting circuit section base on the change in the detecting signal in the normal operation mode and the self-diagnostic mode.
    • 用于检测附近物体的电容接近传感器采用用于检测附近物体接近的正常操作模式和用于检测传感器部分和检测电路部分之间的正确连接的自诊断模式。 检测电路部分设置有缓冲控制器,其在正常操作模式中提供具有与施加到保护电极的第一振荡信号相同的相位和电压的第二振荡信号,并且停止在自诊断中提供第二振荡信号 模式。 控制电路基于正常操作模式和自诊断模式中的检测信号的变化来确定传感器部分是否正确地连接到检测电路部分。