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1. 发明授权

US5434899A Phase clocked shift register with cross connecting between stages 失效
标题翻译：相位时钟移位寄存器，用于级间交叉连接
公开(公告)号：US5434899A
公开(公告)日：1995-07-18
申请号：US288793
申请日：1994-08-12
申请人： Ruquiya I. A. Huq , Sherman Weisbrod
发明人： Ruquiya I. A. Huq , Sherman Weisbrod
IPC分类号： G11C19/00 , G09G3/36 , G11C8/04 , G11C19/28 , H03K5/15
CPC分类号： G11C19/28 , G09G3/3674 , G11C8/04
摘要： A shift register for scanning a liquid crystal display includes cascaded stages. A given stage is formed with an input transistor switch that is responsive to an output pulse of a stage upstream in the chain of the cascaded stages. The input transistor switch charges a capacitance associated with a control electrode of a switched pull-up output transistor. The voltage in the capacitance conditions the output transistor for generating an output pulse when subsequently a clock signal occurs to the output transistor. A clamping transistor discharges the capacitance in a manner to prevent further generation of the output pulse when subsequent pulses of the clock signal occur. The clamping transistor is responsive to an output pulse of a stage downstream in the chain. An impedance that is developed at the control electrode is substantially higher after the clamping operation occurs and remain high for most of the vertical interval.
摘要翻译：用于扫描液晶显示器的移位寄存器包括级联级。给定级由形成在级联级链中的级上游的输出脉冲的输入晶体管开关形成。输入晶体管开关对与开关上拉输出晶体管的控制电极相关联的电容进行充电。当输出晶体管发生时钟信号时，电容中的电压使输出晶体管产生输出脉冲。钳位晶体管以这样的方式放电电容，以防止随后的时钟信号脉冲发生时进一步产生输出脉冲。钳位晶体管响应于链中下游的级的输出脉冲。在控制电极上产生的阻抗在钳位操作发生之后显着更高，并且在大部分垂直间隔中保持高电平。

2. 发明授权

US5410583A Shift register useful as a select line scanner for a liquid crystal display 失效
标题翻译：移位寄存器用作液晶显示器的选择线扫描器
公开(公告)号：US5410583A
公开(公告)日：1995-04-25
申请号：US289324
申请日：1994-08-11
申请人： Sherman Weisbrod , Ruquiya I. A. Huq
发明人： Sherman Weisbrod , Ruquiya I. A. Huq
IPC分类号： G09G3/20 , G09G3/36 , G11C19/00 , G11C19/28
CPC分类号： G11C19/28 , G11C19/00 , G09G2310/0286
摘要： A select line scanner for a liquid crystal display includes a plurality of cascaded stages each having an input terminal and an output terminal. Each stage includes a push-pull output circuit including pull up and pull down transistors driven with separate control signals. A further transistor has its conduction path coupled between the control electrode and a point of potential of sufficient value to turn the pull up transistor off. The control electrode of the further transistor is coupled to an output of a succeeding one of the cascaded stages to insure that the output of the respective stage cannot drift to an on state.
摘要翻译：用于液晶显示器的选择线扫描器包括多个具有输入端和输出端的级联级。每个级包括一个推挽输出电路，包括用单独的控制信号驱动的上拉和下拉晶体管。另一个晶体管的导通路径耦合在控制电极和足够值的电势点之间，以将上拉晶体管关断。另外晶体管的控制电极耦合到级联级的后续级的输出，以确保各级的输出不会漂移到接通状态。

3. 发明授权

US5686935A Data line drivers with column initialization transistor 失效
标题翻译：具有列初始化晶体管的数据线驱动器
公开(公告)号：US5686935A
公开(公告)日：1997-11-11
申请号：US399012
申请日：1995-03-06
申请人： Sherman Weisbrod
发明人： Sherman Weisbrod
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36
CPC分类号： G09G3/2011 , G09G3/3688 , G09G2310/0248 , G09G2310/0259 , G09G2310/027
摘要： A video display driver applies a video signal to column electrodes of a liquid crystal display. The display driver includes a reference ramp generator and column data line drivers. A reference ramp signal is combined with the video signal and applied to an input of a comparator. The comparator controls a first transistor that couples a data ramp signal to a given column of pixels. The first transistor at least partially initializes a voltage developed in the given column of pixels prior to an instant when the data ramp signal begins upramping. A second transistor that is coupled in parallel with the first transistor insures that the column voltage is fully initialized.
摘要翻译：视频显示驱动器将视频信号施加到液晶显示器的列电极。显示驱动器包括参考斜坡发生器和列数据线驱动器。参考斜坡信号与视频信号组合并施加到比较器的输入端。比较器控制将数据斜坡信号耦合到给定的像素列的第一晶体管。当数据斜坡信号开始上拉时，第一晶体管至少部分地初始化在给定列像素中产生的电压。与第一晶体管并联耦合的第二晶体管确保列电压被完全初始化。

4. 发明授权

US4326151A Scanning waveform generator for flat panel display devices 失效
标题翻译：用于平板显示设备的扫描波形发生器
公开(公告)号：US4326151A
公开(公告)日：1982-04-20
申请号：US216908
申请日：1980-12-16
申请人： Sherman Weisbrod
发明人： Sherman Weisbrod
IPC分类号： G09G3/30 , H03K4/06 , H01J29/74
CPC分类号： H03K4/06
摘要： A triangular waveform generator for applying a scanning waveform to the scan electrodes of a modular display device includes a constant current source and a coupling transformer. A charge storage capacitor is coupled to the secondary of the coupling transformer. A squarewave generator actuates a switch to alternately charge the capacitor in opposite directions resulting in the generation of the triangular waveform. Discharge means is provided to protect the switch from high voltages which could be developed when the generator is turned off.
摘要翻译：用于将扫描波形施加到模块化显示装置的扫描电极的三角波形发生器包括恒流源和耦合变压器。电荷存储电容器耦合到耦合变压器的次级。方波发生器启动开关以在相反方向交替地对电容器充电，导致产生三角波形。提供放电装置以保护开关免受当发电机关闭时可能产生的高电压。

5. 发明授权

US5781139A Switched capacitor digital-to analog converter 失效
标题翻译：开关电容数模转换器
公开(公告)号：US5781139A
公开(公告)日：1998-07-14
申请号：US618222
申请日：1996-03-19
申请人： Sherman Weisbrod
发明人： Sherman Weisbrod
IPC分类号： H03M1/66 , H03M1/74 , H03M1/80
CPC分类号： H03M1/804
摘要： In a switched capacitor type digital-to-analog (D/A) converter, a group of n bits of the binary word are applied to n parallel branches of the D/A converter, respectively. In a given branch, the corresponding bit is applied to a control terminal of a corresponding switch associated with a corresponding switched capacitor. Depending on the logic level of the bit, the switched capacitor is charged to a reference voltage or remains discharged. Then, the switched capacitor of the given branch is coupled by a transfer switch in parallel with a summing capacitor to provide for charge redistribution. The capacitances of the switched capacitor and of the summing capacitor are equal. The time allocated for either discharging the switched capacitor or charge redistribution is made shorter than the time allocated for charging the capacitor. Charging/discharging the capacitor is accomplished via a common transistor.
摘要翻译：在开关电容器型数模（D / A）转换器中，将二进制字的n位的一组分别施加到D / A转换器的n个并行分支。在给定的分支中，对应的位被施加到与相应的开关电容器相关联的相应开关的控制端子。取决于该位的逻辑电平，开关电容器被充电到参考电压或保持放电。然后，给定分支的开关电容器通过与求和电容器并联的转换开关耦合，以提供电荷再分配。开关电容器和求和电容器的电容相等。分配用于对开关电容器进行放电或电荷再分配的时间短于分配给电容器充电的时间。通过公共晶体管实现对电容器的充电/放电。

6. 发明授权

US5332997A Switched capacitor D/A converter 失效
标题翻译：开关电容D / A转换器
公开(公告)号：US5332997A
公开(公告)日：1994-07-26
申请号：US124679
申请日：1993-09-23
申请人： Andrew G. F. Dingwall , Sherman Weisbrod
发明人： Andrew G. F. Dingwall , Sherman Weisbrod
IPC分类号： H03M1/74 , G09G3/20 , G09G3/36 , H03M1/06 , H03M1/80 , H03M1/66
CPC分类号： G09G3/2011 , G09G3/3688 , H03M1/804 , G09G2310/027 , H03M1/0639
摘要： A set of N digital data bits serially supplied to an input node are converted to an analog voltage by means of N binary weighted capacitors and N switching transistors, one capacitor being associated with one switching transistor for each one of the N digital data bits. Each capacitor is connected between an output node and via the conduction path of its associated switching transistor to a first power terminal. Two transistors are used to selectively sample the N bits of serial data and to couple and store the sampled data on the gates of the switching transistors which are precharged so that the two transistors coupling the serial data only need to conduct in the common source mode. The serial data applied to the gates of the switching transistor is transferred to the N capacitors when a charging voltage is applied to the output node. Following the data transfer onto the binary weighted capacitors, the switching transistors are precharged and, concurrently the N capacitors are connected in parallel to produce an analog voltage corresponding to the serial data.
摘要翻译：通过N个二进制加权电容器和N个开关晶体管将串联提供给输入节点的一组N个数字数据位转换成模拟电压，一个电容器与N个数字数据位中的每一个与一个开关晶体管相关联。每个电容器连接在输出节点之间，并通过其相关联的开关晶体管的导通路径连接到第一电源端子。使用两个晶体管来选择性地对N位串行数据进行采样，并且将采样数据耦合并存储在预充电的开关晶体管的栅极上，使得耦合串行数据的两个晶体管仅需要以公共源模式传导。当向输出节点施加充电电压时，施加到开关晶体管的栅极的串行数据被传送到N个电容器。在数据传输到二进制加权电容器之后，开关晶体管被预充电，同时N个电容器并联连接以产生对应于串行数据的模拟电压。

7. 发明授权

US4080571A Apparatus for measuring the current-voltage characteristics of a TRAPATT diode 失效
标题翻译：用于测量TRAPATT二极管的电流 - 电压特性的装置
公开(公告)号：US4080571A
公开(公告)日：1978-03-21
申请号：US692548
申请日：1976-06-03
申请人： Sherman Weisbrod
发明人： Sherman Weisbrod
IPC分类号： G01R31/26 , G01R31/22
CPC分类号： G01R31/2632
摘要： An apparatus for measuring the current-voltage characteristics of a TRAPATT diode to determine its operational performance prior to mounting in its intended circuit. The apparatus comprises a pulse generator for generating a pulsed signal which is modulated by a modulator such that the current of the pulsed signal as applied to the diode periodically increases and decreases. The modulating signal is generated by a full wave bridge rectifier. The modulated signal sweeps the current applied to the diode through the characteristic curve of the diode triggering the diode into the TRAPATT mode of operation. An indicator such as an oscilloscope coupled to the diode displays the characteristic curve including the negative resistance region of the diode occurring during TRAPATT operation.
摘要翻译：一种用于测量TRAPATT二极管的电流 - 电压特性的装置，用于在安装到其预期电路之前确定其操作性能。该装置包括用于产生由调制器调制的脉冲信号的脉冲发生器，使得施加到二极管的脉冲信号的电流周期性地增加和减少。调制信号由全波桥式整流器产生。调制信号通过二极管的特性曲线扫描施加到二极管的电流，从而将二极管触发到TRAPATT工作模式。诸如耦合到二极管的示波器的指示器显示包括在TRAPATT操作期间发生的二极管的负电阻区域的特性曲线。

8. 发明授权

US5673063A Data line driver for applying brightness signals to a display 失效
标题翻译：用于将亮度信号应用于显示器的数据线驱动器
公开(公告)号：US5673063A
公开(公告)日：1997-09-30
申请号：US399011
申请日：1995-03-06
申请人： Sherman Weisbrod
发明人： Sherman Weisbrod
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36
CPC分类号： G09G3/2011 , G09G3/3688 , G09G2310/0251 , G09G2310/0297
摘要： A video display driver applies a video signal to pixels arranged in columns and rows of a liquid crystal display. A given column or data line driver includes a field effect transistor that operates as a comparator. The comparator is responsive to the video signal and to a reference ramp signal. A triggering voltage of the comparator is automatically and periodically adjusted. A drain voltage of the transistor that is equal to a threshold voltage of the transistor is developed in a stray capacitance, during the automatic adjustment period. A pulse signal, is coupled via the capacitance to increase the drain voltage. The drain voltage is applied to a gate electrode of a second field effect transistor that applies a data ramp voltage to the pixels. The pulse signal provides a small amount of drive in the second transistor.
摘要翻译：视频显示驱动器将视频信号施加到以液晶显示器的列和行排列的像素。给定的列或数据线驱动器包括作为比较器操作的场效应晶体管。比较器响应于视频信号和参考斜坡信号。自动周期性调整比较器的触发电压。在自动调整期间，等离子体晶体管的漏极电压以杂散电容显影。脉冲信号通过电容耦合以增加漏极电压。将漏极电压施加到向像素施加数据斜坡电压的第二场效应晶体管的栅电极。脉冲信号在第二晶体管中提供少量驱动。

9. 发明授权

US5600345A Amplifier with pixel voltage compensation for a display 失效
标题翻译：具有显示器像素电压补偿的放大器
公开(公告)号：US5600345A
公开(公告)日：1997-02-04
申请号：US398822
申请日：1995-03-06
申请人： Andrew G. F. Dingwall , Sherman Weisbrod
发明人： Andrew G. F. Dingwall , Sherman Weisbrod
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36 , H04N5/66
CPC分类号： G09G3/2011 , G09G3/3648 , G09G3/3688 , G09G2300/043 , G09G2310/0251 , G09G2310/0259 , G09G2310/027 , G09G2320/043
摘要： A liquid crystal display includes pixels that are arranged in columns and rows. Data line drivers responsive to a video signal develop output signals in data lines that correspond with the columns, respectively. An adjustment data line driver is provided. The adjustment data line driver is responsive to a reference DC constant signal at a mid-range of the video signal. An output signal of the adjustment data line driver is coupled to the other data line drivers in a negative feedback manner to compensate for output signal variations in the other data line drivers.
摘要翻译：液晶显示器包括以行和列排列的像素。响应于视频信号的数据线路驱动器分别在与列相对应的数据线中产生输出信号。提供调整数据线驱动器。调整数据线驱动器响应于在视频信号的中间范围的参考DC常数信号。调整数据线驱动器的输出信号以负反馈方式耦合到其它数据线驱动器，以补偿其它数据线驱动器中的输出信号变化。

10. 发明授权

US4183062A Row addressing apparatus for a bistable display device 失效
标题翻译：双稳态显示装置的行寻址装置
公开(公告)号：US4183062A
公开(公告)日：1980-01-08
申请号：US931745
申请日：1978-08-07
申请人： Sherman Weisbrod
发明人： Sherman Weisbrod
IPC分类号： H04N3/12 , H04N5/66 , G09F9/00 , H05B37/00
CPC分类号： H04N3/125
摘要： A horizontal sync signal simultaneously addresses a second counter and a first memory addressing circuit comprising a frequency multiplier connected to a first counter. The output of the first counter addresses the first memory. A comparator compares the outputs from the first memory and the second counter, and generates an output which may be compensated if necessary to subsequently assure proper sequencing of the display device. The comparator output addresses a second memory. Outputs from the second memory and the second counter are combined in an adder and the summation thereof are fed into a subtractor along with the output of the first memory. The output of the subtractor is fed into a binary-to-decimal converter which in turn feeds a row electrode driver circuit.
摘要翻译：水平同步信号同时寻址第二计数器和包括连接到第一计数器的倍频器的第一存储器寻址电路。第一个计数器的输出将寻址第一个存储器。比较器比较来自第一存储器和第二计数器的输出，并产生可以根据需要补偿的输出，以随后确保显示装置的顺序排列。比较器输出寻址第二个存储器。来自第二存储器和第二计数器的输出在加法器中组合，并且其总和与第一存储器的输出一起馈送到减法器中。减法器的输出被馈送到二进制到十进制转换器，该二进制转换器进而馈送行电极驱动器电路。

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