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1. 发明申请

US20100007397A1 Delay line circuit for generating a fixed delay 审中-公开
标题翻译：用于产生固定延迟的延迟线电路
公开(公告)号：US20100007397A1
公开(公告)日：2010-01-14
申请号：US12218457
申请日：2008-07-11
申请人： Shengyuan Zhang , Yong Wang , Yanbo Wang
发明人： Shengyuan Zhang , Yong Wang , Yanbo Wang
IPC分类号： H03H11/26 , H03K3/011 , G05F1/00
CPC分类号： G05F3/30 , H03K5/133 , H03K2005/00032 , H03K2005/00078
摘要： A delay line circuit is provided. The delay line circuit includes a reference voltage generating circuit that generates a reference voltage, the reference voltage having a positive temperature coefficient. The delay line circuit also includes a voltage regulating circuit that generates a regulated voltage in response to the generated reference voltage as an input, and a delay chain circuit coupled to the voltage regulator to receive the regulated voltage, the delay chain circuit outputting a delay signal. In an embodiment consistent with the present invention, the reference voltage generating circuit includes a bandgap reference voltage circuit. In another embodiment consistent with the present invention, the reference voltage generating circuit includes a proportional to absolute temperature (PTAT) circuit.
摘要翻译：提供延迟线电路。延迟线电路包括产生参考电压的参考电压产生电路，该参考电压具有正温度系数。延迟线电路还包括电压调节电路，其响应于产生的参考电压作为输入而产生调节电压，以及延迟链电路，耦合到电压调节器以接收调节电压，延迟链电路输出延迟信号。在与本发明一致的实施例中，参考电压产生电路包括带隙基准电压电路。在与本发明一致的另一实施例中，参考电压产生电路包括与绝对温度（PTAT）成比例的电路。

2. 发明授权

US08115532B2 Linear monotonic delay chain circuit 有权
标题翻译：线性单调延迟链电路
公开(公告)号：US08115532B2
公开(公告)日：2012-02-14
申请号：US12218486
申请日：2008-07-11
申请人： Shengyuan Zhang , Shoujun Wang , Yong Wang
发明人： Shengyuan Zhang , Shoujun Wang , Yong Wang
IPC分类号： H03H11/26
CPC分类号： H03H11/265
摘要： A method and circuit for generating an adjustable delay signal is presented, wherein the delay can be linear and monotonic with high resolution delay steps. The circuit utilizes one or more serially coupled delay cells and a load cell. Each delay cell comprises an inverter, a nor-multiplexer, and a programmable capacitor, wherein a first control signal is used to control the operation of the nor-multiplexer and a second control signal is used to control capacitance of the programmable capacitor. Values of the first and the second control signals are selected based on any desired range of total delay time and any desired delay time for a specific application of the circuit.
摘要翻译：提出了一种用于产生可调延迟信号的方法和电路，其中延迟可以是具有高分辨率延迟步长的线性和单调的。该电路利用一个或多个串联耦合的延迟单元和负载单元。每个延迟单元包括反相器，非多路复用器和可编程电容器，其中第一控制信号用于控制非多路复用器的操作，并且第二控制信号用于控制可编程电容器的电容。第一和第二控制信号的值基于总延迟时间的任何期望范围和用于电路的特定应用的任何期望的延迟时间来选择。

3. 发明申请

US20100007398A1 Linear monotonic delay chain circuit 有权
标题翻译：线性单调延迟链电路
公开(公告)号：US20100007398A1
公开(公告)日：2010-01-14
申请号：US12218486
申请日：2008-07-11
申请人： Shengyuan Zhang , Shoujun Wang , Yong Wang
发明人： Shengyuan Zhang , Shoujun Wang , Yong Wang
IPC分类号： H03H11/26
CPC分类号： H03H11/265
摘要： A method and circuit for generating an adjustable delay signal is presented, wherein the delay can be linear and monotonic with high resolution delay steps. The circuit utilizes one or more serially coupled delay cells and a load cell. Each delay cell comprises an inverter, a nor-multiplexer, and a programmable capacitor, wherein a first control signal is used to control the operation of the nor-multiplexer and a second control signal is used to control capacitance of the programmable capacitor. Values of the first and the second control signals are selected based on any desired range of total delay time and any desired delay time for a specific application of the circuit.
摘要翻译：提出了一种用于产生可调延迟信号的方法和电路，其中延迟可以是具有高分辨率延迟步长的线性和单调的。该电路利用一个或多个串联耦合的延迟单元和负载单元。每个延迟单元包括反相器，非多路复用器和可编程电容器，其中第一控制信号用于控制非多路复用器的操作，并且第二控制信号用于控制可编程电容器的电容。第一和第二控制信号的值基于总延迟时间的任何期望范围和用于电路的特定应用的任何期望的延迟时间来选择。

4. 发明申请

US20100066410A1 LOW-LOSS IMPEDANCE-MATCHED SOURCE-FOLLOWER FOR REPEATING OR SWITCHING SIGNALS ON A HIGH SPEED LINK 有权
标题翻译：用于在高速链路上重新启动或切换信号的低损耗阻抗匹配源
公开(公告)号：US20100066410A1
公开(公告)日：2010-03-18
申请号：US12210316
申请日：2008-09-15
申请人： Yunfu Yang , Shengyuan Zhang , Yu Min Zhang , Shoujun Wang
发明人： Yunfu Yang , Shengyuan Zhang , Yu Min Zhang , Shoujun Wang
IPC分类号： H03K19/0185
CPC分类号： H03K19/00384 , H04L25/0272 , H04L25/0278
摘要： Switching and repeating applications using an impedance matched source follower improve performance of high speed links such as PCI Express, HDMI, DisplayPort and DVI by reducing attenuation and other degradation of high speed signals, including those with transmit pre-emphasis, by avoiding impedance discontinuities over process, voltage and temperature variations and by driving a broader range of loads, e.g., heavily capacitive loads. A circuit for switching or repeating signals on a single-ended or differential high speed link may comprise a source follower with input and output impedances matched to input and output transmission lines on the high speed link. The source follower is biased by a constant transconductance circuit, an external calibration circuit or other circuit to provide an essentially constant output impedance over process, voltage and temperature variations.
摘要翻译：使用阻抗匹配源跟踪器的交换和重复应用通过减少高速信号（包括那些具有发送预加重功能）的衰减和其他降级来提高高速链路（如PCI Express，HDMI，DisplayPort和DVI）的性能，通过避免阻抗不连续性过程，电压和温度变化以及驱动更宽范围的负载，例如高容性负载。用于在单端或差分高速链路上切换或重复信号的电路可以包括源极跟随器，其具有与高速链路上的输入和输出传输线匹配的输入和输出阻抗。源极跟随器由恒定的跨导电路，外部校准电路或其他电路偏置，以在过程，电压和温度变化上提供基本恒定的输出阻抗。

5. 发明授权

US07679395B1 Low-loss impedance-matched source-follower for repeating or switching signals on a high speed link 有权
标题翻译：用于在高速链路上重复或切换信号的低损耗阻抗匹配源跟随器
公开(公告)号：US07679395B1
公开(公告)日：2010-03-16
申请号：US12210316
申请日：2008-09-15
申请人： Yunfu Yang , Shengyuan Zhang , Yu Min Zhang , Shoujun Wang
发明人： Yunfu Yang , Shengyuan Zhang , Yu Min Zhang , Shoujun Wang
IPC分类号： H03K17/16
CPC分类号： H03K19/00384 , H04L25/0272 , H04L25/0278
摘要： Switching and repeating applications using an impedance matched source follower improve performance of high speed links such as PCI Express, HDMI, DisplayPort and DVI by reducing attenuation and other degradation of high speed signals, including those with transmit pre-emphasis, by avoiding impedance discontinuities over process, voltage and temperature variations and by driving a broader range of loads, e.g., heavily capacitive loads. A circuit for switching or repeating signals on a single-ended or differential high speed link may comprise a source follower with input and output impedances matched to input and output transmission lines on the high speed link. The source follower is biased by a constant transconductance circuit, an external calibration circuit or other circuit to provide an essentially constant output impedance over process, voltage and temperature variations.
摘要翻译：使用阻抗匹配源跟踪器的交换和重复应用通过减少高速信号（包括那些具有发送预加重功能）的衰减和其他降级来提高高速链路（如PCI Express，HDMI，DisplayPort和DVI）的性能，通过避免阻抗不连续性过程，电压和温度变化以及驱动更宽范围的负载，例如高容性负载。用于在单端或差分高速链路上切换或重复信号的电路可以包括源极跟随器，其具有与高速链路上的输入和输出传输线匹配的输入和输出阻抗。源极跟随器由恒定的跨导电路，外部校准电路或其他电路偏置，以在过程，电压和温度变化上提供基本恒定的输出阻抗。

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