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1. 发明授权

US07828915B2 Method for making Mg-based intermetallic compound 有权
标题翻译：制备镁基金属间化合物的方法
公开(公告)号：US07828915B2
公开(公告)日：2010-11-09
申请号：US11953821
申请日：2007-12-10
申请人： Sheng-Long Lee , Jing-Chie Lin , Che-Wei Hsu , Cheng-Yu Chou , Yin-Chun Cheng , Chia-Wang Weng , Chien-Chang Chiang , Chien-Wei Chen
发明人： Sheng-Long Lee , Jing-Chie Lin , Che-Wei Hsu , Cheng-Yu Chou , Yin-Chun Cheng , Chia-Wang Weng , Chien-Chang Chiang , Chien-Wei Chen
IPC分类号： C22F1/10
CPC分类号： C22C23/00 , C22C1/02 , C22F1/06
摘要： A method for making Mg(magnesium)-based intermetallic compound uses a thermal process during a melting process to produce largely the Mg-based intermetallic compound. The vapor pressure of Mg is high, thereby Mg is prone to be vaporized from a melt and a wrought solid alloy in the melting process of high temperature, for purifying the wrought Mg-based intermetallic compound. The method may simplify the process and devices for making the Mg-based intermetallic compound, and produce efficiently a larger of high purity Mg-based intermetallic compound.
摘要翻译：制备Mg（镁）基金属间化合物的方法在熔融过程中使用热处理以大量生产Mg基金属间化合物。 Mg的蒸汽压高，因此在高温熔融过程中，Mg易于从熔体和锻造的固体合金中蒸发，用于纯化锻造的Mg基金属间化合物。该方法可以简化用于制备Mg基金属间化合物的方法和装置，并且有效地产生较大的高纯度Mg基金属间化合物。

2. 发明申请

US20090116992A1 Method for making Mg-based intermetallic compound 有权
标题翻译：制备镁基金属间化合物的方法
公开(公告)号：US20090116992A1
公开(公告)日：2009-05-07
申请号：US11953821
申请日：2007-12-10
申请人： Sheng-Long Lee , Jing-Chie Lin , Che-Wei Hsu , Cheng-Yu Chou , Yin-Chun Cheng , Chia-Wang Weng , Chien-Chang Chiang , Chien-Wei Chen
发明人： Sheng-Long Lee , Jing-Chie Lin , Che-Wei Hsu , Cheng-Yu Chou , Yin-Chun Cheng , Chia-Wang Weng , Chien-Chang Chiang , Chien-Wei Chen
IPC分类号： C22C23/00
CPC分类号： C22C23/00 , C22C1/02 , C22F1/06
摘要： A method for making Mg(magnesium)-based intermetallic compound uses a thermal process during a melting process to produce largely the Mg-based intermetallic compound. The vapor pressure of Mg is high, thereby Mg is prone to be vaporized from a melt and a wrought solid alloy in the melting process of high temperature, for purifying the wrought Mg-based intermetallic compound. The method may simplify the process and devices for making the Mg-based intermetallic compound, and produce efficiently a larger of high purity Mg-based intermetallic compound.
摘要翻译：制备Mg（镁）基金属间化合物的方法在熔融过程中使用热处理以大量生产Mg基金属间化合物。 Mg的蒸汽压高，因此在高温熔融过程中，Mg易于从熔体和锻造的固体合金中蒸发，用于纯化锻造的Mg基金属间化合物。该方法可以简化用于制备Mg基金属间化合物的方法和装置，并且有效地产生较大的高纯度Mg基金属间化合物。

3. 发明申请

US20130107437A1 STANDABLE ELECTRONIC DEVICE 有权
标题翻译：标准电子设备
公开(公告)号：US20130107437A1
公开(公告)日：2013-05-02
申请号：US13554102
申请日：2012-07-20
申请人： Chien-Wei Chen , Cheng-Shing Liu , Ching-Fu Hsu
发明人： Chien-Wei Chen , Cheng-Shing Liu , Ching-Fu Hsu
IPC分类号： H05K7/00 , G06F1/16
CPC分类号： G06F1/166 , G06F1/1616 , G06F1/1624 , G06F1/1626 , G06F1/1637 , G06F1/1669 , G06F1/1679 , G06F1/1681 , H04M1/0214 , H04M1/04
摘要： The disclosure relates to a standable electronic device, which comprises an electronic device body, a supporting member, and a base. The supporting member is disposed on the electronic device body. The supporting member is disposed on the base. A spreading angle is produced between the electronic device body and the supporting member, so that the bottom of the electronic device rests against the base and hence making the electronic device stand on a surface of object. According to the disclosure, no extra supporting frame is required for making the electronic device stand on a surface of object. Thereby, the portability and utility can be enhanced effectively.
摘要翻译：本公开涉及一种可置换电子设备，其包括电子设备主体，支撑构件和基座。支撑构件设置在电子设备主体上。支撑构件设置在基座上。在电子设备主体和支撑构件之间产生扩展角度，使得电子设备的底部抵靠在基座上，从而使电子设备位于物体的表面上。根据本发明，不需要额外的支撑框架来使电子设备站在物体的表面上。从而可以有效地提高便携性和效用。

4. 发明授权

US08971030B2 Standable electronic device 有权
标题翻译：可靠的电子设备
公开(公告)号：US08971030B2
公开(公告)日：2015-03-03
申请号：US13554102
申请日：2012-07-20
申请人： Chien-Wei Chen , Cheng-Shing Liu , Ching-Fu Hsu
发明人： Chien-Wei Chen , Cheng-Shing Liu , Ching-Fu Hsu
IPC分类号： H05K5/00 , H05K7/00 , G06F1/16 , H04M1/02 , H04M1/04
CPC分类号： G06F1/166 , G06F1/1616 , G06F1/1624 , G06F1/1626 , G06F1/1637 , G06F1/1669 , G06F1/1679 , G06F1/1681 , H04M1/0214 , H04M1/04
摘要： The disclosure relates to a standable electronic device, which comprises an electronic device body, a supporting member, and a base. The supporting member is disposed on the electronic device body. The supporting member is disposed on the base. A spreading angle is produced between the electronic device body and the supporting member, so that the bottom of the electronic device rests against the base and hence making the electronic device stand on a surface of object. According to the disclosure, no extra supporting frame is required for making the electronic device stand on a surface of object. Thereby, the portability and utility can be enhanced effectively.
摘要翻译：本公开涉及一种可置换电子设备，其包括电子设备主体，支撑构件和基座。支撑构件设置在电子设备主体上。支撑构件设置在基座上。在电子设备主体和支撑构件之间产生扩展角度，使得电子设备的底部抵靠在基座上，从而使电子设备位于物体的表面上。根据本发明，不需要额外的支撑框架来使电子设备站在物体的表面上。从而可以有效地提高便携性和效用。

5. 发明授权

US07833500B1 Abatement of mercury in flue gas 有权
标题翻译：排放烟气中的汞
公开(公告)号：US07833500B1
公开(公告)日：2010-11-16
申请号：US12372308
申请日：2009-02-17
申请人： Wei-Ping Pan , Yan Cao , Bobby I. T. Chen , Chien-Wei Chen
发明人： Wei-Ping Pan , Yan Cao , Bobby I. T. Chen , Chien-Wei Chen
IPC分类号： B01D53/64
CPC分类号： B01D53/8665 , B01D2251/2062 , B01D2251/502 , B01D2257/602
摘要： The present invention provides a method for the oxidation of Hg0 in coal fired flue gas to form Hg2+ which is absorbed by the scrubber solution in wet-FGD or SDA, or adsorbed by the fly ash and subsequently removed from the flue stack with ESP and FF, and/or any other means as are known in the art for SOx, NOx and particulate removals. The addition of a second flue gas stream having a halogen and fly ash therein simultaneously with said hydrogen halogen or interhalogens into a coal fired flue gas further increases the oxidation of Hg0 to Hg2+.
摘要翻译：本发明提供了一种用于在燃煤烟气中氧化HgO以形成Hg2 +的方法，其被湿法FGD或SDA中的洗涤器溶液吸收，或被飞灰吸附，随后用ESP和FF从烟道排出物，和/或本领域已知的用于SO x，NO x和微粒去除的任何其它方法。将其中含有卤素和飞灰的第二烟道气与所述氢卤素或间卤素一起加入燃煤烟道气中进一步增加了HgO氧化为Hg2 +。

6. 发明授权

US07256126B1 Pitch reduction integrating formation of memory array and peripheral circuitry 有权
标题翻译：减少积分形成存储器阵列和外围电路
公开(公告)号：US07256126B1
公开(公告)日：2007-08-14
申请号：US11009496
申请日：2004-12-10
申请人： Chien-Wei Chen
发明人： Chien-Wei Chen
IPC分类号： H01L21/336 , H01L21/302
CPC分类号： H01L21/0337 , H01L27/105 , H01L27/1052
摘要： Methods and apparatus for providing a memory array fabrication process that concurrently forms memory array elements and peripheral circuitry. The invention relates to a method for fabricating memory arrays using a process that concurrently forms memory array elements and peripheral circuitry and results in a reduction in pitch.
摘要翻译：用于提供同时形成存储器阵列元件和外围电路的存储器阵列制造工艺的方法和装置。本发明涉及使用同时形成存储器阵列元件和外围电路并导致音调减小的过程来制造存储器阵列的方法。

7. 发明申请

US20120235328A1 TRANSFER PRINTING METHOD AND SYSTEM FOR PRINTING IMAGES ON A WORKPIECE WITH SUPERCRITICAL FLUID 有权
标题翻译：用超临界流体工作印刷图像的转印打印方法和系统
公开(公告)号：US20120235328A1
公开(公告)日：2012-09-20
申请号：US13348601
申请日：2012-01-11
申请人： Chien-Wei Chen , Ching-Fu Hsu
发明人： Chien-Wei Chen , Ching-Fu Hsu
IPC分类号： B29C44/06 , B29C35/08
CPC分类号： B41F16/008
摘要： The present invention relates to a transfer printing method and a system using the method for printing images on a workpiece with supercritical fluid. The method includes disposing the workpiece inside the first mold and disposing a transfer film above the workpiece, closing the first mold with a second mold and injecting pressured gas, whose pressure is greater than a critical pressure, into the first mold and the second mold, ensuring a temperature of the pressured gas being greater than a critical temperature so as to convert into supercritical fluid, softening the transfer film with the supercritical fluid, transferring an adhesive layer, a print layer and a hardening layer of the transfer film onto the workpiece, and opening the first mold and the second mold to take out the workpiece.
摘要翻译：本发明涉及一种转印印刷方法和一种使用超临界流体在工件上印刷图像的方法的系统。该方法包括将工件设置在第一模具内部并且在工件上方设置转印膜，用第二模具封闭第一模具，并将压力大于临界压力的压力气体注入到第一模具和第二模具中，确保加压气体的温度大于临界温度，以便转化成超临界流体，用超临界流体软化转移膜，将粘合剂层，转印膜的印刷层和硬化层转移到工件上，并打开第一个模具和第二个模具取出工件。

8. 发明申请

US20080218175A1 Open-Circuit Testing System and Method 有权
标题翻译：开环测试系统及方法
公开(公告)号：US20080218175A1
公开(公告)日：2008-09-11
申请号：US11743641
申请日：2007-05-02
申请人： Chien-Wei Chen , Chia-Ming Chen
发明人： Chien-Wei Chen , Chia-Ming Chen
IPC分类号： G01R31/04
CPC分类号： G01R31/046
摘要： The invention discloses a testing system and method suitable for determining the connection state of an electronic component in an electronic device assembly. In an embodiment, the testing system comprises a signal sensing unit configured to provide a sensed signal induced by capacitive coupling in response to the output of a testing signal passing through a tested pin, a signal processor unit configured to filter and over-sample the sensed signal to obtain a digital signal, and an analyzer unit configured to compute the digital signal for determining a connection state of the test pin.
摘要翻译：本发明公开了一种适用于确定电子设备组件中的电子部件的连接状态的测试系统和方法。在一个实施例中，测试系统包括信号感测单元，其被配置为响应于通过测试引脚的测试信号的输出来提供由电容耦合引起的感测信号，信号处理器单元被配置为对所感测的信号进行滤波和过采样信号以获得数字信号，以及分析器单元，被配置为计算用于确定测试引脚的连接状态的数字信号。

9. 发明申请

US20060286756A1 SEMICONDUCTOR PROCESS AND METHOD FOR REDUCING PARASITIC CAPACITANCE 审中-公开
标题翻译：用于降低PARASIIC电容的半导体工艺和方法
公开(公告)号：US20060286756A1
公开(公告)日：2006-12-21
申请号：US11160325
申请日：2005-06-20
申请人： Chien-Wei Chen
发明人： Chien-Wei Chen
IPC分类号： H01L21/336
CPC分类号： H01L21/823456 , H01L21/823481 , H01L29/665
摘要： A semiconductor processes is described. A substrate having trench isolation structures and dummy trench isolation structures thereon is provided. Gate structures and dummy gate structures are simultaneously formed on the substrate. Spacers are formed on the sidewalls of the gate structures and the dummy gate structures. A patterned blocking layer is formed covering the dummy gate structures and the substrate between the dummy trench isolation structures. Thereafter, a salicide layer is formed on exposed surfaces of the gate structures and the substrate.
摘要翻译：描述半导体工艺。提供了具有沟槽隔离结构和其上的虚设沟槽隔离结构的衬底。栅极结构和虚拟栅极结构同时形成在衬底上。隔板形成在栅极结构和虚拟栅极结构的侧壁上。形成图案化的阻挡层，覆盖虚拟栅极结构和虚设沟槽隔离结构之间的衬底。此后，在栅极结构和衬底的暴露表面上形成自对准硅化物层。

10. 发明授权

US06787408B2 Method for forming an electrical insulating layer on bit lines of the flash memory 有权
标题翻译：在闪速存储器的位线上形成电绝缘层的方法
公开(公告)号：US06787408B2
公开(公告)日：2004-09-07
申请号：US09930856
申请日：2001-08-16
申请人： Chien-Wei Chen , Jiun-Ren Lai
发明人： Chien-Wei Chen , Jiun-Ren Lai
IPC分类号： H01L21338
CPC分类号： H01L27/11517 , H01L21/31055 , H01L27/115
摘要： A method for forming an electrical insulating layer on bit lines of the flash memory is disclosed. A conductive layer, a mask layer and a cap layer are sequentially formed on a semiconductor substrate and then are etched to form a plurality of spacing. Afterwards, a dielectric layer is formed on the semiconductor substrate and a planarized layer is then formed on the dielectric layer. The planarized layer and the dielectric layer are etched sequentially wherein the etching rate of the planarized layer is less than that of the dielectric layer. Next, the dielectric layer is etched to remove a portion of the dielectric layer wherein the etching rate of the dielectric layer is higher than that of the cap layer, and thus a spacing dielectric layer is formed on the spacing. Thereafter, the cap layer is stripped wherein the etching rate of the dielectric layer is less than that of the mask layer so that the spacing dielectric layer has a round top and slant sides. Finally, the mask layer is stripped and then the spacing dielectric layer remains to form the electrical insulating layer on bit lines of the flash memory.
摘要翻译：公开了一种在闪速存储器的位线上形成电绝缘层的方法。依次在半导体衬底上形成导电层，掩模层和覆盖层，然后进行蚀刻以形成多个间隔。之后，在半导体衬底上形成电介质层，然后在电介质层上形成平坦化层。依次蚀刻平坦化层和电介质层，其中平坦化层的蚀刻速率小于电介质层的蚀刻速率。接下来，蚀刻电介质层以去除电介质层的一部分，其中电介质层的蚀刻速率高于盖层的蚀刻速率，因此在间隔上形成间隔电介质层。此后，剥离盖层，其中电介质层的蚀刻速率小于掩模层的蚀刻速率，使得间隔电介质层具有圆顶和倾斜的侧面。最后，剥离掩模层，然后保留间隔电介质层以在闪存的位线上形成电绝缘层。

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