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1. 发明申请

US20190081075A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20190081075A1
公开(公告)日：2019-03-14
申请号：US16078249
申请日：2017-02-21
申请人： Sharp Kabushiki Kaisha
发明人： Kazuatsu ITO , Seiji KANEKO , Yohsuke KANZAKI , Takao SAITOH , Makoto NAKAZAWA
IPC分类号： H01L27/12 , H01L29/786 , H01L29/417 , H01L29/423 , H01L29/51
摘要： A method of producing a semiconductor device according to an embodiment of the present invention includes: step (C) of forming an oxide semiconductor layer of a plurality of thin film transistors on a gate dielectric layer; step (F) of forming an aperture in an interlevel dielectric layer, the aperture being located between an active region and a plurality of terminal portions and extending through the interlevel dielectric layer; and step (G) of, after step (F), forming an upper conductive portion on the interlevel dielectric layer. In step (C), a protection layer made of the same oxide semiconductor film as the oxide semiconductor layer is formed above a region of the gate dielectric layer that is located between the active region and the plurality of terminal portions. In step (F), the aperture is formed so as to overlap the protection layer.

2. 发明申请

US20190035824A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
公开(公告)号：US20190035824A1
公开(公告)日：2019-01-31
申请号：US16072910
申请日：2017-01-16
申请人： SHARP KABUSHIKI KAISHA
发明人： Takao SAITOH , Yohsuke KANZAKI , Makoto NAKAZAWA , Kazuatsu ITO , Seiji KANEKO
IPC分类号： H01L27/12 , G06F3/041 , H01L21/768 , H01L29/786
摘要： A semiconductor device includes: a first thin film transistor (101) including a crystalline silicon semiconductor layer (13); and a second thin film transistor (102) including an oxide semiconductor layer (23). First source/drain electrodes (31), (33) of the first thin film transistor (101) are provided on the crystalline silicon semiconductor layer via a first interlevel dielectric layer (L1); a second source electrode (25S) of the second thin film transistor (102) is electrically connected to a line (35) which is made of the same conductive film as the first source/drain electrodes; the line (35) is provided on the second source electrode (25S) via a second interlevel dielectric layer (L2), and is in contact with the second source electrode (25S) within a second contact hole including an opening made in the second interlevel dielectric layer (L2); the second source electrode has a multilayer structure including a main layer (25m) and an upper layer (25u) disposed on the main layer such that, under the opening in the second interlevel dielectric layer, the upper layer (25u) has a first aperture and the main layer (25m) has a second aperture (p2) or recess, the second aperture (p2) or recess being larger than the first aperture (p1) as viewed from the normal direction of the substrate.

3. 发明申请

US20190131322A1 METHOD FOR MANUFACTURING THIN-FILM TRANSISTOR AND THIN-FILM TRANSISTOR 审中-公开
公开(公告)号：US20190131322A1
公开(公告)日：2019-05-02
申请号：US16171402
申请日：2018-10-26
申请人： Sharp Kabushiki Kaisha
发明人： Kazuatsu ITO , Hirohiko NISHIKI
IPC分类号： H01L27/12 , H01L29/786
摘要： A method for manufacturing a thin-film transistor that includes a source electrode and a drain electrode at least one of which has a layered structure of a plurality of metal layers including an Al layer and at least one layer made of a metal other than Al and a channel layer made of an oxide semiconductor includes forming a conductive film for the source electrode and the drain electrode, patterning the conductive film to form the source electrode and the drain electrode, forming a passivation film, and conducting heat treatment. The method includes preliminary heat treatment prior to the heat treatment, the preliminary heat treatment being conducted between the patterning of the conductive film and the formation of the passivation film.

4. 发明申请

US20180301566A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
公开(公告)号：US20180301566A1
公开(公告)日：2018-10-18
申请号：US15767699
申请日：2016-10-13
申请人： Sharp Kabushiki Kaisha
发明人： Kazuatsu ITO
IPC分类号： H01L29/786 , H01L29/49 , H01L29/24 , H01L29/04 , H01L29/423 , H01L21/8234 , H01L27/088
CPC分类号： H01L29/78696 , H01L21/28 , H01L21/8234 , H01L21/823412 , H01L27/08 , H01L27/088 , H01L27/32 , H01L29/045 , H01L29/247 , H01L29/423 , H01L29/42364 , H01L29/42372 , H01L29/49 , H01L29/4908 , H01L29/786 , H01L29/78645 , H01L29/7869
摘要： A semiconductor device includes a first thin film transistor (101) on a substrate (10), the first thin film transistor including: a sub-gate electrode (12); a first insulating layer (14) covering the sub-gate electrode; a main gate electrode (16) formed on the first insulating layer; a second insulating layer (18) covering the main gate electrode; an oxide semiconductor layer (20) having a layered structure of a first layer (20A) and a second layer (20B), the second layer having a larger band gap than the first layer; a first source electrode (22); and a first drain electrode (24), wherein as seen from a direction normal to the substrate, the oxide semiconductor layer (20) includes: a gate opposing region (20g) that overlaps the main gate electrode; a source contact region that is in contact with the first source electrode (22); a drain contact region that is in contact with the first drain electrode; and an offset region (30s, 30d) that is provided at least one of between the gate opposing region and the source contact region and between the gate opposing region and the drain contact region, wherein at least a portion of the offset region overlaps the sub-gate electrode (12) with the first insulating layer (14) and the second insulating layer (18) therebetween.

5. 发明申请

US20170092673A1 LIGHT DETECTION DEVICE 有权
公开(公告)号：US20170092673A1
公开(公告)日：2017-03-30
申请号：US15126821
申请日：2015-03-19
申请人： Sharp Kabushiki Kaisha
发明人： Tadayoshi MIYAMOTO , Kazuhide TOMIYASU , Atsushi TOMYO , Kazuatsu ITO , Shigeyasu MORI
IPC分类号： H01L27/146
CPC分类号： H01L27/14614 , G01J1/02 , H01L27/1225 , H01L27/14603 , H01L27/14609 , H01L27/14616 , H01L27/14658 , H01L27/14663 , H01L27/14692 , H01L29/24 , H01L29/78648 , H01L29/7869 , H01L29/78696
摘要： A light detection device includes: a TFT having a semiconductor layer supported on a substrate, a source electrode, a drain electrode, and a gate electrode; a photodiode having a bottom electrode electrically connected to the drain electrode, a semiconductor laminate structure, and a top electrode; and an electrode made of the same conductive film as the bottom electrode and arranged on the semiconductor layer with an insulating layer interposed therebetween.

6. 发明申请

US20160306247A1 LIQUID CRYSTAL PANEL AND ACTIVE MATRIX SUBSTRATE USED THEREFOR 有权
标题翻译：液晶面板及其使用的主动矩阵基板
公开(公告)号：US20160306247A1
公开(公告)日：2016-10-20
申请号：US15100700
申请日：2014-11-28
申请人： SHARP KABUSHIKI KAISHA
发明人： Kazuatsu ITO , Tadayoshi MIYAMOTO , Seiichi UCHIDA
IPC分类号： G02F1/1362 , G02F1/1368 , G02F1/1343 , G02F1/1339
CPC分类号： G02F1/136286 , G02F1/1339 , G02F1/134309 , G02F1/136213 , G02F1/1368 , G02F2001/133388 , G02F2201/123 , G02F2202/10 , G09G3/3648 , G09G2320/0219 , G09G2320/0247
摘要： A liquid crystal panel (100) includes a pair of substrates (10, 30); a liquid crystal layer (40) provided between the pair of substrates; and a sealing member (42) provided so as to surround the liquid crystal layer. A plurality of pixels (P1, P2) are provided in a matrix in a region surrounded by the sealing member. Each of the plurality of pixels includes an oxide semiconductor TFT (5) provided in one substrate (10) of the pair of substrates; and a pixel electrode (19) provided in the one substrate and connected with the oxide semiconductor TFT. Each of the plurality of pixels is configured such that when the oxide semiconductor TFT is switched from an on-state to an off-state, a level of a voltage to be applied to the liquid crystal layer by use of the pixel electrode is shifted in a negative direction by a pull-in voltage ΔVd. A pull-in voltage ΔVd1 in a first pixel (P1) among the plurality of pixels is lower than a pull-in voltage ΔVd2 in a second pixel (P2) located farther from the sealing member than the first pixel.
摘要翻译：液晶面板（100）包括一对基板（10,30）; 设置在所述一对基板之间的液晶层（40）以及设置成围绕液晶层的密封构件（42）。在由密封构件包围的区域中以矩阵形式设置多个像素（P1，P2）。所述多个像素中的每一个包括设置在所述一对基板的一个基板（10）中的氧化物半导体TFT（5）以及设置在所述一个基板中并与所述氧化物半导体TFT连接的像素电极（19）。多个像素中的每一个被配置为使得当氧化物半导体TFT从导通状态切换到断开状态时，通过使用像素电极施加到液晶层的电压的电平在通过引入电压ΔVd的负方向。多个像素中的第一像素（P1）中的吸入电压ΔVd1低于位于比第一像素更远离密封构件的第二像素（P2）中的引入电压ΔVd2。

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