专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08315132B1 Defect detection design 有权
标题翻译：缺陷检测设计
公开(公告)号：US08315132B1
公开(公告)日：2012-11-20
申请号：US13235658
申请日：2011-09-19
申请人： Shaohua Yang , Hongwei Song , Zining Wu , Xueshi Yang , Hongxin Song
发明人： Shaohua Yang , Hongwei Song , Zining Wu , Xueshi Yang , Hongxin Song
IPC分类号： G11B15/52
CPC分类号： G11B20/10009 , G11B20/10046 , G11B20/10296 , G11B20/1816
摘要： A system and method are provided to detect defects in a data storage medium by sampling data read from the data storage medium. Time referenced samples of data read from the data storage medium are equalized to mediate the effects of channel noise and the equalized samples are decoded by a decoder, such as a Viterbi decoder. The decoded signal is then reconstructed through a reconstruction filter to approximate the equalized signal. The equalized data signal and the reconstructed data signal are then combined and compared in a bit-by-bit deconstruction scheme to determine, based on a variation between the signal elements, that a defect exists on the data storage medium. Additional action is then taken to mediate the effects of attempting to process corrupted data based on the defect by isolating the defective bit.
摘要翻译：提供了一种系统和方法，用于通过对从数据存储介质读取的数据进行采样来检测数据存储介质中的缺陷。将从数据存储介质读取的数据的时间参考样本相等以调解信道噪声的影响，并且均衡样本由诸如维特比解码器之类的解码器解码。然后通过重建滤波器重建经解码的信号以近似均衡的信号。然后将均衡的数据信号和重建的数据信号以逐位解构方案进行组合和比较，以基于信号元素之间的变化来确定数据存储介质上存在缺陷。然后采取额外的行动来通过隔离有缺陷的位来调解基于缺陷来处理被破坏的数据的效果。

2. 发明授权

US08054717B1 Defect detection design 有权
标题翻译：缺陷检测设计
公开(公告)号：US08054717B1
公开(公告)日：2011-11-08
申请号：US11907676
申请日：2007-10-16
申请人： Shaohua Yang , Hongwei Song , Zining Wu , Xueshi Yang , Hongxin Song
发明人： Shaohua Yang , Hongwei Song , Zining Wu , Xueshi Yang , Hongxin Song
IPC分类号： G11B15/52
CPC分类号： G11B20/10009 , G11B20/10046 , G11B20/10296 , G11B20/1816
摘要： A system and method are provided to detect defects in a data storage medium by sampling data read from the data storage medium. Time referenced samples of data read from the data storage medium are equalized to mediate the effects of channel noise and the equalized samples are decoded by a decoder, such as a Viterbi decoder. The decoded signal is then reconstructed through a reconstruction filter to approximate the equalized signal. The equalized data signal and the reconstructed data signal are then combined and compared in a bit-by-bit deconstruction scheme to determine, based on a variation between the signal elements, that a defect exists on the data storage medium. Additional action is then taken to mediate the effects of attempting to process corrupted data based on the defect by isolating the defective bit.
摘要翻译：提供了一种系统和方法，用于通过对从数据存储介质读取的数据进行采样来检测数据存储介质中的缺陷。将从数据存储介质读取的数据的时间参考样本相等以调解信道噪声的影响，并且均衡样本由诸如维特比解码器之类的解码器解码。然后通过重建滤波器重建经解码的信号以近似均衡的信号。然后将均衡的数据信号和重建的数据信号以逐位解构方案进行组合和比较，以基于信号元素之间的变化来确定数据存储介质上存在缺陷。然后采取额外的行动来通过隔离有缺陷的位来调解基于缺陷来处理被破坏的数据的效果。

3. 发明授权

US09048879B1 Error correction system using an iterative product code 有权
标题翻译：纠错系统使用迭代产品代码
公开(公告)号：US09048879B1
公开(公告)日：2015-06-02
申请号：US13586710
申请日：2012-08-15
申请人： Shaohua Yang , Zining Wu , Gregory Burd , Xueshi Yang , Hongwei Song , Nedeljko Varnica
发明人： Shaohua Yang , Zining Wu , Gregory Burd , Xueshi Yang , Hongwei Song , Nedeljko Varnica
IPC分类号： H03M13/29 , H04L1/00
CPC分类号： H03M13/2945 , H03M13/098 , H03M13/1102 , H03M13/1515 , H03M13/23 , H03M13/2909 , H03M13/2957 , H03M13/3746 , H04L1/0065
摘要： An error correction system includes an iterative code that employs an interleaved component code and an embedded parity component code. In some embodiments, on the transmission side, input signals received at an input node are encoded based on the interleaved code, which encodes an interleaved version of the input data to produce a first set of codewords. At least a portion of the first set of codewords preferably is divided into a plurality of symbols which are encoded based on the embedded parity code to provide encoded data. Similarly, in some embodiments, on the receiving side, received data are detected to produce detected information and soft outputs. The detected information is decoded based on the embedded parity code to obtain decoded information. The decoded information preferably is used, together with other soft information, by an interleaved decoder to generate reliability metrics for biasing a subsequent decoding iteration.
摘要翻译：纠错系统包括使用交织分量代码和嵌入奇偶校验分量代码的迭代代码。在一些实施例中，在传输侧，在输入节点处接收的输入信号基于交织的代码进行编码，该代码编码输入数据的交错版本以产生第一组码字。第一组码字的至少一部分优选地被划分为多个符号，这些符号基于嵌入的奇偶校验码被编码以提供编码数据。类似地，在一些实施例中，在接收侧，检测所接收的数据以产生检测到的信息和软输出。检测到的信息根据嵌入的奇偶校验码进行解码以获得解码的信息。解码的信息优选地与其他软信息一起被交织的解码器使用以产生用于偏置随后的解码迭代的可靠性度量。

4. 发明授权

US08255763B1 Error correction system using an iterative product code 有权
标题翻译：纠错系统使用迭代产品代码
公开(公告)号：US08255763B1
公开(公告)日：2012-08-28
申请号：US11937389
申请日：2007-11-08
申请人： Shaohua Yang , Zining Wu , Gregory Burd , Xueshi Yang , Hongwei Song , Nedeljko Varnica
发明人： Shaohua Yang , Zining Wu , Gregory Burd , Xueshi Yang , Hongwei Song , Nedeljko Varnica
IPC分类号： H03M13/00
CPC分类号： H03M13/2945 , H03M13/098 , H03M13/1102 , H03M13/1515 , H03M13/23 , H03M13/2909 , H03M13/2957 , H03M13/3746 , H04L1/0065
摘要： An error correction system includes an iterative code that employs an interleaved component code and an embedded parity component code. On the transmission side, input signals received at an input node are encoded based on the interleaved code, which encodes an interleaved version of the input data to produce a first set of codewords. A portion of the first set of codewords is divided into a plurality of symbols which are encoded based on the embedded parity code. On the receiving side, received data are detected to produce detected information and soft outputs. The detected information is decoded based on the embedded parity code to obtain decoded information. The decoded information is used with other soft information by an interleaved decoder to generate reliability metrics for biasing a subsequent decoding iteration.
摘要翻译：纠错系统包括使用交织分量代码和嵌入奇偶校验分量代码的迭代代码。在发送侧，在输入节点处接收的输入信号基于交织代码进行编码，该代码对输入数据的交织版本进行编码以产生第一组码字。第一组码字的一部分被分成多个符号，这些符号是基于嵌入的奇偶校验码进行编码的。在接收侧，检测接收到的数据以产生检测信息和软输出。检测到的信息根据嵌入的奇偶校验码进行解码以获得解码的信息。经解码的信息与交织的解码器的其他软信息一起使用以产生用于偏置随后的解码迭代的可靠性度量。

5. 发明授权

US08090059B1 Multi-viterbi receive channel decoder 有权
标题翻译：多维特比接收信道解码器
公开(公告)号：US08090059B1
公开(公告)日：2012-01-03
申请号：US11799488
申请日：2007-05-01
申请人： Hongwei Song , Zining Wu , Shaohua Yang
发明人： Hongwei Song , Zining Wu , Shaohua Yang
IPC分类号： H03D1/00 , H04L27/06
CPC分类号： H04L1/0054 , G11B20/1803 , H03M13/3746 , H03M13/41 , H03M13/6343
摘要： A detector includes Viterbi detectors. A first Viterbi detector generates a preliminary decision signal. A second Viterbi detector generates a final decision signal based on an input data signal and the preliminary decision signal. The second Viterbi detector is arranged in series with the first Viterbi detector.
摘要翻译：检测器包括维特比检测器。第一维特比检测器产生初步判定信号。第二维特比检测器基于输入数据信号和初步判定信号产生最终判定信号。第二维特比检测器与第一维特比检测器串联布置。

6. 发明授权

US08027378B1 Circuits, architectures, apparatuses, systems, algorithms and methods and software for amplitude drop detection 有权
标题翻译：用于幅度下降检测的电路，架构，设备，系统，算法和方法以及软件
公开(公告)号：US08027378B1
公开(公告)日：2011-09-27
申请号：US11818079
申请日：2007-06-12
申请人： Shaohua Yang , Hongwei Song , Zining Wu
发明人： Shaohua Yang , Hongwei Song , Zining Wu
IPC分类号： H04B3/46 , H04B17/00 , H04Q1/20
CPC分类号： H04B3/46 , H04L1/0054 , H04L1/20
摘要： Methods, circuits, systems, and networks for detecting an amplitude drop in an incoming signal. The methods generally comprise sampling the incoming signal at regular intervals to produce a plurality of sample values, producing a plurality of drop flags in response to the plurality of sample values, and detecting the amplitude drop in response to at least two of the drop flags. The circuits generally comprise a sampling circuit configured to produce a sample signal in response to the incoming signal, a threshold circuit configured to receive the sample signal and to produce a drop flag signal in response to the sample signal, and a drop detection circuit configured to produce an amplitude drop signal in response to at least two values of the drop flag signal. The systems and networks generally comprise the present circuits and/or any circuit embodying the inventive concepts described herein. The present invention advantageously provides for detection of amplitude drops in an incoming signal, operating in the digital (rather than analog) domain. Embodiments of the present invention also reduce the incidence of “false positives” due to transient low amplitudes. Correct detection of amplitude drops can improve the accuracy of signal decoders.
摘要翻译：用于检测输入信号中的幅度下降的方法，电路，系统和网络。所述方法通常包括以规则的间隔对输入信号进行采样以产生多个采样值，响应于多个采样值产生多个下降标志，以及响应于至少两个下降标志来检测幅度下降。电路通常包括采样电路，其被配置为响应于输入信号产生采样信号;阈值电路，被配置为接收采样信号并响应于采样信号产生降幅标志信号;以及丢弃检测电路，被配置为响应于液滴标志信号的至少两个值产生幅度下降信号。系统和网络通常包括本发明的电路和/或体现本文所描述的发明概念的任何电路。本发明有利地提供了在数字（而不是模拟）域中操作的输入信号中的幅度下降的检测。本发明的实施例还降低了由于瞬时低振幅引起的“假阳性”的发生率。正确检测幅度可以提高信号解码器的精度。

7. 发明授权

US08594246B1 Multi-Viterbi receive channel decoder 有权
标题翻译：多维特比接收信道解码器
公开(公告)号：US08594246B1
公开(公告)日：2013-11-26
申请号：US13335267
申请日：2011-12-22
申请人： Hongwei Song , Zining Wu , Shaohua Yang
发明人： Hongwei Song , Zining Wu , Shaohua Yang
IPC分类号： H03D1/00 , H04L27/06
CPC分类号： H04L1/0054 , G11B20/1803 , H03M13/3746 , H03M13/41 , H03M13/6343
摘要： A circuit includes a first Viterbi detector configured to generate a first estimate signal based on an equalized signal. The first estimate signal includes preliminary non-return-to-zero data estimates. A first filter is configured to generate a first filtered signal based on a preliminary decision signal. The preliminary decision signal is generated based on the first estimate signal. A second Viterbi detector is in communication with the first Viterbi detector. The second Viterbi detector is configured to generate a final decision signal based on a sum of (i) a delayed version of the equalized signal, and (ii) the first filtered signal, wherein the final decision signal comprises final non-return-to-zero estimates.
摘要翻译：电路包括第一维特比检测器，其经配置以基于均衡信号产生第一估计信号。第一个估计信号包括初步的无归零数据估计。第一滤波器被配置为基于初步判定信号产生第一滤波信号。基于第一估计信号产生初步判定信号。第二维特比检测器与第一维特比检测器通信。第二维特比检测器被配置为基于（i）均衡信号的延迟版本和（ii）第一滤波信号的和产生最终判定信号，其中最终判决信号包括最终的不返回 - 零估计。

8. 发明授权

US08413032B1 Read channel detector for noise cancellation 有权
标题翻译：读通道检测器用于噪声消除
公开(公告)号：US08413032B1
公开(公告)日：2013-04-02
申请号：US13219917
申请日：2011-08-29
申请人： Hongwei Song , Zining Wu
发明人： Hongwei Song , Zining Wu
IPC分类号： H03M13/03
CPC分类号： G11B20/1866 , G11B20/10009 , G11B20/10027 , G11B20/10037 , G11B20/10203 , G11B20/10361 , G11B20/1833 , G11B2220/2516 , H03M13/3746 , H03M13/41 , H03M13/6343 , H04L1/0047 , H04L1/0054 , H04L25/067
摘要： A channel decoder including an amplifier configured to amplify a signal; a first summer configured to generate an output signal based on the signal amplified by the amplifier; and a Viterbi detector module configured to, based on the output signal, generate a first estimate signal and a second estimate signal, wherein the first estimate signal and the second estimate signal respectively indicate an estimate of data in the signal. The channel decoder further includes a second summer configured to generate a first error signal indicating a first gradient based on the first estimate signal; and a third summer configured to generate a second error signal indicating a second error gradient based on the second estimate signal. The first summer is configured to generate the output signal based on (i) the first error signal and (ii) the second error signal.
摘要翻译：一种信道解码器，包括被配置为放大信号的放大器; 第一加法器，配置为基于由放大器放大的信号产生输出信号; 以及维特比检测器模块，被配置为基于所述输出信号产生第一估计信号和第二估计信号，其中所述第一估计信号和所述第二估计信号分别指示所述信号中的数据的估计。信道解码器还包括第二加法器，配置为基于第一估计信号产生指示第一梯度的第一误差信号; 以及第三加法器，被配置为基于所述第二估计信号产生指示第二误差梯度的第二误差信号。第一夏季被配置为基于（i）第一误差信号和（ii）第二误差信号来生成输出信号。

9. 发明授权

US08010883B1 Read channel detector for noise cancellation 有权
标题翻译：读通道检测器用于噪声消除
公开(公告)号：US08010883B1
公开(公告)日：2011-08-30
申请号：US11784291
申请日：2007-04-06
申请人： Hongwei Song , Zining Wu
发明人： Hongwei Song , Zining Wu
IPC分类号： H03M13/03
CPC分类号： G11B20/1866 , G11B20/10009 , G11B20/10027 , G11B20/10037 , G11B20/10203 , G11B20/10361 , G11B20/1833 , G11B2220/2516 , H03M13/3746 , H03M13/41 , H03M13/6343 , H04L1/0047 , H04L1/0054 , H04L25/067
摘要： A detector includes a Viterbi module that generates a first preliminary data estimate signal and a second preliminary data estimate signal based on a received data signal. A first loop generates a first error signal based on said first preliminary data estimate signal. A second loop generates a second error signal based on the second preliminary data estimate signal.
摘要翻译：检测器包括维特比模块，其基于接收的数据信号产生第一初步数据估计信号和第二初步数据估计信号。第一循环基于所述第一初步数据估计信号产生第一误差信号。第二循环基于第二初步数据估计信号产生第二误差信号。

10. 发明授权

US08441752B1 Dibit pulse extraction methods and systems 有权
标题翻译： Dibit脉冲提取方法和系统
公开(公告)号：US08441752B1
公开(公告)日：2013-05-14
申请号：US11844090
申请日：2007-08-23
申请人： Hongwei Song , Zining Wu , Toai Doan
发明人： Hongwei Song , Zining Wu , Toai Doan
IPC分类号： G11B5/09
CPC分类号： G11B20/10277 , G11B20/10462 , G11B2220/2516
摘要： A receiving device may be configured to derive an oversampled dibit pulse response estimate using symbols sampled at substantially the read channel symbol rate of the receiving device. The receiving device may include a data acquisition circuit configured to digitize data derived from a memory medium, as well as a dibit pulse estimation circuit configured to estimate the oversampled dibit pulse response using symbols sampled at the read channel rate of the receiving device.
摘要翻译：接收设备可以被配置为使用在接收设备的基本读取的信道符号率处采样的符号来导出过采样的双位脉冲响应估计。接收装置可以包括数据获取电路，其被配置为数字化从存储介质导出的数据，以及双向脉冲估计电路，其被配置为使用在接收装置的读取信道速率采样的符号来估计过采样的双脉冲响应。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式