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1. 发明授权

US08222122B2 Method of forming nonvolatile memory device 有权
标题翻译：形成非易失性存储器件的方法
公开(公告)号：US08222122B2
公开(公告)日：2012-07-17
申请号：US12725885
申请日：2010-03-17
申请人： Seungmok Shin , Soodoo Chae , JinGyun Kim
发明人： Seungmok Shin , Soodoo Chae , JinGyun Kim
IPC分类号： H01L21/20
CPC分类号： H01L27/11568 , H01L27/11578 , H01L27/11582
摘要： Provided is a method of forming a nonvolatile memory device. The method may include alternatingly stacking n number of dielectric layers and n number of conductive layers on a substrate, forming a non-photosensitive pattern on the alternatingly stacked dielectric layers and conductive layers, etching the i-th conductive layer and i-th dielectric (2≦i≦n, i is a natural number indicating a stacking order of the conductive layers and the dielectric layers) by using the non-photosensitive pattern as an etch mask, laterally etching a sidewall of the non-photosensitive pattern and etching the i-th conductive layer, (i−1)-th conductive layer, i-th dielectric layer and (i−1)-th dielectric layer by using the etched non-photosensitive pattern as an etch mask.
摘要翻译：提供一种形成非易失性存储器件的方法。该方法可以包括在衬底上交替堆叠n个电介质层和n个导电层，在交替堆叠的电介质层和导电层上形成非感光图案，蚀刻第i导电层和第i电介质 2＆nlE; i＆nlE; n，i是表示导电层和电介质层的堆叠顺序的自然数），通过使用非感光图案作为蚀刻掩模，横向蚀刻非感光图案的侧壁并蚀刻i （i-1）导电层，第i电介质层和第（i-1）介质层，通过使用蚀刻的非感光图案作为蚀刻掩模。

2. 发明授权

US09293335B2 Method of fabricating semiconductor device 有权
公开(公告)号：US09293335B2
公开(公告)日：2016-03-22
申请号：US13912441
申请日：2013-06-07
申请人： JinGyun Kim , Myoungbum Lee , Seungmok Shin
发明人： JinGyun Kim , Myoungbum Lee , Seungmok Shin
IPC分类号： H01L21/28 , H01L27/115 , H01L29/66 , H01L29/788 , H01L29/792
CPC分类号： H01L27/1157 , H01L21/28282 , H01L23/5226 , H01L27/11521 , H01L27/11556 , H01L27/11568 , H01L27/11582 , H01L29/66825 , H01L29/66833 , H01L29/7881 , H01L29/792 , H01L29/7926 , H01L2924/0002 , H01L2924/00
摘要： A method of fabricating a semiconductor device including forming a charge storage layer, and forming a first tunnel insulating layer covering the charge storage layer, the forming of the first tunnel insulating layer including heat treating the charge storage layer.

3. 发明授权

US08008722B2 Multi-layer nonvolatile memory devices having vertical charge storage regions 有权
标题翻译：具有垂直电荷存储区域的多层非易失性存储器件
公开(公告)号：US08008722B2
公开(公告)日：2011-08-30
申请号：US12641666
申请日：2009-12-18
申请人： JinGyun Kim , Seungmok Shin , Chae Soodoo , Seung-Yup Lee
发明人： JinGyun Kim , Seungmok Shin , Chae Soodoo , Seung-Yup Lee
IPC分类号： H01L27/01 , H01L21/4763
CPC分类号： H01L27/11551 , H01L27/0688 , H01L27/11548 , H01L27/11556 , H01L27/11575 , H01L27/11578 , H01L27/11582 , H01L29/42332 , H01L29/7881 , H01L29/792 , H01L29/7926
摘要： Some embodiments of the present invention provide nonvolatile memory devices including a plurality of intergate insulating patterns and a plurality of cell gate patterns that are alternately and vertically stacked on a substrate, an active pattern disposed on the substrate, the active pattern extending upwardly along sidewalls of the intergate insulating patterns and the cell gate patterns, a plurality of charge storage patterns disposed between the plurality of cell gate patterns and the active pattern, respectively, the plurality of the charge storage patterns being separated from each other, tunnel insulating patterns disposed between the plurality of cell gate patterns and the active pattern, respectively, and the tunnel insulating patterns extending to be directly connected to each other and a plurality of blocking insulating patterns disposed between the plurality of cell gate patterns and the plurality of charge storage patterns, respectively. A sidewall of the cell gate pattern may be recessed laterally so that an undercut region is defined and the charge storage pattern is disposed in the undercut region.
摘要翻译：本发明的一些实施例提供了非易失性存储器件，其包括多个栅极绝缘图案和交替地和垂直地堆叠在衬底上的多个单元栅极图案，设置在衬底上的有源图案，有源图案沿着栅间绝缘图案和单元栅极图案，分别设置在多个单元栅极图案和有源图案之间的多个电荷存储图案，多个电荷存储图案彼此分离，隧道绝缘图案布置在多个单元栅极图案和有源图案，以及延伸成彼此直接连接的隧道绝缘图案，以及分别设置在多个单元栅极图案和多个电荷存储图案之间的多个隔离绝缘图案。电池栅极图案的侧壁可以侧向凹入，从而限定底切区域，并且电荷存储图案设置在底切区域中。

4. 发明申请

US20100155810A1 MULTI-LAYER NONVOLATILE MEMORY DEVICES HAVING VERTICAL CHARGE STORAGE REGIONS 有权
标题翻译：具有垂直充电存储区域的多层非易失性存储器件
公开(公告)号：US20100155810A1
公开(公告)日：2010-06-24
申请号：US12641666
申请日：2009-12-18
申请人： JinGyun Kim , Seungmok Shin , Chae Soodoo , Seung-Yup Lee
发明人： JinGyun Kim , Seungmok Shin , Chae Soodoo , Seung-Yup Lee
IPC分类号： H01L29/788
CPC分类号： H01L27/11551 , H01L27/0688 , H01L27/11548 , H01L27/11556 , H01L27/11575 , H01L27/11578 , H01L27/11582 , H01L29/42332 , H01L29/7881 , H01L29/792 , H01L29/7926
摘要： Some embodiments of the present invention provide nonvolatile memory devices including a plurality of intergate insulating patterns and a plurality of cell gate patterns that are alternately and vertically stacked on a substrate, an active pattern disposed on the substrate, the active pattern extending upwardly along sidewalls of the intergate insulating patterns and the cell gate patterns, a plurality of charge storage patterns disposed between the plurality of cell gate patterns and the active pattern, respectively, the plurality of the charge storage patterns being separated from each other, tunnel insulating patterns disposed between the plurality of cell gate patterns and the active pattern, respectively, and the tunnel insulating patterns extending to be directly connected to each other and a plurality of blocking insulating patterns disposed between the plurality of cell gate patterns and the plurality of charge storage patterns, respectively. A sidewall of the cell gate pattern may be recessed laterally so that an undercut region is defined and the charge storage pattern is disposed in the undercut region.
摘要翻译：本发明的一些实施例提供了非易失性存储器件，其包括多个栅极绝缘图案和交替地和垂直地堆叠在衬底上的多个单元栅极图案，设置在衬底上的有源图案，有源图案沿着栅间绝缘图案和单元栅极图案，分别设置在多个单元栅极图案和有源图案之间的多个电荷存储图案，多个电荷存储图案彼此分离，隧道绝缘图案布置在多个单元栅极图案和有源图案，以及延伸成彼此直接连接的隧道绝缘图案，以及分别设置在多个单元栅极图案和多个电荷存储图案之间的多个隔离绝缘图案。电池栅极图案的侧壁可以侧向凹入，从而限定底切区域，并且电荷存储图案设置在底切区域中。

5. 发明申请

US20120064682A1 Methods of Manufacturing Three-Dimensional Semiconductor Memory Devices 审中-公开
标题翻译：制造三维半导体存储器件的方法
公开(公告)号：US20120064682A1
公开(公告)日：2012-03-15
申请号：US13230447
申请日：2011-09-12
申请人： Kyung-Tae Jang , Myoung Lee , Seungmok Shin , JinGyun Kim , Yeon-Sil Sohn , Seung-Yuo Lee , Dae-Hun Choi
发明人： Kyung-Tae Jang , Myoung Lee , Seungmok Shin , JinGyun Kim , Yeon-Sil Sohn , Seung-Yuo Lee , Dae-Hun Choi
IPC分类号： H01L21/8239
CPC分类号： H01L21/8239 , H01L21/02164 , H01L21/0217 , H01L21/02271 , H01L21/31111 , H01L27/11551 , H01L27/11556 , H01L27/11565 , H01L27/11578 , H01L27/11582 , H01L29/40114 , H01L29/40117
摘要： Methods of manufacturing a three-dimensional semiconductor device are provided. The method includes: forming a thin film structure, where first and second material layers of at least 2n (n is an integer more than 2) are alternately and repeatedly stacked, on a substrate; wherein the first material layer applies a stress in a range of about 0.1×109 dyne/cm2 to about 10×109 dyne/cm2 to the substrate and the second material layer applies a stress in a range of about −0.1×109 dyne/cm2 to about −10×109 dyne/cm2 to the substrate.
摘要翻译：提供制造三维半导体器件的方法。该方法包括：在基板上形成薄膜结构，其中至少2n（n是大于2的整数）的第一和第二材料层交替重复堆叠; 其中所述第一材料层向所述基板施加约0.1×10 9达因/ cm 2至约10×10 9达因/ cm 2的范围内的应力，并且所述第二材料层施加约-0.1×109达因/ cm2的范围内的应力至约-10×109达因/平方厘米。

6. 发明申请

US20150126007A1 Methods of Manufacturing Three-Dimensional Semiconductor Memory Devices 审中-公开
标题翻译：制造三维半导体存储器件的方法
公开(公告)号：US20150126007A1
公开(公告)日：2015-05-07
申请号：US14593221
申请日：2015-01-09
申请人： Kyung-Tae Jang , Myoungbum Lee , Seungmok Shin , JinGyun Kim , Yeon-Sil Sohn , Seung-Yup Lee , Dae-Hun Choi
发明人： Kyung-Tae Jang , Myoungbum Lee , Seungmok Shin , JinGyun Kim , Yeon-Sil Sohn , Seung-Yup Lee , Dae-Hun Choi
IPC分类号： H01L27/115 , H01L21/311 , H01L21/02
CPC分类号： H01L21/8239 , H01L21/02164 , H01L21/0217 , H01L21/02271 , H01L21/28273 , H01L21/28282 , H01L21/31111 , H01L27/11551 , H01L27/11556 , H01L27/11565 , H01L27/11578 , H01L27/11582
摘要： Methods of manufacturing a three-dimensional semiconductor device are provided. The method includes: forming a thin film structure, where first and second material layers of at least 2n (n is an integer more than 2) are alternately and repeatedly stacked, on a substrate; wherein the first material layer applies a stress in a range of about 0.1×109 dyne/cm2 to about 10×109 dyne/cm2 to the substrate and the second material layer applies a stress in a range of about −0.1×109 dyne/cm2 to about −10×109 dyne/cm2 to the substrate.
摘要翻译：提供制造三维半导体器件的方法。该方法包括：在基板上形成薄膜结构，其中至少2n（n是大于2的整数）的第一和第二材料层交替重复堆叠; 其中所述第一材料层向所述基板施加约0.1×10 9达因/ cm 2至约10×10 9达因/ cm 2的范围内的应力，并且所述第二材料层施加约-0.1×109达因/ cm2的范围内的应力至约-10×109达因/平方厘米。

7. 发明授权

US08460998B2 Method of fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08460998B2
公开(公告)日：2013-06-11
申请号：US12654881
申请日：2010-01-07
申请人： JinGyun Kim , Myoungbum Lee , Seungmok Shin
发明人： JinGyun Kim , Myoungbum Lee , Seungmok Shin
IPC分类号： H01L21/336 , H01L21/3205
CPC分类号： H01L27/1157 , H01L21/28282 , H01L23/5226 , H01L27/11521 , H01L27/11556 , H01L27/11568 , H01L27/11582 , H01L29/66825 , H01L29/66833 , H01L29/7881 , H01L29/792 , H01L29/7926 , H01L2924/0002 , H01L2924/00
摘要： A method of fabricating a semiconductor device including forming a charge storage layer, and forming a first tunnel insulating layer covering the charge storage layer, the forming of the first tunnel insulating layer including heat treating the charge storage layer.
摘要翻译：一种制造半导体器件的方法，包括形成电荷存储层，以及形成覆盖电荷存储层的第一隧道绝缘层，形成包括对电荷存储层进行热处理的第一隧道绝缘层。

8. 发明申请

US20100178759A1 Method of fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20100178759A1
公开(公告)日：2010-07-15
申请号：US12654881
申请日：2010-01-07
申请人： JinGyun Kim , Myoungbum Lee , Seungmok Shin
发明人： JinGyun Kim , Myoungbum Lee , Seungmok Shin
IPC分类号： H01L21/28
CPC分类号： H01L27/1157 , H01L21/28282 , H01L23/5226 , H01L27/11521 , H01L27/11556 , H01L27/11568 , H01L27/11582 , H01L29/66825 , H01L29/66833 , H01L29/7881 , H01L29/792 , H01L29/7926 , H01L2924/0002 , H01L2924/00
摘要： A method of fabricating a semiconductor device including forming a charge storage layer, and forming a first tunnel insulating layer covering the charge storage layer, the forming of the first tunnel insulating layer including heat treating the charge storage layer.
摘要翻译：一种制造半导体器件的方法，包括形成电荷存储层，以及形成覆盖电荷存储层的第一隧道绝缘层，形成包括对电荷存储层进行热处理的第一隧道绝缘层。

9. 发明申请

US20120050186A1 TYPE TOUCH SCREEN PANEL 有权
标题翻译：类型触摸屏面板
公开(公告)号：US20120050186A1
公开(公告)日：2012-03-01
申请号：US12961101
申请日：2010-12-06
申请人： Youngjin YI , Seungmok Shin , Sohaeng Cho , Dongsup Kim , Sohyung Lee
发明人： Youngjin YI , Seungmok Shin , Sohaeng Cho , Dongsup Kim , Sohyung Lee
IPC分类号： G06F3/041
CPC分类号： G06F3/044
摘要： A capacitive touch screen panel includes according to an embodiment a substrate, a plurality of first electrode serials arranged in a first direction on the substrate, a plurality of second electrode serials arranged in a second direction to intersect the first electrode serials, and a plurality of insulation patterns formed at intersections of the first electrode serials and the second electrode serials and electrically insulating the first electrode serials from the second electrode serials. Each of the plurality of first electrode serials includes a plurality of first electrode patterns which are separated from each other, and first connection patterns which are formed under the insulation patterns and electrically connect the neighboring first electrode patterns to each other. In addition, each of the plurality of insulation patterns has a protrusion part formed between the first electrode patterns and the second electrode patterns.
摘要翻译：电容式触摸屏面板包括根据实施例的衬底，在衬底上沿第一方向布置的多个第一电极序列，沿与第一电极序列相交的第二方向布置的多个第二电极序列，以及多个在第一电极串联和第二电极的交叉处形成的绝缘图案串联并将第一电极序列与第二电极序列电绝缘。多个第一电极串联中的每一个包括彼此分离的多个第一电极图案，以及形成在绝缘图案下方并将相邻的第一电极图案彼此电连接的第一连接图案。此外，多个绝缘图案中的每一个具有形成在第一电极图案和第二电极图案之间的突起部分。

10. 发明授权

US08283719B2 Nonvolatile memory device having a fixed charge layer 有权
标题翻译：具有固定电荷层的非易失性存储器件
公开(公告)号：US08283719B2
公开(公告)日：2012-10-09
申请号：US12894615
申请日：2010-09-30
申请人： ZongLiang Huo , Myoungbum Lee , Kihyun Hwang , Seungmok Shin , Sunjung Kim
发明人： ZongLiang Huo , Myoungbum Lee , Kihyun Hwang , Seungmok Shin , Sunjung Kim
IPC分类号： H01L29/792 , H01L29/788 , H01L29/76
CPC分类号： H01L27/11578 , H01L27/11551 , H01L27/11556 , H01L29/66825 , H01L29/66833 , H01L29/7883 , H01L29/792 , H01L29/7926
摘要： Provided are a nonvolatile memory device and a method for fabricating the same. The nonvolatile memory device may include a stacked structure, a semiconductor pattern, an information storage layer, and a fixed charge layer. The stacked structure may be disposed over a semiconductor substrate. The stacked structure may include conductive patterns and interlayer dielectric patterns alternately stacked therein. The semiconductor pattern may be connected to the semiconductor substrate by passing through the stacked structure. The information storage layer may be disposed between the semiconductor pattern and the conductive patterns. The fixed charge layer may be disposed between the semiconductor pattern and the interlayer dielectric pattern. The fixed charge layer may include fixed charges. Electrical polarity of the fixed charges may be equal to electrical polarity of majority carriers of the semiconductor pattern.
摘要翻译：提供一种非易失性存储器件及其制造方法。非易失性存储器件可以包括堆叠结构，半导体图案，信息存储层和固定电荷层。层叠结构可以设置在半导体衬底上。层叠结构可以包括交替堆叠在其中的导电图案和层间电介质图案。半导体图案可以通过层叠结构连接到半导体衬底。信息存储层可以设置在半导体图案和导电图案之间。固定电荷层可以设置在半导体图案和层间电介质图案之间。固定电荷层可以包括固定电荷。固定电荷的电极性可以等于半导体图案的多数载流子的电极性。

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