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    • 3. 发明授权
    • Simultaneous bi-directional signal transmission system and semiconductor device therefor
    • 同时双向信号传输系统及其半导体装置
    • US06930513B2
    • 2005-08-16
    • US10713533
    • 2003-11-13
    • Jin-hyun KimJung-hwan Choi
    • Jin-hyun KimJung-hwan Choi
    • G11C7/10H01L21/8238H03K19/00H04L5/14
    • H04L5/1423
    • A simultaneous bi-directional signal transmission system includes a first semiconductor device, a second semiconductor device, and one or more transmission lines. The first semiconductor device includes a first output MUX which receives first binary data and converts the first binary data into a first signal having one of at least four levels; a first transmitter which is connected to the first output MUX and outputs the first signal via the transmission line to the second semiconductor device; a first receiver which compares one or more reference voltages selected by the first signal with a third signal input via the transmission line and outputs the comparison result; and a first input encoder which detects the second binary data based on the comparison result output from the first receiver. The second semiconductor device includes a second output MUX which receives second binary data and converts the second binary data into a second signal having one of at least four levels; a second transmitter which is connected to the second output MUX and outputs the second signal via the transmission line to the first semiconductor device; a second receiver which compares one or more reference voltages selected by the second signal with the third signal input via the transmission line and outputs the comparison result; and a second input encoder which detects the first binary data based on the comparison result output from the second receiver.
    • 同时双向信号传输系统包括第一半导体器件,第二半导体器件和一个或多个传输线。 第一半导体器件包括第一输出MUX,其接收第一二进制数据并将第一二进制数据转换为具有至少四个电平之一的第一信号; 第一发送器,连接到第一输出MUX,并经由传输线将第一信号输出到第二半导体器件; 第一接收器,其将由所述第一信号选择的一个或多个参考电压与经由所述传输线输入的第三信号进行比较,并输出所述比较结果; 以及第一输入编码器,其基于从第一接收机输出的比较结果来检测第二二进制数据。 第二半导体器件包括第二输出MUX,其接收第二二进制数据并将第二二进制数据转换为具有至少四个电平之一的第二信号; 第二发送器,连接到第二输出MUX,并经由传输线将第二信号输出到第一半导体器件; 第二接收器,其将通过第二信号选择的一个或多个参考电压与经由传输线输入的第三信号进行比较,并输出比较结果; 以及第二输入编码器,其基于从第二接收器输出的比较结果来检测第一二进制数据。
    • 4. 发明申请
    • Input signal receiving device of semiconductor memory unit
    • 半导体存储单元的输入信号接收装置
    • US20050128841A1
    • 2005-06-16
    • US10919370
    • 2004-08-17
    • Jin-hyun Kim
    • Jin-hyun Kim
    • G11C7/10G11C7/00
    • G11C7/1084G11C7/1072G11C7/1078G11C7/1093G11C7/1096
    • A receiving device which may include a plurality of pre-amplifiers and a plurality of samplers. Each of the plurality of samplers is connected to the output ports of a corresponding pre-amplifier. Each sampler samples data signals input thereto in response to a corresponding clock signal. The receiving device of a semiconductor memory unit may reduce input capacitance seen from the outside of chip and eliminate mutual interference of signals so as to prevent errors from being generated when data is extracted in the event of over sampling using pre-amplifiers. Furthermore, the receiving device can separately control the pre-amplifier for samplers that receive clock signals for data alignment and the pre-amplifier for samplers that accept clock signals for repeated data reception.
    • 可以包括多个前置放大器和多个采样器的接收装置。 多个采样器中的每一个连接到相应的前置放大器的输出端口。 每个采样器响应于相应的时钟信号而对其输入的数据信号进行采样。 半导体存储单元的接收装置可以减少从芯片外部看到的输入电容,并消除信号的相互干扰,以便在使用前置放大器的过采样的情况下提取数据时防止产生错误。 此外,接收装置可以分别控制接收用于数据对准的时钟信号的采样器的前置放大器和用于接收用于重复数据接收的时钟信号的采样器的前置放大器。
    • 5. 发明授权
    • Low voltage differential signaling drivers including branches with series resistors
    • 低压差分信号驱动器,包括带串联电阻的分支
    • US07595661B2
    • 2009-09-29
    • US11295353
    • 2005-12-06
    • Jin-hyun Kim
    • Jin-hyun Kim
    • H03K19/0175H03B1/00H03K3/00
    • H04L25/028H04L5/16H04L25/0292
    • A low voltage differential signal driver includes first and second current sources, a first branch and a second branch. The first branch includes at least two transistors and at least two resistors between them that are all connected in series between the first and second current sources, to define a first node between adjacent resistors that is configured to transmit and receive differential signals. The second branch also includes at least two transistors and at least two resistors between them that also are all connected in series between the first and second current sources, to define a second node between adjacent resistors that is also configured to transmit and receive differential signals.
    • 低电压差分信号驱动器包括第一和第二电流源,第一分支和第二分支。 第一分支包括至少两个晶体管和它们之间的至少两个电阻器,其全部串联连接在第一和第二电流源之间,以限定被配置为发送和接收差分信号的相邻电阻器之间的第一节点。 第二分支还包括至少两个晶体管和它们之间的至少两个电阻器,其也全部串联连接在第一和第二电流源之间,以限定相邻电阻器之间的第二节点,其也被配置为发送和接收差分信号。
    • 6. 发明授权
    • Input signal receiving device of semiconductor memory unit
    • 半导体存储单元的输入信号接收装置
    • US07142462B2
    • 2006-11-28
    • US10919370
    • 2004-08-17
    • Jin-hyun Kim
    • Jin-hyun Kim
    • G11C7/10G11C8/00
    • G11C7/1084G11C7/1072G11C7/1078G11C7/1093G11C7/1096
    • A receiving device which may include a plurality of pre-amplifiers and a plurality of samplers. Each of the plurality of samplers is connected to the output ports of a corresponding pre-amplifier. Each sampler samples data signals input thereto in response to a corresponding clock signal. The receiving device of a semiconductor memory unit may reduce input capacitance seen from the outside of chip and eliminate mutual interference of signals so as to prevent errors from being generated when data is extracted in the event of over sampling using pre-amplifiers. Furthermore, the receiving device can separately control the pre-amplifier for samplers that receive clock signals for data alignment and the pre-amplifier for samplers that accept clock signals for repeated data reception.
    • 可以包括多个前置放大器和多个采样器的接收装置。 多个采样器中的每一个连接到相应的前置放大器的输出端口。 每个采样器响应于相应的时钟信号而对其输入的数据信号进行采样。 半导体存储单元的接收装置可以减少从芯片外部看到的输入电容,并消除信号的相互干扰,以便在使用前置放大器的过采样的情况下提取数据时防止产生错误。 此外,接收装置可以分别控制接收用于数据对准的时钟信号的采样器的前置放大器和用于接收用于重复数据接收的时钟信号的采样器的前置放大器。
    • 7. 发明授权
    • Print head of an ink-jet printer and fabrication method thereof
    • 喷墨打印机的打印头及其制造方法
    • US07018018B2
    • 2006-03-28
    • US10656243
    • 2003-09-08
    • Jin-hyun Kim
    • Jin-hyun Kim
    • B41J2/05
    • B41J2/1631B41J2/1603B41J2/1623B41J2/1626B41J2/1646
    • A print head of an ink-jet printer including a main chip area having at least one ink jetting portion disposed on a substrate to jet ink, and at least one bonding pad connected with a corresponding lead end of a wiring of a circuit part to control the ink jetting portion; and a scribe lane area disposed around the main chip area and forming a cutting region in which the main chip area is divided from main chip areas of other print heads by cutting, the scribe lane area having a damping pattern portion formed to be electrically and physically isolated from the main chip area and the substrate.
    • 一种喷墨打印机的打印头,包括:具有至少一个喷墨部分的主芯片区域,设置在基板上以喷射墨水;以及至少一个焊盘,其与电路部件的布线的相应引线端相连以控制 喷墨部分; 以及设置在主芯片区域周围的划线通道区域,并且形成切割区域,其中主芯片区域通过切割从其他打印头的主芯片区域分割,所述划线路区域具有形成为电和物理的阻尼图案部分 从主芯片区域和基板隔离。
    • 8. 发明授权
    • Ink-jet printhead and method of manufacturing the ink-jet printhead
    • 喷墨打印头和制造喷墨打印头的方法
    • US06890063B2
    • 2005-05-10
    • US10626884
    • 2003-07-25
    • Jin-hyun Kim
    • Jin-hyun Kim
    • B41J2/05B41J2/14B41J2/16B41J2/175B41J2/235
    • B41J2/1626B41J2/1404B41J2/14145B41J2/1603B41J2/1631B41J2/1635B41J2/17563B41J2002/14403
    • An ink-jet printhead and a method of manufacturing the same includes a substrate in which a manifold supplying ink is formed, a nozzle plate which is formed to be spaced-apart from the substrate by a predetermined gap and in which a nozzle through which ink is ejected is formed, a barrier wall which seals a space formed between the substrate and the nozzle plate to define an ink chamber filled with the ink to be ejected, an ink channel connected to the ink chamber, and an ink feed hole connecting the ink channel to the manifold, and an insulating layer which is formed on the substrate to form lower walls of the ink chamber, the ink channel, and the ink feed hole, where a heater generating bubbles by heating the ink filled in the ink chamber is formed on the lower walls of the ink chamber. The ink feed hole includes a plurality of through holes which perforate the insulating layer and through which the ink channel is connected to the manifold, and a plurality of posts which are formed on the insulating layer and support the nozzle plate.
    • 喷墨打印头及其制造方法包括其中形成有歧管供墨的基板,形成为与基板间隔开预定间隙的喷嘴板,喷嘴板中的墨水 被形成的阻挡壁,其密封形成在基板和喷嘴板之间的空间,以限定填充有要喷射的墨的墨室,连接到墨室的墨通道和连接墨的墨供给孔 并且形成在基板上以形成墨水室,墨水通道和供墨孔的下壁的绝缘层,其中通过加热填充在墨水室中的墨水而产生气泡的加热器被形成 在墨水室的下壁上。 供墨孔包括穿过绝缘层并且油墨通道与歧管连接的多个通孔,以及形成在绝缘层上并支撑喷嘴板的多个柱。
    • 9. 发明申请
    • FINITE IMPULSE RESPONSE (FIR) FILTER WITHOUT DECIMATION
    • 有限冲突响应(FIR)滤波器,不带十进制
    • US20090327793A1
    • 2009-12-31
    • US12355182
    • 2009-01-16
    • Jin-hyun KimJin-Soo ParkHyung-sun LimHan-Woong YooYoung-Eil KimBum-Man KimChang-Joon Park
    • Jin-hyun KimJin-Soo ParkHyung-sun LimHan-Woong YooYoung-Eil KimBum-Man KimChang-Joon Park
    • G06F17/10G06F1/06
    • H03H15/023
    • Provided is a discrete signal finite impulse response (FIR) filter and a filter set in which a plurality of FIR filter units are connected in a cascade structure to remove down-sampling by decimation, in order to improve the attenuation characteristics of a FIR filter, such as, for example, a switched capacitor filter. The FIR filter includes a clock generator generating a plurality of clock signals that are different from each other; and N+2 sub blocks each including N sample storage units, each sample storage unit storing a received sample. Each sub block being in a state among a number of possible states including N charging states for storing the received sample, a transfer state for outputting the stored sample and a reset state for operation initialization. The N charging states, the transfer state and the reset state are changed sequentially in response to the clock signals.
    • 提供了一种离散信号有限脉冲响应(FIR)滤波器和滤波器组,其中多个FIR滤波器单元以级联结构连接以通过抽取来去除下采样,以便提高FIR滤波器的衰减特性, 例如开关电容滤波器。 FIR滤波器包括产生彼此不同的多个时钟信号的时钟发生器; 和N + 2个子块,每个子块包括N个采样存储单元,每个采样存储单元存储接收的采样。 每个子块处于包括用于存储所接收的采样的N个充电状态,用于输出所存储的采样的传送状态和用于操作初始化的复位状态的多个可能状态之间的状态。 响应于时钟信号,N个充电状态,传送状态和复位状态顺序地改变。