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1. 发明授权

US07793068B2 Dual mode access for non-volatile storage devices 有权
标题翻译：非易失性存储设备的双模式访问
公开(公告)号：US07793068B2
公开(公告)日：2010-09-07
申请号：US11314842
申请日：2005-12-21
申请人： Alan W. Sinclair , Sergey A. Gorobets
发明人： Alan W. Sinclair , Sergey A. Gorobets
IPC分类号： G06F13/14
CPC分类号： G06F3/0643 , G06F3/0605 , G06F3/0679
摘要： Method and mass storage memory system is provided. The system includes, re-programmable non-volatile memory cells, the memory cells being arranged in a plurality of blocks that are erasable together; and a controller including a microprocessor that is adapted to receive files of data identified by unique identifiers via a first interface and the controller causes a received data file to be stored in one or more memory blocks; and the controller receives data identified by logical addresses via a second interface and stores the received data in one or more memory blocks, wherein data written via the first interface is indexed using the unique identifiers so that data is accessible via the second interface or the first interface; and data received via the second interface is indexed so that data can be accessed via the first interface or the second interface.
摘要翻译：提供了方法和大容量存储存储系统。该系统包括可重新编程的非易失性存储器单元，存储单元布置在可以一起可擦除的多个块中; 以及控制器，其包括适于经由第一接口接收由唯一标识符标识的数据的文件的微处理器，并且所述控制器使接收到的数据文件存储在一个或多个存储器块中; 并且控制器经由第二接口接收由逻辑地址识别的数据，并将接收到的数据存储在一个或多个存储器块中，其中经由第一接口写入的数据使用唯一标识符进行索引，使得经由第二接口或第一接口接口; 并且通过第二接口接收的数据被索引，使得可以经由第一接口或第二接口访问数据。

2. 发明授权

US07747837B2 Method and system for accessing non-volatile storage devices 有权
标题翻译：用于访问非易失性存储设备的方法和系统
公开(公告)号：US07747837B2
公开(公告)日：2010-06-29
申请号：US11313567
申请日：2005-12-21
申请人： Sergey A. Gorobets , Alan W. Sinclair
发明人： Sergey A. Gorobets , Alan W. Sinclair
IPC分类号： G06F13/14
CPC分类号： G06F3/0638 , G06F3/0607 , G06F3/0679
摘要： A mass storage memory system is provided. The memory system includes, re-programmable non-volatile memory cells arranged in a plurality of blocks of memory cells; and a controller that is adapted to receive data via a first interface, and/or a second interface, and data received via the first interface and the second interface is accessible via the first interface and the second interface even if a file name for the data is not provided by a host system or before a write operation is complete. The first interface is a file based interface and the second interface is a logical interface.
摘要翻译：提供大容量存储存储器系统。存储器系统包括布置在存储器单元的多个块中的可重新编程的非易失性存储器单元; 以及适于经由第一接口和/或第二接口接收数据的控制器，并且经由所述第一接口和所述第二接口接收的数据可经由所述第一接口和所述第二接口访问，即使所述数据的文件名不是由主机系统提供或在写操作完成之前。第一个接口是一个基于文件的接口，第二个接口是一个逻辑接口。

3. 发明授权

US08473923B2 Pointers for write abort handling 有权
标题翻译：写中止处理指针
公开(公告)号：US08473923B2
公开(公告)日：2013-06-25
申请号：US12026472
申请日：2008-02-05
申请人： Jason T. Lin , Shai Traister , Sergey A. Gorobets
发明人： Jason T. Lin , Shai Traister , Sergey A. Gorobets
IPC分类号： G06F9/44 , G06F11/00 , G06F13/28
CPC分类号： G11C11/5642 , G06F11/1441 , G11C16/102 , G11C16/105 , G11C16/3418 , G11C29/00 , G11C2211/5646
摘要： A portion of a nonvolatile memory array that is likely to contain, partially programmed data may be identified from a high sensitivity read, by applying stricter than usual error correction code (ECC) requirements, or using pointers to programmed sectors. The last programmed data may be treated as likely to be partially programmed data. Data in the identified portion may be copied to another location, or left where it is with an indicator to prohibit further programming to the same cells. To avoid compromising previously stored data during subsequent programming, previously stored data may be backed up. Backing up may be done selectively, for example, only for nonsequential data, or only when the previously stored data contains an earlier version of data being programmed. If a backup copy already exists, another backup copy is not created. Sequential commands are treated as a single command if received within a predetermined time period.
摘要翻译：通过应用比通常的纠错码（ECC）要求更严格或使用指向编程扇区的指针，可以从高灵敏度读取来识别可能包含部分编程数据的非易失性存储器阵列的一部分。最后编程的数据可能被视为可能是部分编程的数据。所识别的部分中的数据可以被复制到另一个位置，或者与指示符一起保留在其中，以禁止进一步编程到相同的单元。为了避免在随后的编程期间损害以前存储的数据，可以备份先前存储的数据。可以有选择地进行备份，例如，仅针对非顺序数据，或仅当先前存储的数据包含正被编程的较早版本的数据时。如果备份副本已经存在，则不会创建另一个备份副本。如果在预定的时间段内被接收，则顺序命令被视为单个命令。

4. 发明申请

US20110161560A1 ERASE COMMAND CACHING TO IMPROVE ERASE PERFORMANCE ON FLASH MEMORY 审中-公开
标题翻译：删除命令缓存以提高闪速存储器的擦除性能
公开(公告)号：US20110161560A1
公开(公告)日：2011-06-30
申请号：US12651176
申请日：2009-12-31
申请人： Neil D. Hutchison , Alan D. Bennett , Sergey A. Gorobets , Steven T. Sprouse
发明人： Neil D. Hutchison , Alan D. Bennett , Sergey A. Gorobets , Steven T. Sprouse
IPC分类号： G06F12/02 , G06F12/10 , G06F17/30
CPC分类号： G06F12/0246 , G06F2212/1016 , G06F2212/7205 , G06F2212/7208
摘要： Systems and methods are disclosed to reduce the number of partial logical groups that are erased by writing erase patterns to memory in a non-volatile memory system. When a non-aligned erase command is received, the logical addresses of data associated with the erase command may be marked as erased. If the logical group corresponds to the size of a physical metablock, the controller may also issue a physical erase command for complete logical groups within the erase command. For those parts of the erase command that encompass only partial logical groups, the ranges of the logical block addresses marked for erasure are stored. As subsequent erase commands are received the address ranges of the erase commands are added to the previously stored address ranges. When a set of erase commands spans an entire logical group, the logical group is marked for physical erasure in its entirety.
摘要翻译：公开了系统和方法，以通过将擦除模式写入非易失性存储器系统中的存储器来减少擦除的部分逻辑组的数量。当接收到不对准的擦除命令时，可以将与擦除命令相关联的数据的逻辑地址标记为擦除。如果逻辑组对应于物理元区块的大小，则控制器还可以对擦除命令内的完整逻辑组发出物理擦除命令。对于仅包含部分逻辑组的擦除命令的那些部分，存储标记为擦除的逻辑块地址的范围。随着接下来的擦除命令被接收，擦除命令的地址范围被添加到先前存储的地址范围。当一组擦除命令跨越整个逻辑组时，逻辑组被整体标记为物理擦除。

5. 发明授权

US07769978B2 Method and system for accessing non-volatile storage devices 有权
标题翻译：用于访问非易失性存储设备的方法和系统
公开(公告)号：US07769978B2
公开(公告)日：2010-08-03
申请号：US11313633
申请日：2005-12-21
申请人： Sergey A. Gorobets , Alan W. Sinclair
发明人： Sergey A. Gorobets , Alan W. Sinclair
IPC分类号： G06F13/14
CPC分类号： G06F12/0246 , G06F3/0607 , G06F3/0643 , G06F3/0679 , G11C16/10
摘要： Method for transferring data between a host system and a re-programmable non-volatile mass storage system having memory cells organized into blocks of memory cells is provided. The method includes receiving data via a first interface and/or a second interface; and making data accessible via the first interface and the second interface, even if a file name is not provided by a host system or before a write operation is complete.
摘要翻译：提供了一种用于在主机系统和具有组织成存储器单元块的存储器单元的可重新编程的非易失性大容量存储系统之间传送数据的方法。该方法包括经由第一接口和/或第二接口接收数据; 并且即使文件名不是由主机系统提供，还是在写操作完成之前，通过第一接口和第二接口使数据可访问。

6. 发明授权

US07633799B2 Method combining lower-endurance/performance and higher-endurance/performance information storage to support data processing 有权
标题翻译：结合低耐久性/高性能/性能信息存储来支持数据处理的方法
公开(公告)号：US07633799B2
公开(公告)日：2009-12-15
申请号：US11731531
申请日：2007-03-30
申请人： Sergey A. Gorobets , Neil A. Dunlop , Kevin P. Kealy
发明人： Sergey A. Gorobets , Neil A. Dunlop , Kevin P. Kealy
IPC分类号： G11C16/04
CPC分类号： G06F3/0647 , G06F3/0616 , G06F3/068
摘要： An information storage arrangement that combines higher-endurance (or performance) storage with lower-endurance (or performance) storage is managed in a manner that makes judicious use of the lower-endurance (or performance) storage. It is therefore possible to exploit the economic advantage associated with lower-endurance (or performance) storage, while also avoiding storage capacity losses that would otherwise be associated with lower-endurance (or performance) storage.
摘要翻译：将更高耐用性（或性能）存储与低耐久性（或性能）存储结合在一起的信息存储装置以明智地使用低寿命（或性能）存储的方式进行管理。因此，可以利用与低耐久性（或性能）存储相关的经济优势，同时也避免了与低耐久性（或性能）存储相关的存储容量损失。

7. 发明申请

US20090044190A1 URGENCY AND TIME WINDOW MANIPULATION TO ACCOMMODATE UNPREDICTABLE MEMORY OPERATIONS 有权
标题翻译：紧急和时间窗口操作来调节不可预测的存储器操作
公开(公告)号：US20090044190A1
公开(公告)日：2009-02-12
申请号：US11864740
申请日：2007-09-28
申请人： J. James Tringali , Sergey A. Gorobets , Shai Traister , Yosief Ataklti
发明人： J. James Tringali , Sergey A. Gorobets , Shai Traister , Yosief Ataklti
IPC分类号： G06F9/46
CPC分类号： G06F13/1689
摘要： The variable latency associated with flash memory due to background data integrity operations is managed in order to allow the flash memory to be used in isochronous systems. A system processor is notified regularly of the nature and urgency of requests for time to ensure data integrity. Minimal interruptions of system processing are achieved and operation is ensured in the event of a power interruption.
摘要翻译：管理由于背景数据完整性操作而与闪存相关联的可变延迟，以便允许在同步系统中使用闪存。系统处理器定期通知请求时间的性质和紧迫性，以确保数据的完整性。实现系统处理的最小中断，并且在电源中断的情况下确保操作。

8. 发明授权

US08880483B2 System and method for implementing extensions to intelligently manage resources of a mass storage system 有权
标题翻译：用于实现扩展的系统和方法来智能地管理大容量存储系统的资源
公开(公告)号：US08880483B2
公开(公告)日：2014-11-04
申请号：US11963479
申请日：2007-12-21
申请人： Sergey A. Gorobets
发明人： Sergey A. Gorobets
IPC分类号： G06F17/30 , G06F3/06
CPC分类号： G06F3/0661 , G06F3/061 , G06F3/0659 , G06F3/0679
摘要： Systems and methods for implementing extensions to intelligently manage resources of a mass storage system are disclosed. Generally, a host sends an extension of an enabled set of extensions to a mass storage system that includes at least one of command sequence information, command information or file attribute information. The host additionally sends a host application command to the mass storage system that includes logical block address information associated with the at least one of command sequence information, command information or file attribute information of the extension. Based on the received extension, the mass storage system intelligently performs operations that efficiently manage the resources of the mass storage system to reduce the frequency of operations such as data consolidation operations, data collection operations, and data copy operations, thereby increasing the data programming and reading performance of the mass storage system.
摘要翻译：公开了用于实现智能地管理大容量存储系统的资源的扩展的系统和方法。通常，主机向大容量存储系统发送启用了一组扩展的扩展，该大容量存储系统包括命令序列信息，命令信息或文件属性信息中的至少一个。主机还向大容量存储系统发送主机应用命令，该主机应用命令包括与扩展的命令序列信息，命令信息或文件属性信息中的至少一个相关联的逻辑块地址信息。基于收到的扩展，大容量存储系统智能地执行有效管理大容量存储系统的资源的操作，以减少数据合并操作，数据收集操作和数据复制操作等操作的频率，从而增加数据编程和阅读大容量存储系统的性能。

9. 发明授权

US08266391B2 Method for writing data of an atomic transaction to a memory device 有权
标题翻译：将原子事务的数据写入存储器件的方法
公开(公告)号：US08266391B2
公开(公告)日：2012-09-11
申请号：US11820617
申请日：2007-06-19
申请人： Andrew Tomlin , Sergey A. Gorobets , Reuven Elhamias , Shai Traister , Alan D. Bennett
发明人： Andrew Tomlin , Sergey A. Gorobets , Reuven Elhamias , Shai Traister , Alan D. Bennett
IPC分类号： G06F13/00
CPC分类号： G06F17/30289 , G06F3/0619 , G06F3/0656 , G06F3/0679 , G06F9/466 , G06F17/30315
摘要： A method for writing data to a memory device is disclosed. In one embodiment, data of an atomic transaction is written to a first memory in a memory device. A determination is made regarding whether all of the data of the atomic transaction was written to the first memory. The data of the atomic transaction is read from the first memory and written to a second memory in the memory device only if it is determined that all of the data of the atomic transaction was written to the first memory.
摘要翻译：公开了一种将数据写入存储器件的方法。在一个实施例中，原子事务的数据被写入存储器件中的第一存储器。确定原子事务的所有数据是否被写入第一存储器。仅当确定原子事务的所有数据被写入到第一存储器时，才从第一存储器读取原子事务的数据并将其写入存储器件中的第二存储器。

10. 发明授权

US08099632B2 Urgency and time window manipulation to accommodate unpredictable memory operations 有权
标题翻译：紧急和时间窗口操作，以适应不可预测的内存操作
公开(公告)号：US08099632B2
公开(公告)日：2012-01-17
申请号：US11864740
申请日：2007-09-28
申请人： J. James Tringali , Sergey A. Gorobets , Shai Traister , Yosief Ataklti
发明人： J. James Tringali , Sergey A. Gorobets , Shai Traister , Yosief Ataklti
IPC分类号： G06F11/00
CPC分类号： G06F13/1689
摘要： The variable latency associated with flash memory due to background data integrity operations is managed in order to allow the flash memory to be used in isochronous systems. A system processor is notified regularly of the nature and urgency of requests for time to ensure data integrity. Minimal interruptions of system processing are achieved and operation is ensured in the event of a power interruption.
摘要翻译：管理由于背景数据完整性操作而与闪存相关联的可变延迟，以便允许在同步系统中使用闪存。系统处理器定期通知请求时间的性质和紧迫性，以确保数据的完整性。实现系统处理的最小中断，并且在电源中断的情况下确保操作。

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