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    • 6. 发明申请
    • DESIGN STRUCTURE FOR CHIP IDENTIFICATION SYSTEM
    • 芯片识别系统设计结构
    • US20090094566A1
    • 2009-04-09
    • US12105883
    • 2008-04-18
    • Serafino BuetiAdam J. CourchesneKenneth J. GoodnowTodd E. LeonardPeter A. SandonPeter A. TwomblyCharles S. Woodruff
    • Serafino BuetiAdam J. CourchesneKenneth J. GoodnowTodd E. LeonardPeter A. SandonPeter A. TwomblyCharles S. Woodruff
    • G06F17/50
    • G06K19/067
    • Disclosed is a design structure for an on-chip identification circuitry. In one embodiment, pairs of conductors (e.g., metal pads, vias, lines) are formed within one or more metallization layers. The distance between the conductors in each pair is predetermined so that, given known across chip line variations, there is a random chance (i.e., an approximately 50/50 chance) of a short. In another embodiment different masks form first conductors (e.g., metal lines separated by varying distances and having different widths) and second conductors (e.g., metal vias separated by varying distances and having equal widths). The first and second conductors alternate across the chip. Due to the different separation distances and widths of the first conductors, the different separation distances of the second conductors and, random mask alignment variations, each first conductor can short to up to two second conductors. In each embodiment the resulting pattern of shorts and opens, can be used as an on-chip identifier or private key.
    • 公开了用于片上识别电路的设计结构。 在一个实施例中,在一个或多个金属化层内形成导体对(例如,金属焊盘,通孔,线)。 每对中的导体之间的距离是预先确定的,因此,在已知的跨越芯片线的变化中,存在短路的随机机会(即,大约50/50的几率)。 在另一个实施例中,不同的掩模形成第一导体(例如,由变化的距离分隔并具有不同宽度的金属线)和第二导体(例如,通过变化的距离分开并具有相等宽度的金属通孔)。 第一和第二导体在芯片之间交替。 由于第一导体的分离距离和宽度不同,第二导体的不同间隔距离和随机掩模对准变化,每个第一导体可以短至多达两个第二导体。 在每个实施例中,所得到的短路和开路模式可用作片上标识符或私钥。