会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 4. 发明授权
    • Method for encoding broadcast channel protocol data unit based on broadcast control channel scheduling error in universal mobile telecommunications system
    • 基于通用移动电信系统中的广播控制信道调度误差对广播信道协议数据单元进行编码的方法
    • US08121152B2
    • 2012-02-21
    • US11828105
    • 2007-07-25
    • Yunhee ChoJi Yeon KimGweon Do JoJin Up Kim
    • Yunhee ChoJi Yeon KimGweon Do JoJin Up Kim
    • H04J3/00
    • H04W48/12
    • A method for encoding a broadcast channel protocol data unit (BCH PDU) based on a broadcast control channel (BCCH) scheduling error in a universal mobile telecommunications system (UMTS) having a Node B and a radio network controller includes setting up a call between the radio network controller and the Node B to receive system information and scheduling information for a system information update from the radio network controller; initializing broadcast channel protocol data units and control information for every system frame number (SFN) at the Node B; and detecting the broadcast control channel scheduling error on the scheduling information for the system information update based on segment types of the system information when combining the system information for every system frame number. In case the broadcast control channel scheduling error is not detected, the broadcast channel protocol data units are encoded to be incorporated therein the system information.
    • 在具有节点B和无线网络控制器的通用移动通信系统(UMTS)中,基于广播控制信道(BCCH)调度误差对广播信道协议数据单元(BCH PDU)进行编码的方法包括: 无线电网络控制器和节点B从无线电网络控制器接收用于系统信息更新的系统信息和调度信息; 对节点B的每个系统帧号(SFN)初始化广播信道协议数据单元和控制信息; 以及当对于每个系统帧号组合系统信息时,基于系统信息的段类型来检测用于系统信息更新的调度信息的广播控制信道调度误差。 在没有检测到广播控制信道调度错误的情况下,广播信道协议数据单元被编码为并入其中的系统信息。
    • 7. 发明授权
    • Apparatus for scheduling transmission of data unit in base station
    • 用于调度基站中数据单元传输的装置
    • US08218489B2
    • 2012-07-10
    • US12329424
    • 2008-12-05
    • Yun Hee ChoHyung Jin KimJi Yeon KimGweon Do JoJin Up Kim
    • Yun Hee ChoHyung Jin KimJi Yeon KimGweon Do JoJin Up Kim
    • H04W4/00H04W72/00H04L12/56H04L1/18
    • H04L1/1887H04L1/1877H04L1/188H04W72/1242
    • The present invention relates to a scheduling apparatus of a base station supporting Automatic Repeat reQuest (ARQ) method. In particular, the present invention discloses scheduling a data unit transmitted to a mobile station from a base station providing ARQ method for correcting an error in wireless data communication and generating a high rate frame.According to the present invention, there is provided a transmission controlling apparatus comprising a receiver to receive mobile station status information from a mobile station connected with a base station, a schedule managing unit to determine transmission priority of a plurality of data units to be transmitted to the mobile station based on the received mobile station status information, and a transmitter to transmit the data units to the mobile station based on the determined transmission priority.
    • 本发明涉及一种支持自动重复请求(ARQ)方法的基站的调度装置。 特别地,本发明公开了一种从提供用于校正无线数据通信中的错误并生成高速率帧的ARQ方法的基站调度发送到移动台的数据单元。 根据本发明,提供了一种传输控制装置,包括:接收器,用于从与基站连接的移动台接收移动台状态信息;调度管理单元,用于确定要发送的多个数据单元的传输优先级 基于接收到的移动台状态信息的移动站,以及基于所确定的传输优先级向移动站发送数据单元的发射机。
    • 9. 发明申请
    • METHOD AND APPARATUS FOR MODULO N CALCULATION
    • 用于模数计算的方法和装置
    • US20110016168A1
    • 2011-01-20
    • US12517893
    • 2007-06-19
    • Seong Chul ChoHyung Jin KimGweon Do JoJin Up KimDae Sik Kim
    • Seong Chul ChoHyung Jin KimGweon Do JoJin Up KimDae Sik Kim
    • G06F7/38
    • G06F7/727
    • A modulo N calculating method for an M1*M2-bit binary integer, wherein N, M1 and M2 are integers, includes the steps of dividing the M1*M2-bit binary integer into M1 bits and performing AND operation on each M1 bits and a specific binary integer; and changing a value of an output register depending on the AND operation result and storing the value thereto. A modulo N calculating apparatus includes an input unit for receiving an M1*M2-bit binary integer, wherein N, M1 and M2 are integers; and an AND operation unit for performing AND operation on the M1*M2-bit binary integer and a specific binary integer. Furthermore, when the M1 and the N may be 4 and 3, respectively, the specific binary value may be 1010 or 0101.
    • 用于M1 * M2位二进制整数的模N计算方法,其中N,M1和M2是整数,包括以下步骤:将M1 * M2位二进制整数除以M1位,并对每个M1位和 具体的二进制整数; 并根据AND运算结果改变输出寄存器的值并存储该值。 模N计算装置包括用于接收M1 * M2位二进制整数的输入单元,其中N,M1和M2是整数; 以及AND运算单元,用于对M1 * M2位二进制整数和特定二进制整数进行AND运算。 此外,当M1和N分别为4和3时,特定的二进制值可以是1010或0101。
    • 10. 发明授权
    • Apparatus for generating clock signal with jitter and test apparatus including the same
    • 用于产生具有抖动的时钟信号和包括其的测试装置的装置
    • US08090069B2
    • 2012-01-03
    • US12142396
    • 2008-06-19
    • Bong Guk YuEun Tae KimHyung Jung KimGweon Do Jo
    • Bong Guk YuEun Tae KimHyung Jung KimGweon Do Jo
    • H03D3/24
    • G01R31/31708H03L7/099H03L2207/06
    • The present invention relates to an apparatus for generating a clock signal with jitter and a test apparatus including the same. The apparatus for generating a clock signal with jitter in accordance with the present invention includes a voltage-controlled crystal oscillator (VCXO) for generating an output signal including jitter components based on a driving power source having a specific waveform and a controlled voltage, a phase comparator for calculating a phase difference of a reference signal and the output signal, and a loop filter for generating the controlled voltage based on the phase difference calculated by the phase comparator. Accordingly, the PLL circuit unit generates a clock signal including jitter, so that the complexity and manufacturing cost of the apparatus can be reduced.
    • 本发明涉及一种用于产生具有抖动的时钟信号的装置和包括该时钟信号的测试装置。 根据本发明的用于产生具有抖动的时钟信号的装置包括用于产生包括基于具有特定波形和受控电压的驱动电源的抖动分量的输出信号的电压控制晶体振荡器(VCXO),相位 比较器,用于计算参考信号和输出信号的相位差;以及环路滤波器,用于基于由相位比较器计算的相位差产生受控电压。 因此,PLL电路单元产生包括抖动的时钟信号,从而可以降低装置的复杂性和制造成本。