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    • 2. 发明授权
    • Instantaneous phase detecting circuit and clock recovery signal
generating circuit incorporated in differential demodulator
    • 瞬时相位检测电路和时钟恢复信号发生电路并入差分解调器
    • US5668838A
    • 1997-09-16
    • US621646
    • 1996-03-26
    • Seizo NakamuraYuji IguchiAkinobu Kodama
    • Seizo NakamuraYuji IguchiAkinobu Kodama
    • H03D13/00H04L7/033H04L7/04H04L25/06H04L27/22H03D1/00H04L27/06
    • H03D13/002H03D13/00H04L25/061H04L27/22H04L7/0331H04L7/04H04L7/046
    • An instantaneous phase detecting circuit for detecting the phase of a digital phase modulation wave signal which includes first and second logic circuits, first and second phase detecting circuits, and a third logic circuit. The first and second logic circuits receive the modulation wave signal, the first logic circuit receives a first carrier signal, and the second logic circuit receives a second carrier signal, the phase of the second carrier signal being delayed by a fixed period with respect to the phase of the first carrier signal. The first and second logic circuits generate first and second arithmetic outputs which are received by the first and second phase detecting circuits which detect the phases of the first and second arithmetic outputs to generate first and second detection output signals respectively. The third logic circuit receiving the first and second detection output signals and compares a periodic deviation of the first and second detection output signals to detect the phase of the modulation wave signal.
    • 一种用于检测包括第一和第二逻辑电路,第一和第二相位检测电路以及第三逻辑电路的数字相位调制波信号的相位的瞬时相位检测电路。 第一和第二逻辑电路接收调制波信号,第一逻辑电路接收第一载波信号,第二逻辑电路接收第二载波信号,第二载波信号的相位延迟相对于 第一载波信号的相位。 第一和第二逻辑电路产生由第一和第二相位检测电路接收的第一和第二运算输出,其检测第一和第二运算输出的相位,以分别产生第一和第二检测输出信号。 接收第一和第二检测输出信号的第三逻辑电路,并比较第一和第二检测输出信号的周期性偏差,以检测调制波信号的相位。