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1. 发明申请

US20110012195A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110012195A1
公开(公告)日：2011-01-20
申请号：US12865330
申请日：2009-01-28
申请人： Seiji Momota , Hitoshi Abe , Takashi Shiigi , Takeshi Fujii , Koh Yoshikawa , Tetsutaro Imagawa , Masaki Koyama , Makoto Asai
发明人： Seiji Momota , Hitoshi Abe , Takashi Shiigi , Takeshi Fujii , Koh Yoshikawa , Tetsutaro Imagawa , Masaki Koyama , Makoto Asai
IPC分类号： H01L27/11
CPC分类号： H01L27/0629 , H01L27/0658 , H01L29/0696 , H01L29/0878 , H01L29/1095 , H01L29/4236 , H01L29/7395 , H01L29/7397 , H01L29/7815 , H01L29/7827
摘要： Between a source electrode (25) of a main device (24) and a current sensing electrode (22) of a current detection device (21), a resistor for detecting current is connected. Dielectric withstand voltage of gate insulator (36) is larger than a product of the resistor and maximal current flowing through the current detection device (21) with reverse bias. A diffusion length of a p-body region (32) of the main device (24) is shorter than that of a p-body (31) of the current detection device (21). A curvature radius at an end portion of the p-body region (32) of the main device (24) is smaller than that of the p-body (31) of the current detection device (21). As a result, at the inverse bias, electric field at the end portion of the p-body region (32) of the main device (24) becomes stronger than that of the p-body region (31) of the current detection device (21). Consequently, avalanche breakdown tends to occur earlier in the main device 24 than the current detection device (21).
摘要翻译：在主装置（24）的源电极（25）和电流检测装置（21）的电流检测电极（22）之间连接用于检测电流的电阻器。栅极绝缘体（36）的介电耐受电压大于电阻器和流过电流检测装置（21）的反向偏压的最大电流的乘积。主装置（24）的p体区域（32）的扩散长度短于电流检测装置（21）的p体（31）的扩散长度。主装置（24）的p体区域（32）的端部的曲率半径比电流检测装置（21）的p体（31）的曲率半径小。结果，在逆偏压下，主装置（24）的p体区域（32）的端部的电场变得比电流检测装置的p体区域（31）的电场强 21）。因此，主装置24中的雪崩击穿比电流检测装置（21）更容易发生。

2. 发明授权

US09466711B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09466711B2
公开(公告)日：2016-10-11
申请号：US12865330
申请日：2009-01-28
申请人： Seiji Momota , Hitoshi Abe , Takashi Shiigi , Takeshi Fujii , Koh Yoshikawa , Tetsutaro Imagawa , Masaki Koyama , Makoto Asai
发明人： Seiji Momota , Hitoshi Abe , Takashi Shiigi , Takeshi Fujii , Koh Yoshikawa , Tetsutaro Imagawa , Masaki Koyama , Makoto Asai
IPC分类号： H01L29/78 , H01L29/96 , H01L29/739 , H01L29/08 , H01L29/10 , H01L29/423
CPC分类号： H01L27/0629 , H01L27/0658 , H01L29/0696 , H01L29/0878 , H01L29/1095 , H01L29/4236 , H01L29/7395 , H01L29/7397 , H01L29/7815 , H01L29/7827
摘要： Between a source electrode (25) of a main device (24) and a current sensing electrode (22) of a current detection device (21), a resistor for detecting current is connected. Dielectric withstand voltage of gate insulator (36) is larger than a product of the resistor and maximal current flowing through the current detection device (21) with reverse bias. A diffusion length of a p-body region (32) of the main device (24) is shorter than that of a p-body (31) of the current detection device (21). A curvature radius at an end portion of the p-body region (32) of the main device (24) is smaller than that of the p-body (31) of the current detection device (21). As a result, at the inverse bias, electric field at the end portion of the p-body region (32) of the main device (24) becomes stronger than that of the p-body region (31) of the current detection device (21). Consequently, avalanche breakdown tends to occur earlier in the main device 24 than the current detection device (21).
摘要翻译：在主装置（24）的源电极（25）和电流检测装置（21）的电流检测电极（22）之间连接用于检测电流的电阻器。栅极绝缘体（36）的介电耐受电压大于电阻器和流过电流检测装置（21）的反向偏压的最大电流的乘积。主装置（24）的p体区域（32）的扩散长度短于电流检测装置（21）的p体（31）的扩散长度。主装置（24）的p体区域（32）的端部的曲率半径比电流检测装置（21）的p体（31）的曲率半径小。结果，在逆偏压下，主装置（24）的p体区域（32）的端部的电场变得比电流检测装置的p体区域（31）的电场强 21）。因此，主装置24中的雪崩击穿比电流检测装置（21）更容易发生。

3. 发明授权

US09082812B2 Semiconductor device including a counter layer, for power conversion and method of manufacturing the same 有权
标题翻译：包括用于功率转换的对置层的半导体器件及其制造方法
公开(公告)号：US09082812B2
公开(公告)日：2015-07-14
申请号：US13703797
申请日：2012-03-15
申请人： Yuichi Onozawa , Takashi Shiigi
发明人： Yuichi Onozawa , Takashi Shiigi
IPC分类号： H01L29/76 , H01L29/739 , H01L29/36 , H01L29/66 , H01L29/78 , H01L29/10 , H01L29/06 , H01L29/08
CPC分类号： H01L29/66333 , H01L21/266 , H01L27/0664 , H01L29/0696 , H01L29/0847 , H01L29/0869 , H01L29/1095 , H01L29/36 , H01L29/66325 , H01L29/66712 , H01L29/7395 , H01L29/7397 , H01L29/7802 , H01L2924/13055
摘要： A p-type base layer is selectively formed on a surface of an n-type drift layer; an n-type source layer is selectively formed on a surface of the p-type base layer; and a p-type contact layer is formed to be in contact with the selectively-formed n-type source layer. A p-type counter layer is formed to be in contact with the n-type source layer, so as to overlap the p-type contact layer, so as to be separated from an interface where the p-type base layer and the gate oxide film are in contact with each other, and to be shallower than the p-type base layer. Accordingly, switching destruction caused by process defects in an insulated gate semiconductor device is reduced.
摘要翻译：选择性地在n型漂移层的表面上形成p型基层; n型源极层选择性地形成在p型基极层的表面上; 并且形成p型接触层以与选择形成的n型源极层接触。形成与n型源极层接触的p型对置层，以与p型接触层重叠，从而与p型基极层和栅极氧化物的界面分离膜彼此接触并且比p型基底层浅。因此，减少了由绝缘栅极半导体器件中的工艺缺陷引起的开关破坏。

4. 发明申请

US20130082301A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
公开(公告)号：US20130082301A1
公开(公告)日：2013-04-04
申请号：US13703797
申请日：2012-03-15
申请人： Yuichi Onozawa , Takashi Shiigi
发明人： Yuichi Onozawa , Takashi Shiigi
IPC分类号： H01L29/739 , H01L29/36
CPC分类号： H01L29/66333 , H01L21/266 , H01L27/0664 , H01L29/0696 , H01L29/0847 , H01L29/0869 , H01L29/1095 , H01L29/36 , H01L29/66325 , H01L29/66712 , H01L29/7395 , H01L29/7397 , H01L29/7802 , H01L2924/13055
摘要： A p-type base layer is selectively formed on a surface of an n-type drift layer; an n-type source layer is selectively formed on a surface of the p-type base layer; and a p-type contact layer is formed to be in contact with the selectively-formed n-type source layer. A p-type counter layer is formed to be in contact with the n-type source layer, so as to overlap the p-type contact layer, so as to be separated from an interface where the p-type base layer and the gate oxide film are in contact with each other, and to be shallower than the p-type base layer. Accordingly, switching destruction caused by process defects in an insulated gate semiconductor device is reduced.

5. 发明授权

US08008734B2 Power semiconductor device 有权
标题翻译：功率半导体器件
公开(公告)号：US08008734B2
公开(公告)日：2011-08-30
申请号：US11972932
申请日：2008-01-11
申请人： Hiroki Wakimoto , Masahito Otsuki , Takashi Shiigi
发明人： Hiroki Wakimoto , Masahito Otsuki , Takashi Shiigi
IPC分类号： H01L29/66
CPC分类号： H01L29/7811 , H01L29/0619 , H01L29/0696 , H01L29/402 , H01L29/404 , H01L29/66734 , H01L29/7813
摘要： A power semiconductor device is provided having a field plate that employs a thick metal film in an edge termination structure and which permits edge termination structure width reduction even with large side etching or etching variation, which exhibits superior long-term forward blocking voltage capability reliability, and which allows minimal forward blocking voltage capability variation. The edge termination structure has multiple ring-like p-type guard rings, a first insulating film covering the guard rings, and ring-like field plates, provided via the first insulating film atop the guard rings. The field plates have a polysilicon film and a thicker metal film. The polysilicon film is provided on a first guard ring via first insulating film, and a dual field plate made of the polysilicon film and metal film is provided on a second guard ring. The dual field plate is stacked via a second insulating film. The first and second guard rings alternate.
摘要翻译：提供了一种功率半导体器件，其具有采用边缘端接结构中的厚金属膜的场板，即使具有优异的长期正向阻断电压能力可靠性的大的侧蚀刻或蚀刻变化也允许边缘终端结构宽度减小，并且其允许最小的正向阻断电压能力变化。边缘端接结构具有多个环状p型保护环，覆盖保护环的第一绝缘膜和通过护罩顶部上的第一绝缘膜提供的环状场板。场板具有多晶硅膜和较厚的金属膜。多晶硅膜通过第一绝缘膜设置在第一保护环上，并且由多晶硅膜和金属膜制成的双场板设置在第二保护环上。双场板通过第二绝缘膜堆叠。第一和第二保卫环交替出现。

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