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    • 7. 发明授权
    • Data encoding to provide run-length control in a data storage system
    • 在数据存储系统中提供运行长度控制的数据编码
    • US06384747B1
    • 2002-05-07
    • US09694587
    • 2000-10-23
    • David E. ReedJay N. LivingstonMarvin L. Vis
    • David E. ReedJay N. LivingstonMarvin L. Vis
    • H03M746
    • G06T9/005G11B20/1426H03M5/145H03M7/46H03M7/48
    • Data storage system circuitry comprises randomizer circuitry and run-length control circuitry. The randomizer circuitry generates randomized user data. The run-length control circuitry grades the randomized user data to determine if the randomized user data requires run-length encoding. The run-length control circuitry applies the run-length encoding to the randomized user data if the randomized user data requires run-length encoding. The run-length control circuitry may encode decoding information and error correction information for the decoding information into the randomized user data. The run-length encoding may comprise de-randomization or RLL encoding. If de-randomization is used, RLL encoding may be eliminated altogether for the randomized user data.
    • 数据存储系统电路包括随机化电路和游程长度控制电路。 随机化电路产生随机用户数据。 游程长度控制电路对随机用户数据进行分级,以确定随机用户数据是否需要运行长度编码。 如果随机用户数据需要运行长度编码,则游程长度控制电路将游程长度编码应用于随机用户数据。 游程长度控制电路可以将用于解码信息的解码信息和纠错信息编码为随机用户数据。 游程长度编码可以包括去随机化或RLL编码。 如果使用去随机化,对于随机用户数据可以完全消除RLL编码。
    • 8. 发明授权
    • Data randomization in a data storage system
    • 数据存储系统中的数据随机化
    • US06714144B1
    • 2004-03-30
    • US09694583
    • 2000-10-23
    • David E. ReedJay N. LivingstonMarvin L. Vis
    • David E. ReedJay N. LivingstonMarvin L. Vis
    • H03M700
    • G11B20/10009G11B20/1426
    • Data storage system circuitry comprises randomizer circuitry and grading circuitry. The randomizer circuitry concurrently generates multiple randomized versions of user data. The grading circuitry selects one of the multiple randomized versions of the user data for data storage. Decoding circuitry decodes the selected one of the multiple randomized versions of the user data. In some examples of the invention, the grading circuitry selects the one of the multiple randomized versions of the user data based on zero run characteristics of the multiple randomized versions of the user data. In some examples of the invention, the user data is not encoded with a run length limit algorithm.
    • 数据存储系统电路包括随机化电路和分级电路。 随机化器电路同时生成用户数据的多个随机化版本。 分级电路选择用户数据的多个随机化版本之一用于数据存储。 解码电路解码用户数据的多个随机化版本中所选择的一个。 在本发明的一些示例中,分级电路基于用户数据的多个随机化版本的零运行特性来选择用户数据的多个随机化版本中的一个。 在本发明的一些示例中,用户数据不用游程长度限制算法进行编码。
    • 9. 发明授权
    • Data detection in a disk drive system using erasure pointers
    • 使用擦除指针的磁盘驱动器系统中的数据检测
    • US06757117B1
    • 2004-06-29
    • US09939137
    • 2001-08-24
    • Jay N. Livingston
    • Jay N. Livingston
    • G11B502
    • G11B20/10037G11B5/012G11B20/10009G11B27/36G11B2005/001G11B2220/20
    • Control circuitry for a disk drive system that has improved data detection by using log likelihood values and erasure pointers. The control circuitry is comprised of a log likelihood modification system and a decoder. The log likelihood modification system receives log likelihood values that represent data and erasure pointers. The erasure pointers point to at least one of the log likelihood values that has been corrupted in some manner. The log likelihood modification system sets the log likelihood values, that the erasure pointer points to, to an error value to generate modified log likelihood values. The log likelihood modification system transfers the modified log likelihood values to the decoder. The decoder processes the modified log likelihood values based on code constraints to generate estimated log likelihood values. The decoder then decodes the data from the estimated log likelihood values.
    • 通过使用对数似然值和擦除指针改进数据检测的磁盘驱动器系统的控制电路。 控制电路由对数似然修改系统和解码器组成。 对数似然修改系统接收表示数据和擦除指针的对数似然值。 擦除指针指向以某种方式损坏的对数似然值中的至少一个。 对数似然度修正系统将擦除指针指向的对数似然值设置为误差值,以生成修正的对数似然值。 对数似然修改系统将修改的对数似然值传送到解码器。 解码器基于码约束处理修改的对数似然值以产生估计的对数似然值。 解码器然后从估计的对数似然值解码数据。
    • 10. 发明授权
    • Sampled amplitude read channel employing a trellis sequence detector and a post processor for generating error metrics used to correct errors made by the trellis sequence detector
    • 采用格子序列检测器和后处理器的采样幅度读取通道,用于产生用于校正由格子序列检测器产生的错误的误差度量
    • US06513141B1
    • 2003-01-28
    • US09307645
    • 1999-05-07
    • Jay N. Livingston
    • Jay N. Livingston
    • H03M1303
    • G11B20/1833G11B20/10009
    • In a sampled amplitude read channel for disk storage systems, a post processor is employed to correct errors in a preliminary sequence caused by the dominant error events of a trellis sequence detector. By correlating a sample error sequence with the dominant error events, error filters compute a Euclidean distance error metric between the samples sequence selected by the trellis sequence detector and the sample sequence that would have been selected if an error event did not occur. The minimum error metric is assigned to the symbols in the preliminary sequence that differ from the symbol sequence that would have been generated if the error event did not occur. After processing a predetermined number of the symbols in the preliminary sequence, the error metrics assigned, to the symbols are used to detect and correct error events in the preliminary sequence.
    • 在用于磁盘存储系统的采样幅度读取通道中,使用后处理器来校正由格子序列检测器的主要错误事件引起的初步序列中的错误。 通过将样本误差序列与显性误差事件相关联,误差滤波器计算网格序列检测器选择的样本序列与未发生错误事件时将被选择的样本序列之间的欧氏距离误差度量。 最小误差度量被分配给初步序列中与符号序列不同的符号,如果不发生错误事件将会产生。 在初步序列中处理预定数目的符号之后,分配给符号的错误度量用于检测和纠正初步序列中的错误事件。