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    • 5. 发明授权
    • Method of forming an FeRAM capacitor having a bottom electrode diffusion barrier
    • 形成具有底部电极扩散阻挡层的FeRAM电容器的方法
    • US06773930B2
    • 2004-08-10
    • US10305838
    • 2002-11-26
    • Scott R. SummerfeltSanjeev AggarwalTomojuki SakodaChiu ChiTheodore S. Moise, IV
    • Scott R. SummerfeltSanjeev AggarwalTomojuki SakodaChiu ChiTheodore S. Moise, IV
    • H01L2100
    • H01L27/11502H01L21/28568H01L27/11507H01L28/75
    • The present invention is directed to a method of forming an FeRAM integrated circuit, which includes forming a TiAlON bottom electrode diffusion barrier layer prior to formation of the bottom electrode layer in an FeRAM capacitor stack. Subsequently, when performing the capacitor stack etch, the portion of the TiAlON diffusion barrier layer not covered by the FeRAM capacitor stack is etched substantially anisotropically due to the oxygen within the TiAlON diffusion barrier layer substantially preventing a lateral etching thereof. In the above manner, an undercut of the TiAlON diffusion barrier layer under the FeRAM capacitor stack is prevented. In another aspect of the invention, a method of forming an FeRAM capacitor comprises forming a multi-layer bottom electrode diffusion barrier layer. Such formation comprises forming a TiN layer over the interlayer dielectric layer and the conductive contact and forming a diffusion barrier layer thereover. The TiN layer at least partially fills any seam that exists within the conductive contact, thus improving a conductivity between the FeRAM capacitor and a conductive contact in the interlayer dielectric.
    • 本发明涉及一种形成FeRAM集成电路的方法,其包括在FeRAM电容器堆叠中形成底部电极层之前形成TiAlON底部电极扩散阻挡层。 随后,当执行电容器堆叠蚀刻时,TiAlON扩散阻挡层中未被FeRAM电容器堆叠覆盖的部分被TiAlON扩散阻挡层内的氧基本上各向异性地蚀刻,基本上防止了其横向蚀刻。 以上述方式,防止了FeRAM电容器堆叠下的TiAlON扩散阻挡层的底切。 在本发明的另一方面,形成FeRAM电容器的方法包括形成多层底电极扩散阻挡层。 这种形成包括在层间电介质层和导电接触面上形成TiN层,并在其上形成扩散阻挡层。 TiN层至少部分地填充存在于导电接触中的任何接缝,从而提高了FeRAM电容器和层间电介质中的导电接触之间的导电性。