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1. 发明申请

US20070115042A1 Accurate temperature measurement method for low beta transistors 有权
标题翻译：低β晶体管的精确温度测量方法
公开(公告)号：US20070115042A1
公开(公告)日：2007-05-24
申请号：US11286706
申请日：2005-11-23
申请人： Scott McLeod , Aniruddha Bashar
发明人： Scott McLeod , Aniruddha Bashar
IPC分类号： H01L35/00
CPC分类号： G01K7/01
摘要： An accurate temperature monitoring system that uses a precision current control circuit to apply accurately ratioed currents to a semiconductor device, which may be a bipolar junction transistor (BJT), used for sensing temperature. A change in base-emitter voltage (ΔVBE) proportional to the temperature of the BJT may be captured and provided to an ADC, which may generate a numeric value corresponding to that temperature. The precision current control circuit may be configured to generate a reference current, capture the base current of the BJT, generate a combined current equivalent to a sum total of the base current and a multiple of the reference current, and provide the combined current to the emitter of the BJT. In response to this combined current, the collector current of the BJT will be equivalent to the multiple of the reference current. The ratios of the various collector currents conducted by the BJT may thus be accurately controlled, leading to more accurate temperature measurements.
摘要翻译：一种精确的温度监测系统，其使用精密电流控制电路将精确比例的电流施加到用于感测温度的半导体器件（可以是双极结型晶体管（BJT））。可以捕获与BJT的温度成比例的基极 - 发射极电压（DeltaV BAT）的变化，并将其提供给ADC，该ADC可产生对应于该温度的数值。精密电流控制电路可以被配置为产生参考电流，捕获BJT的基极电流，产生等于基极电流的总和和参考电流的倍数的组合电流，并将组合电流提供给发射器。响应于该组合电流，BJT的集电极电流将等于参考电流的倍数。因此，可以精确地控制由BJT传导的各种集电极电流的比率，从而导致更准确的温度测量。

2. 发明授权

US07973569B1 Offset calibration and precision hysteresis for a rail-rail comparator with large dynamic range 有权
标题翻译：具有较大动态范围的轨道轨比较器的偏移校准和精度滞后
公开(公告)号：US07973569B1
公开(公告)日：2011-07-05
申请号：US12726117
申请日：2010-03-17
申请人： Aniruddha Bashar
发明人： Aniruddha Bashar
IPC分类号： H03K5/22
CPC分类号： H03K3/3565 , H03F3/45699
摘要： A rail-rail comparator having an input stage with independent positive and negative differential voltage offset compensation tracks changes in Gm (transconductance) of the input stage. By tracking the changes in Gm (transconductance) of the input stage, hysteresis of the rail-rail comparator becomes insensitive to the input common mode voltage. A two-stage rail-rail comparator may be used for adding hysteresis to a second stage. The first stage of the two-stage rail-rail comparator operates at substantially unity gain. The second stage of the two-stage rail-rail comparator operates as a regular high gain amplifier with hysteresis. Additional circuitry tracks the Gm (transconductance) change of the first stage to make the second stage hysteresis insensitive to the input common mode voltage at the first stage. This also makes it easier to create a programmable hysteresis that is accurate over all input voltage values.
摘要翻译：具有独立的正和负差分电压失调补偿的输入级的轨轨式比较器跟踪输入级的Gm（跨导）的变化。通过跟踪输入级Gm（跨导）的变化，轨电比较器的滞后对输入共模电压不敏感。可以使用两级轨道轨比较器来将迟滞增加到第二级。两级铁轨比较的第一阶段基本上是统一的增益。两级轨电比较器的第二级作为具有滞后性的常规高增益放大器。附加电路跟踪第一级的Gm（跨导）变化，使第二级滞后对第一级的输入共模电压不敏感。这也使得更容易创建在所有输入电压值上准确的可编程滞后。

3. 发明授权

US06924760B1 Highly accurate switched capacitor DAC 有权
标题翻译：高精度开关电容DAC
公开(公告)号：US06924760B1
公开(公告)日：2005-08-02
申请号：US10789903
申请日：2004-02-27
申请人： Scott C. McLeod , Aniruddha Bashar
发明人： Scott C. McLeod , Aniruddha Bashar
IPC分类号： H03M1/06 , H03M1/66 , H03M1/80 , H03M3/04
CPC分类号： H03M1/066 , H03M1/466 , H03M1/804 , H03M3/464 , H03M3/502
摘要： In one set of embodiments the invention comprises a highly accurate, low-power, compact size DAC utilizing charge redistribution techniques. Two complementary conversions may be performed and added together to form a final DAC output voltage by performing charge redistribution a first time, and again a second time in a complementary fashion, followed by a summing of the two charge distributions, in effect canceling the odd order capacitor mismatch errors. By canceling all odd order mismatch errors the accuracy of the DAC may become a function of the square of the mismatch of the two capacitors, resulting in greatly increased accuracy. When performing the complementary conversions for multiple bits, the sequence in which each of the two capacitors is charged may be determined to minimize the even-order errors, especially second-order errors. The DEM technique may be applied, in conjunction with the complementary conversions, with less oversampling than required by current DEM implementations, resulting in even-order errors being substantially reduced in addition to all odd-order errors being eliminated.
摘要翻译：在一组实施例中，本发明包括使用电荷再分配技术的高精度，低功率，紧凑尺寸的DAC。可以通过第一次执行电荷重新分配并且以互补方式再次进行第二次，然后将两个电荷分布相加，实际上消除了奇数阶，可以执行两个互补转换并相加在一起形成最终的DAC输出电压电容器失配误差。通过消除所有奇数阶失配误差，DAC的精度可能成为两个电容器失配的平方的函数，从而大大增加了精度。当对多个位执行互补转换时，可以确定两个电容器中的每一个被充电的顺序，以将偶数误差，特别是二阶误差最小化。 DEM技术可以与互补转换一起应用于比当前DEM实现所要求的更少的过采样，导致除了消除所有奇数误差之外，偶数阶误差被显着降低。

4. 发明授权

US07332952B2 Accurate temperature measurement method for low beta transistors 有权
标题翻译：低β晶体管的精确温度测量方法
公开(公告)号：US07332952B2
公开(公告)日：2008-02-19
申请号：US11286706
申请日：2005-11-23
申请人： Scott C. McLeod , Aniruddha Bashar
发明人： Scott C. McLeod , Aniruddha Bashar
IPC分类号： H03K17/78
CPC分类号： G01K7/01
摘要： An accurate temperature monitoring system that uses a precision current control circuit to apply accurately ratioed currents to a semiconductor device, which may be a bipolar junction transistor (BJT), used for sensing temperature. A change in base-emitter voltage (ΔVBE) proportional to the temperature of the BJT may be captured and provided to an ADC, which may generate a numeric value corresponding to that temperature. The precision current control circuit may be configured to generate a reference current, capture the base current of the BJT, generate a combined current equivalent to a sum total of the base current and a multiple of the reference current, and provide the combined current to the emitter of the BJT. In response to this combined current, the collector current of the BJT will be equivalent to the multiple of the reference current. The ratios of the various collector currents conducted by the BJT may thus be accurately controlled, leading to more accurate temperature measurements.
摘要翻译：一种精确的温度监测系统，其使用精密电流控制电路将精确比例的电流施加到用于感测温度的半导体器件（可以是双极结型晶体管（BJT））。可以捕获与BJT的温度成比例的基极 - 发射极电压（DeltaV BAT）的变化，并将其提供给ADC，该ADC可产生对应于该温度的数值。精密电流控制电路可以被配置为产生参考电流，捕获BJT的基极电流，产生等于基极电流的总和和参考电流的倍数的组合电流，并将组合电流提供给发射器。响应于该组合电流，BJT的集电极电流将等于参考电流的倍数。因此，可以精确地控制由BJT传导的各种集电极电流的比率，从而导致更准确的温度测量。

5. 发明申请

US20050077971A1 Integrated relaxation oscillator with improved sensitivity to component variation due to process-shift 有权
标题翻译：集成放大振荡器，由于工艺移位而对组件变化的灵敏度提高
公开(公告)号：US20050077971A1
公开(公告)日：2005-04-14
申请号：US10683621
申请日：2003-10-10
申请人： Aniruddha Bashar
发明人： Aniruddha Bashar
IPC分类号： H03K3/011 , H03K3/0231 , H03L7/00
CPC分类号： H03K3/0231 , H03K3/011
摘要： A system and method for designing an integrated relaxation oscillator that exhibits reduced change in the frequency of oscillation caused by process variation. Improved sensitivity to component variation due to process shift is achieved through using more than one structure type when implementing the resistors affecting the RC time constant and threshold (trip point) voltages of the oscillator. Structure types are related to the fabrication process and for a CMOS process include, but are not limited to n-diffusion, p-diffusion, n-well, p-well, pinched n-well, pinched p-well, poly-silicon and metal. Each structure type exhibits statistically independent process variations, allowing for application of Lyapunov's extension of the Central Limit Theorem for statistically uncorrelated events to desensitize the effect from different possible causes. Thus, improvement in the performance of the oscillator may be achieved with a reduced trim requirement and without using external precision resistors.
摘要翻译：一种用于设计积分张弛振荡器的系统和方法，其显示出由于工艺变化引起的振荡频率的变化。当实现影响振荡器的RC时间常数和阈值（跳变点）电压的电阻时，可以通过使用多种结构类型来提高由于工艺偏移而对元件变化的敏感度。结构类型与制造过程有关，而CMOS工艺包括但不限于n-扩散，p-扩散，n-阱，p阱，夹紧n阱，夹持p阱，多晶硅和金属。每种结构类型都表现出统计学上独立的过程变化，允许应用Lyapunov对中心极限定理的扩展，用于统计学上不相关的事件，以使不同可能原因的影响脱敏。因此，可以通过减少的修整要求并且不使用外部精密电阻器来实现振荡器的性能的改善。

6. 发明授权

US06924709B2 Integrated relaxation oscillator with improved sensitivity to component variation due to process-shift 有权
公开(公告)号：US06924709B2
公开(公告)日：2005-08-02
申请号：US10683621
申请日：2003-10-10
申请人： Aniruddha Bashar
发明人： Aniruddha Bashar
IPC分类号： H03K3/011 , H03K3/0231 , H03B5/24
CPC分类号： H03K3/0231 , H03K3/011
摘要： A system and method for designing an integrated relaxation oscillator that exhibits reduced change in the frequency of oscillation caused by process variation. Improved sensitivity to component variation due to process shift is achieved through using more than one structure type when implementing the resistors affecting the RC time constant and threshold (trip point) voltages of the oscillator. Structure types are related to the fabrication process and for a CMOS process include, but are not limited to n-diffusion, p-diffusion, n-well, p-well, pinched n-well, pinched p-well, poly-silicon and metal. Each structure type exhibits statistically independent process variations, allowing for application of Lyapunov's extension of the Central Limit Theorem for statistically uncorrelated events to desensitize the effect from different possible causes. Thus, improvement in the performance of the oscillator may be achieved with a reduced trim requirement and without using external precision resistors.

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